common/mlx5: read TSO capability from DevX
authorTal Shnaiderman <talshn@nvidia.com>
Tue, 12 Oct 2021 12:45:48 +0000 (15:45 +0300)
committerRaslan Darawsheh <rasland@nvidia.com>
Tue, 12 Oct 2021 13:29:36 +0000 (15:29 +0200)
mlx5 in Windows needs the hca capability max_lso_cap
to query the NIC for TSO offloading support.

Added the capability as part of the capabilities
queried by the PMD using DevX.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Tested-by: Idan Hackmon <idanhac@nvidia.com>
drivers/common/mlx5/mlx5_devx_cmds.c
drivers/common/mlx5/mlx5_devx_cmds.h

index 372da99..da465e1 100644 (file)
@@ -996,6 +996,8 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
                                         hcattr, csum_cap);
        attr->lro_cap = MLX5_GET(per_protocol_networking_offload_caps, hcattr,
                                 lro_cap);
+       attr->max_lso_cap = MLX5_GET(per_protocol_networking_offload_caps,
+                                hcattr, max_lso_cap);
        attr->tunnel_lro_gre = MLX5_GET(per_protocol_networking_offload_caps,
                                        hcattr, tunnel_lro_gre);
        attr->tunnel_lro_vxlan = MLX5_GET(per_protocol_networking_offload_caps,
index f65dfc0..6c3119e 100644 (file)
@@ -113,6 +113,7 @@ struct mlx5_hca_attr {
        uint32_t tunnel_stateless_geneve_rx:1;
        uint32_t geneve_max_opt_len:1; /* 0x0: 14DW, 0x1: 63DW */
        uint32_t tunnel_stateless_gtp:1;
+       uint32_t max_lso_cap;
        uint32_t lro_cap:1;
        uint32_t tunnel_lro_gre:1;
        uint32_t tunnel_lro_vxlan:1;