goto rollback;
}
+ dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf =
+ rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf);
+
/* Check that device supports requested rss hash functions. */
if ((dev_info.flow_type_rss_offloads |
dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
if (ret != 0)
return ret;
+ rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf);
+
dev = &rte_eth_devices[port_id];
if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
dev_info.flow_type_rss_offloads) {
#define ETH_RSS_NVGRE (1ULL << 21)
#define ETH_RSS_GTPU (1ULL << 23)
+/*
+ * We use the following macros to combine with above ETH_RSS_* for
+ * more specific input set selection. These bits are defined starting
+ * from the high end of the 64 bits.
+ * Note: If we use above ETH_RSS_* without SRC/DST_ONLY, it represents
+ * both SRC and DST are taken into account. If SRC_ONLY and DST_ONLY of
+ * the same level are used simultaneously, it is the same case as none of
+ * them are added.
+ */
+#define ETH_RSS_L3_SRC_ONLY (1ULL << 63)
+#define ETH_RSS_L3_DST_ONLY (1ULL << 62)
+#define ETH_RSS_L4_SRC_ONLY (1ULL << 61)
+#define ETH_RSS_L4_DST_ONLY (1ULL << 60)
+
+/**
+ * For input set change of hash filter, if SRC_ONLY and DST_ONLY of
+ * the same level are used simultaneously, it is the same case as
+ * none of them are added.
+ *
+ * @param rss_hf
+ * RSS types with SRC/DST_ONLY.
+ * @return
+ * RSS types.
+ */
+static inline uint64_t
+rte_eth_rss_hf_refine(uint64_t rss_hf)
+{
+ if ((rss_hf & ETH_RSS_L3_SRC_ONLY) && (rss_hf & ETH_RSS_L3_DST_ONLY))
+ rss_hf &= ~(ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY);
+
+ if ((rss_hf & ETH_RSS_L4_SRC_ONLY) && (rss_hf & ETH_RSS_L4_DST_ONLY))
+ rss_hf &= ~(ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY);
+
+ return rss_hf;
+}
+
#define ETH_RSS_IP ( \
ETH_RSS_IPV4 | \
ETH_RSS_FRAG_IPV4 | \