In expression 1ULL << i, left shifting by more than 63 bits
has undefined behavior. The shift amount, i, is as much as 127.
Coverity issue: 30690
Fixes:
de3cfa2c9823 ("sched: initial import")
Signed-off-by: Slawomir Mrozowicz <slawomirx.mrozowicz@intel.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
uint64_t cm = 0;
struct rte_config *cfg = rte_eal_get_configuration();
- for (i = 0; i < RTE_MAX_LCORE; i++) {
+ for (i = 0; i < APP_MAX_LCORE; i++) {
if (cfg->lcore_role[i] == ROLE_RTE)
cm |= (1ULL << i);
}
char path[PATH_MAX];
uint32_t ncores = 0;
- for(i = 0; i < RTE_MAX_LCORE; i++) {
+ for (i = 0; i < APP_MAX_LCORE; i++) {
len = snprintf(path, sizeof(path), SYS_CPU_DIR, i);
if (len <= 0 || (unsigned)len >= sizeof(path))
continue;
#define BURST_TX_DRAIN_US 100
-#define MAX_DATA_STREAMS (RTE_MAX_LCORE/2)
+#ifndef APP_MAX_LCORE
+#define APP_MAX_LCORE 64
+#endif
+#define MAX_DATA_STREAMS (APP_MAX_LCORE/2)
#define MAX_SCHED_SUBPORTS 8
#define MAX_SCHED_PIPES 4096