]> git.droids-corp.org - dpdk.git/commitdiff
net/mlx5: select driver by class device argument
authorMatan Azrad <matan@mellanox.com>
Wed, 29 Jan 2020 12:38:46 +0000 (12:38 +0000)
committerFerruh Yigit <ferruh.yigit@intel.com>
Wed, 5 Feb 2020 08:51:20 +0000 (09:51 +0100)
There might be a case that one Mellanox device can be probed by
multiple mlx5 drivers.

One case is that any mlx5 vDPA device can be probed by both net/mlx5
and vdpa/mlx5.

Add a new mlx5 common API to get the requested driver by devargs:
class=[net/vdpa].

Skip net/mlx5 PMD probing while the device is selected to be probed by
the vDPA driver.

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
drivers/common/mlx5/Makefile
drivers/common/mlx5/meson.build
drivers/common/mlx5/mlx5_common.c
drivers/common/mlx5/mlx5_common.h
drivers/common/mlx5/rte_common_mlx5_version.map
drivers/net/mlx5/mlx5.c

index d1de3ec8698a5088941e5e07f0644e4214f2ea29..b9e98031670d8857f7a738d27216c7a1e49c529d 100644 (file)
@@ -41,7 +41,7 @@ else
 LDLIBS += -libverbs -lmlx5
 endif
 
-LDLIBS += -lrte_eal -lrte_pci
+LDLIBS += -lrte_eal -lrte_pci -lrte_kvargs
 
 # A few warnings cannot be avoided in external headers.
 CFLAGS += -Wno-error=cast-qual -DNDEBUG -UPEDANTIC
index 3e130cb5d9e68e877d12dea24ab355bf04e9529b..b88822ef00306c0dff8db0071538bd018e266a0a 100644 (file)
@@ -37,7 +37,7 @@ endforeach
 
 if build
        allow_experimental_apis = true
-       deps += ['hash', 'pci', 'net', 'eal']
+       deps += ['hash', 'pci', 'net', 'eal', 'kvargs']
        ext_deps += libs
        sources = files(
                'mlx5_devx_cmds.c',
index 578413907ab29bf673a33b5e87b4b394415777bb..57d72b4af92f00cfbd7799fb8632679b8407acc0 100644 (file)
@@ -69,6 +69,42 @@ mlx5_dev_to_pci_addr(const char *dev_path,
        return 0;
 }
 
+static int
+mlx5_class_check_handler(__rte_unused const char *key, const char *value,
+                        void *opaque)
+{
+       enum mlx5_class *ret = opaque;
+
+       if (strcmp(value, "vdpa") == 0) {
+               *ret = MLX5_CLASS_VDPA;
+       } else if (strcmp(value, "net") == 0) {
+               *ret = MLX5_CLASS_NET;
+       } else {
+               DRV_LOG(ERR, "Invalid mlx5 class %s. Maybe typo in device"
+                       " class argument setting?", value);
+               *ret = MLX5_CLASS_INVALID;
+       }
+       return 0;
+}
+
+enum mlx5_class
+mlx5_class_get(struct rte_devargs *devargs)
+{
+       struct rte_kvargs *kvlist;
+       const char *key = MLX5_CLASS_ARG_NAME;
+       enum mlx5_class ret = MLX5_CLASS_NET;
+
+       if (devargs == NULL)
+               return ret;
+       kvlist = rte_kvargs_parse(devargs->args, NULL);
+       if (kvlist == NULL)
+               return ret;
+       if (rte_kvargs_count(kvlist, key))
+               rte_kvargs_process(kvlist, key, mlx5_class_check_handler, &ret);
+       rte_kvargs_free(kvlist);
+       return ret;
+}
+
 #ifdef RTE_IBVERBS_LINK_DLOPEN
 
 /**
index 9d464d43f4a48cf01e53005d62cafbf67fc6eedb..2988f4b26a654e5f22023c6ae977509d6ce3ee2c 100644 (file)
@@ -11,6 +11,8 @@
 #include <rte_pci.h>
 #include <rte_atomic.h>
 #include <rte_log.h>
+#include <rte_kvargs.h>
+#include <rte_devargs.h>
 
 #include "mlx5_prm.h"
 
@@ -150,4 +152,13 @@ check_cqe(volatile struct mlx5_cqe *cqe, const uint16_t cqes_n,
 
 int mlx5_dev_to_pci_addr(const char *dev_path, struct rte_pci_addr *pci_addr);
 
+#define MLX5_CLASS_ARG_NAME "class"
+
+enum mlx5_class {
+       MLX5_CLASS_NET,
+       MLX5_CLASS_VDPA,
+       MLX5_CLASS_INVALID,
+};
+enum mlx5_class mlx5_class_get(struct rte_devargs *devargs);
+
 #endif /* RTE_PMD_MLX5_COMMON_H_ */
index 95ca54a4029864f70911033651181d1d91028748..3e7038bdc332aaab16531f542519cf9a23c60ace 100644 (file)
@@ -1,6 +1,8 @@
 DPDK_20.02 {
        global:
 
+       mlx5_class_get;
+
        mlx5_devx_cmd_create_cq;
        mlx5_devx_cmd_create_qp;
        mlx5_devx_cmd_create_rq;
index d0fa2da9814a1eef51f517c3f05e71a1b7636b08..ca5bc147a11500d076266018a3d5b3b0b903a87e 100644 (file)
@@ -1565,6 +1565,8 @@ mlx5_args_check(const char *key, const char *val, void *opaque)
                config->max_dump_files_num = tmp;
        } else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {
                config->lro.timeout = tmp;
+       } else if (strcmp(MLX5_CLASS_ARG_NAME, key) == 0) {
+               DRV_LOG(DEBUG, "class argument is %s.", val);
        } else {
                DRV_LOG(WARNING, "%s: unknown parameter", key);
                rte_errno = EINVAL;
@@ -1616,6 +1618,7 @@ mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
                MLX5_REPRESENTOR,
                MLX5_MAX_DUMP_FILES_NUM,
                MLX5_LRO_TIMEOUT_USEC,
+               MLX5_CLASS_ARG_NAME,
                NULL,
        };
        struct rte_kvargs *kvlist;
@@ -2967,6 +2970,11 @@ mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
        struct mlx5_dev_config dev_config;
        int ret;
 
+       if (mlx5_class_get(pci_dev->device.devargs) != MLX5_CLASS_NET) {
+               DRV_LOG(DEBUG, "Skip probing - should be probed by other mlx5"
+                       " driver.");
+               return 1;
+       }
        if (rte_eal_process_type() == RTE_PROC_PRIMARY)
                mlx5_pmd_socket_init();
        ret = mlx5_init_once();