net/mlx5: introduce hardware steering enable routine
authorSuanming Mou <suanmingm@nvidia.com>
Thu, 24 Feb 2022 13:40:40 +0000 (15:40 +0200)
committerRaslan Darawsheh <rasland@nvidia.com>
Thu, 24 Feb 2022 21:10:17 +0000 (22:10 +0100)
The new hardware steering engine relies on using dedicated steering WQEs
instead of writing to the low-level steering table entries directly.
In the first implementation the hardware steering engine supports the
new queue based Flow API, the existing synchronous non-queue based Flow
API is not supported.

A new dv_flow_en value 2 is added to manage mlx5 PMD steering engine:

dv_flow_en rte_flow API rte_flow_async API
------------------------------------------------
 0 support not support
 1 support not support
 2 not support support

This commit introduces the extra dv_flow_en = 2 to specify the new
flow initialize and manage operation routine.

Signed-off-by: Suanming Mou <suanmingm@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
doc/guides/nics/mlx5.rst
drivers/net/mlx5/linux/mlx5_os.c
drivers/net/mlx5/mlx5.c
drivers/net/mlx5/mlx5.h
drivers/net/mlx5/mlx5_flow.c

index 395e406..cc8a679 100644 (file)
@@ -942,10 +942,16 @@ for an additional list of options shared with other mlx5 drivers.
 
 - ``dv_flow_en`` parameter [int]
 
-  A nonzero value enables the DV flow steering assuming it is supported
-  by the driver (RDMA Core library version is rdma-core-24.0 or higher).
+  Value 0 means legacy Verbs flow offloading.
 
-  Enabled by default if supported.
+  Value 1 enables the DV flow steering assuming it is supported by the
+  driver (requires rdma-core 24 or higher).
+
+  Value 2 enables the WQE based hardware steering.
+  In this mode, only queue-based flow management is supported.
+
+  It is configured by default to 1 (DV flow steering) if supported.
+  Otherwise, the value is 0 which indicates legacy Verbs flow offloading.
 
 - ``dv_esw_en`` parameter [int]
 
index ecf823d..0faf26f 100644 (file)
@@ -482,6 +482,8 @@ mlx5_alloc_shared_dr(struct mlx5_priv *priv)
        err = mlx5_alloc_table_hash_list(priv);
        if (err)
                goto error;
+       if (priv->sh->config.dv_flow_en == 2)
+               return 0;
        /* The resources below are only valid with DV support. */
 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
        /* Init port id action list. */
@@ -1519,6 +1521,8 @@ err_secondary:
        priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
        if (!priv->drop_queue.hrxq)
                goto error;
+       if (priv->sh->config.dv_flow_en == 2)
+               return eth_dev;
        /* Port representor shares the same max priority with pf port. */
        if (!priv->sh->flow_priority_check_flag) {
                /* Supported Verbs flow priority number detection. */
index 9f65a8f..f49d30c 100644 (file)
@@ -1199,7 +1199,12 @@ mlx5_dev_args_check_handler(const char *key, const char *val, void *opaque)
        } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
                config->dv_esw_en = !!tmp;
        } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
-               config->dv_flow_en = !!tmp;
+               if (tmp > 2) {
+                       DRV_LOG(ERR, "Invalid %s parameter.", key);
+                       rte_errno = EINVAL;
+                       return -rte_errno;
+               }
+               config->dv_flow_en = tmp;
        } else if (strcmp(MLX5_DV_XMETA_EN, key) == 0) {
                if (tmp != MLX5_XMETA_MODE_LEGACY &&
                    tmp != MLX5_XMETA_MODE_META16 &&
index 0f465d0..b2259fc 100644 (file)
@@ -287,7 +287,8 @@ struct mlx5_sh_config {
        int tx_skew; /* Tx scheduling skew between WQE and data on wire. */
        uint32_t reclaim_mode:2; /* Memory reclaim mode. */
        uint32_t dv_esw_en:1; /* Enable E-Switch DV flow. */
-       uint32_t dv_flow_en:1; /* Enable DV flow. */
+       /* Enable DV flow. 1 means SW steering, 2 means HW steering. */
+       unsigned int dv_flow_en:2;
        uint32_t dv_xmeta_en:2; /* Enable extensive flow metadata. */
        uint32_t dv_miss_info:1; /* Restore packet after partial hw miss. */
        uint32_t l3_vxlan_en:1; /* Enable L3 VXLAN flow creation. */
index b289f13..cdb40c0 100644 (file)
@@ -6840,6 +6840,15 @@ mlx5_flow_create(struct rte_eth_dev *dev,
                 const struct rte_flow_action actions[],
                 struct rte_flow_error *error)
 {
+       struct mlx5_priv *priv = dev->data->dev_private;
+
+       if (priv->sh->config.dv_flow_en == 2) {
+               rte_flow_error_set(error, ENOTSUP,
+                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
+                         NULL,
+                         "Flow non-Q creation not supported");
+               return NULL;
+       }
        /*
         * If the device is not started yet, it is not allowed to created a
         * flow from application. PMD default flows and traffic control flows
@@ -7336,6 +7345,13 @@ mlx5_flow_destroy(struct rte_eth_dev *dev,
                  struct rte_flow *flow,
                  struct rte_flow_error *error __rte_unused)
 {
+       struct mlx5_priv *priv = dev->data->dev_private;
+
+       if (priv->sh->config.dv_flow_en == 2)
+               return rte_flow_error_set(error, ENOTSUP,
+                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
+                         NULL,
+                         "Flow non-Q destruction not supported");
        flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN,
                                (uintptr_t)(void *)flow);
        return 0;
@@ -7433,7 +7449,13 @@ mlx5_flow_query(struct rte_eth_dev *dev,
                struct rte_flow_error *error)
 {
        int ret;
+       struct mlx5_priv *priv = dev->data->dev_private;
 
+       if (priv->sh->config.dv_flow_en == 2)
+               return rte_flow_error_set(error, ENOTSUP,
+                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
+                         NULL,
+                         "Flow non-Q query not supported");
        ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
                             error);
        if (ret < 0)