======================
 
 The IGC PMD (**librte_net_igc**) provides poll mode driver support for Foxville
-I225 Series Network Adapters.
+I225 and I226 Series Network Adapters.
 
 - For information about I225, please refer to: `IntelĀ® Ethernet Controller I225 Series
   <https://ark.intel.com/content/www/us/en/ark/products/series/184686/intel-ethernet-controller-i225-series.html>`_.
-
+- For information about I226, please refer to: `IntelĀ® Ethernet Controller I226 Series
+  <https://ark.intel.com/content/www/us/en/ark/products/series/210588/intel-ethernet-controller-i226-series.html>`_.
 
 Driver compilation and testing
 ------------------------------
 Supported Chipsets and NICs
 ---------------------------
 
-Foxville LM (I225 LM): Client 2.5G LAN vPro Corporate
-Foxville V (I225 V): Client 2.5G LAN Consumer
-Foxville I (I225 I): Client 2.5G Industrial Temp
-Foxville V (I225 K): Client 2.5G LAN Consumer
-
+Foxville LM (I225 LM, I226 LM): Client 2.5G LAN vPro Corporate
+Foxville V (I225 V, I226 V): Client 2.5G LAN Consumer
+Foxville I (I225 I, I226 IM): Client 2.5G Industrial Temp
+Foxville V (I225 K, I226 K): Client 2.5G LAN Consumer
 
 Sample Application Notes
 ------------------------
 
  * Added Tx QoS queue / queue group priority configuration support.
  * Added Tx QoS queue weight configuration support.
 
+* **Updated Intel igc driver.**
+
+  Added Intel Foxville I226 devices in ``igc`` driver.
+  See the doc:`../nics/igc` NIC guide for more details.
+
 * **Updated Mellanox mlx5 driver.**
 
   * Added support for promiscuous mode on Windows.
 
        case IGC_DEV_ID_I225_I:
        case IGC_DEV_ID_I220_V:
        case IGC_DEV_ID_I225_BLANK_NVM:
+       case IGC_DEV_ID_I226_K:
+       case IGC_DEV_ID_I226_LMVP:
+       case IGC_DEV_ID_I226_LM:
+       case IGC_DEV_ID_I226_V:
+       case IGC_DEV_ID_I226_IT:
+       case IGC_DEV_ID_I226_BLANK_NVM:
                mac->type = igc_i225;
                break;
        case IGC_DEV_ID_I350_VF:
 
 #define IGP04IGC_E_PHY_ID      0x02A80391
 #define M88_VENDOR             0x0141
 #define I225_I_PHY_ID          0x67C9DC00
+#define I226_LM_PHY_ID          0x67C9DC10
 
 /* M88E1000 Specific Registers */
 #define M88IGC_PHY_SPEC_CTRL           0x10  /* PHY Specific Control Reg */
 
 #define IGC_DEV_ID_I225_I                      0x15F8
 #define IGC_DEV_ID_I220_V                      0x15F7
 #define IGC_DEV_ID_I225_BLANK_NVM              0x15FD
+#define IGC_DEV_ID_I226_K           0x3102
+#define IGC_DEV_ID_I226_LMVP        0x5503
+#define IGC_DEV_ID_I226_LM          0x125B
+#define IGC_DEV_ID_I226_V           0x125C
+#define IGC_DEV_ID_I226_IT          0x125D
+#define IGC_DEV_ID_I226_BLANK_NVM   0x125F
 #define IGC_DEV_ID_I354_BACKPLANE_1GBPS        0x1F40
 #define IGC_DEV_ID_I354_SGMII                  0x1F41
 #define IGC_DEV_ID_I354_BACKPLANE_2_5GBPS      0x1F45
 
        /* Verify phy id and set remaining function pointers */
        switch (phy->id) {
        case I225_I_PHY_ID:
+       case I226_LM_PHY_ID:
                phy->type               = igc_phy_i225;
                phy->ops.set_d0_lplu_state = igc_set_d0_lplu_state_i225;
                phy->ops.set_d3_lplu_state = igc_set_d3_lplu_state_i225;
 
        { RTE_PCI_DEVICE(IGC_INTEL_VENDOR_ID, IGC_DEV_ID_I225_V)  },
        { RTE_PCI_DEVICE(IGC_INTEL_VENDOR_ID, IGC_DEV_ID_I225_I)  },
        { RTE_PCI_DEVICE(IGC_INTEL_VENDOR_ID, IGC_DEV_ID_I225_K)  },
+       { RTE_PCI_DEVICE(IGC_INTEL_VENDOR_ID, IGC_DEV_ID_I226_K)  },
+       { RTE_PCI_DEVICE(IGC_INTEL_VENDOR_ID, IGC_DEV_ID_I226_LMVP)  },
+       { RTE_PCI_DEVICE(IGC_INTEL_VENDOR_ID, IGC_DEV_ID_I226_LM)  },
+       { RTE_PCI_DEVICE(IGC_INTEL_VENDOR_ID, IGC_DEV_ID_I226_V)  },
+       { RTE_PCI_DEVICE(IGC_INTEL_VENDOR_ID, IGC_DEV_ID_I226_IT)  },
+       { RTE_PCI_DEVICE(IGC_INTEL_VENDOR_ID, IGC_DEV_ID_I226_BLANK_NVM)  },
        { .vendor_id = 0, /* sentinel */ },
 };