]> git.droids-corp.org - dpdk.git/commitdiff
net/igc: support I226 devices
authorQiming Yang <qiming.yang@intel.com>
Wed, 25 May 2022 05:57:50 +0000 (13:57 +0800)
committerQi Zhang <qi.z.zhang@intel.com>
Wed, 25 May 2022 08:52:46 +0000 (10:52 +0200)
Added I226 Series device ID in igc driver and updated igc guide
document for new devices.

Signed-off-by: Qiming Yang <qiming.yang@intel.com>
Signed-off-by: Kevin Liu <kevinx.liu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
doc/guides/nics/igc.rst
doc/guides/rel_notes/release_22_07.rst
drivers/net/igc/base/igc_api.c
drivers/net/igc/base/igc_defines.h
drivers/net/igc/base/igc_hw.h
drivers/net/igc/base/igc_i225.c
drivers/net/igc/igc_ethdev.c

index da77e0845ef33110a754bfac792a076b41152ae3..399d2d650c30e862d37a949e719415e50a4d83e5 100644 (file)
@@ -5,11 +5,12 @@ IGC Poll Mode Driver
 ======================
 
 The IGC PMD (**librte_net_igc**) provides poll mode driver support for Foxville
-I225 Series Network Adapters.
+I225 and I226 Series Network Adapters.
 
 - For information about I225, please refer to: `IntelĀ® Ethernet Controller I225 Series
   <https://ark.intel.com/content/www/us/en/ark/products/series/184686/intel-ethernet-controller-i225-series.html>`_.
-
+- For information about I226, please refer to: `IntelĀ® Ethernet Controller I226 Series
+  <https://ark.intel.com/content/www/us/en/ark/products/series/210588/intel-ethernet-controller-i226-series.html>`_.
 
 Driver compilation and testing
 ------------------------------
@@ -21,11 +22,10 @@ for details.
 Supported Chipsets and NICs
 ---------------------------
 
-Foxville LM (I225 LM): Client 2.5G LAN vPro Corporate
-Foxville V (I225 V): Client 2.5G LAN Consumer
-Foxville I (I225 I): Client 2.5G Industrial Temp
-Foxville V (I225 K): Client 2.5G LAN Consumer
-
+Foxville LM (I225 LM, I226 LM): Client 2.5G LAN vPro Corporate
+Foxville V (I225 V, I226 V): Client 2.5G LAN Consumer
+Foxville I (I225 I, I226 IM): Client 2.5G Industrial Temp
+Foxville V (I225 K, I226 K): Client 2.5G LAN Consumer
 
 Sample Application Notes
 ------------------------
index 55659b4c05f20bb892728e99ca07e82d72c0d430..d46f773df0c15db6c2998fae29f838ca106d7a67 100644 (file)
@@ -106,6 +106,11 @@ New Features
  * Added Tx QoS queue / queue group priority configuration support.
  * Added Tx QoS queue weight configuration support.
 
+* **Updated Intel igc driver.**
+
+  Added Intel Foxville I226 devices in ``igc`` driver.
+  See the doc:`../nics/igc` NIC guide for more details.
+
 * **Updated Mellanox mlx5 driver.**
 
   * Added support for promiscuous mode on Windows.
index 2f8c0753cb272d61af11ca0c8836a2777e7b651a..9b791dc0822d2f015aee379c31e1429ef24312a2 100644 (file)
@@ -888,6 +888,12 @@ s32 igc_set_mac_type(struct igc_hw *hw)
        case IGC_DEV_ID_I225_I:
        case IGC_DEV_ID_I220_V:
        case IGC_DEV_ID_I225_BLANK_NVM:
+       case IGC_DEV_ID_I226_K:
+       case IGC_DEV_ID_I226_LMVP:
+       case IGC_DEV_ID_I226_LM:
+       case IGC_DEV_ID_I226_V:
+       case IGC_DEV_ID_I226_IT:
+       case IGC_DEV_ID_I226_BLANK_NVM:
                mac->type = igc_i225;
                break;
        case IGC_DEV_ID_I350_VF:
index 30a41300f578d62b4d74195ec9c5ed38031aa515..61964bcdd261b3c25a7351c087f1b8a742a3670a 100644 (file)
 #define IGP04IGC_E_PHY_ID      0x02A80391
 #define M88_VENDOR             0x0141
 #define I225_I_PHY_ID          0x67C9DC00
+#define I226_LM_PHY_ID          0x67C9DC10
 
 /* M88E1000 Specific Registers */
 #define M88IGC_PHY_SPEC_CTRL           0x10  /* PHY Specific Control Reg */
index be38fafa5fe88c996e6df8083dc15eb4d6d11387..707a1883b42d73f32df5459249eeb611c98092a3 100644 (file)
@@ -166,6 +166,12 @@ struct igc_hw;
 #define IGC_DEV_ID_I225_I                      0x15F8
 #define IGC_DEV_ID_I220_V                      0x15F7
 #define IGC_DEV_ID_I225_BLANK_NVM              0x15FD
+#define IGC_DEV_ID_I226_K           0x3102
+#define IGC_DEV_ID_I226_LMVP        0x5503
+#define IGC_DEV_ID_I226_LM          0x125B
+#define IGC_DEV_ID_I226_V           0x125C
+#define IGC_DEV_ID_I226_IT          0x125D
+#define IGC_DEV_ID_I226_BLANK_NVM   0x125F
 #define IGC_DEV_ID_I354_BACKPLANE_1GBPS        0x1F40
 #define IGC_DEV_ID_I354_SGMII                  0x1F41
 #define IGC_DEV_ID_I354_BACKPLANE_2_5GBPS      0x1F45
index 060b2f8f939633e34fef59d07a9f1dd670ece5e2..5f3d53549013386a868a15b83bd862fc7a18d8de 100644 (file)
@@ -176,6 +176,7 @@ static s32 igc_init_phy_params_i225(struct igc_hw *hw)
        /* Verify phy id and set remaining function pointers */
        switch (phy->id) {
        case I225_I_PHY_ID:
+       case I226_LM_PHY_ID:
                phy->type               = igc_phy_i225;
                phy->ops.set_d0_lplu_state = igc_set_d0_lplu_state_i225;
                phy->ops.set_d3_lplu_state = igc_set_d3_lplu_state_i225;
index a1f1a9772ba1704a3ec947378fb527bdcf56da22..b9933b395d9862c198ba755513e580701ec16219 100644 (file)
@@ -97,6 +97,12 @@ static const struct rte_pci_id pci_id_igc_map[] = {
        { RTE_PCI_DEVICE(IGC_INTEL_VENDOR_ID, IGC_DEV_ID_I225_V)  },
        { RTE_PCI_DEVICE(IGC_INTEL_VENDOR_ID, IGC_DEV_ID_I225_I)  },
        { RTE_PCI_DEVICE(IGC_INTEL_VENDOR_ID, IGC_DEV_ID_I225_K)  },
+       { RTE_PCI_DEVICE(IGC_INTEL_VENDOR_ID, IGC_DEV_ID_I226_K)  },
+       { RTE_PCI_DEVICE(IGC_INTEL_VENDOR_ID, IGC_DEV_ID_I226_LMVP)  },
+       { RTE_PCI_DEVICE(IGC_INTEL_VENDOR_ID, IGC_DEV_ID_I226_LM)  },
+       { RTE_PCI_DEVICE(IGC_INTEL_VENDOR_ID, IGC_DEV_ID_I226_V)  },
+       { RTE_PCI_DEVICE(IGC_INTEL_VENDOR_ID, IGC_DEV_ID_I226_IT)  },
+       { RTE_PCI_DEVICE(IGC_INTEL_VENDOR_ID, IGC_DEV_ID_I226_BLANK_NVM)  },
        { .vendor_id = 0, /* sentinel */ },
 };