eal/ppc: remove braces in SMP memory barrier macro
authorGowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com>
Tue, 27 Feb 2018 15:13:58 +0000 (20:43 +0530)
committerThomas Monjalon <thomas@monjalon.net>
Tue, 13 Mar 2018 23:06:19 +0000 (00:06 +0100)
This patch fixes the compilation problem with rte_smp_mb,
when there is else clause following it, as in test_barrier.c.

Fixes: 05c3fd7110 ("eal/ppc: atomic operations for IBM Power")
Cc: stable@dpdk.org
Signed-off-by: Gowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com>
Acked-by: Luca Boccassi <bluca@debian.org>
Acked-by: Chao Zhu <chaozhu@linux.vnet.ibm.com>
lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h

index 39fce7b..1821774 100644 (file)
@@ -55,7 +55,7 @@ extern "C" {
  * Guarantees that the LOAD and STORE operations generated before the
  * barrier occur before the LOAD and STORE operations generated after.
  */
-#define        rte_mb()  {asm volatile("sync" : : : "memory"); }
+#define        rte_mb()  asm volatile("sync" : : : "memory")
 
 /**
  * Write memory barrier.