net/i40e/base: fix PHY identifiers for 2.5G and 5G adapters
authorRobin Zhang <robinx.zhang@intel.com>
Sat, 9 Oct 2021 01:39:44 +0000 (01:39 +0000)
committerQi Zhang <qi.z.zhang@intel.com>
Sat, 9 Oct 2021 05:20:50 +0000 (07:20 +0200)
Unlike other supported adapters, 2.5G and 5G use different PHY type
identifiers for reading/writing PHY settings and for reading link status.
This commit introduces separate PHY identifiers for these two operation
types.

Fixes: 988ed63c7441 ("net/i40e/base: add support for Carlsville device")
Cc: stable@dpdk.org
Signed-off-by: Dawid Lukwinski <dawid.lukwinski@intel.com>
Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
drivers/net/i40e/base/i40e_adminq_cmd.h
drivers/net/i40e/base/i40e_common.c
drivers/net/i40e/base/i40e_type.h

index a96527f..af9dec1 100644 (file)
@@ -1947,8 +1947,10 @@ enum i40e_aq_phy_type {
        I40E_PHY_TYPE_25GBASE_LR                = 0x22,
        I40E_PHY_TYPE_25GBASE_AOC               = 0x23,
        I40E_PHY_TYPE_25GBASE_ACC               = 0x24,
-       I40E_PHY_TYPE_2_5GBASE_T                = 0x30,
-       I40E_PHY_TYPE_5GBASE_T                  = 0x31,
+       I40E_PHY_TYPE_2_5GBASE_T                = 0x26,
+       I40E_PHY_TYPE_5GBASE_T                  = 0x27,
+       I40E_PHY_TYPE_2_5GBASE_T_LINK_STATUS    = 0x30,
+       I40E_PHY_TYPE_5GBASE_T_LINK_STATUS      = 0x31,
        I40E_PHY_TYPE_MAX,
        I40E_PHY_TYPE_NOT_SUPPORTED_HIGH_TEMP   = 0xFD,
        I40E_PHY_TYPE_EMPTY                     = 0xFE,
index 32642f3..ceedec6 100644 (file)
@@ -1280,8 +1280,8 @@ STATIC enum i40e_media_type i40e_get_media_type(struct i40e_hw *hw)
                break;
        case I40E_PHY_TYPE_100BASE_TX:
        case I40E_PHY_TYPE_1000BASE_T:
-       case I40E_PHY_TYPE_2_5GBASE_T:
-       case I40E_PHY_TYPE_5GBASE_T:
+       case I40E_PHY_TYPE_2_5GBASE_T_LINK_STATUS:
+       case I40E_PHY_TYPE_5GBASE_T_LINK_STATUS:
        case I40E_PHY_TYPE_10GBASE_T:
                media = I40E_MEDIA_TYPE_BASET;
                break;
index e5a3729..0323887 100644 (file)
@@ -329,12 +329,8 @@ struct i40e_phy_info {
                                             I40E_PHY_TYPE_OFFSET)
 #define I40E_CAP_PHY_TYPE_25GBASE_ACC BIT_ULL(I40E_PHY_TYPE_25GBASE_ACC + \
                                             I40E_PHY_TYPE_OFFSET)
-/* Offset for 2.5G/5G PHY Types value to bit number conversion */
-#define I40E_PHY_TYPE_OFFSET2 (-10)
-#define I40E_CAP_PHY_TYPE_2_5GBASE_T BIT_ULL(I40E_PHY_TYPE_2_5GBASE_T + \
-                                            I40E_PHY_TYPE_OFFSET2)
-#define I40E_CAP_PHY_TYPE_5GBASE_T BIT_ULL(I40E_PHY_TYPE_5GBASE_T + \
-                                            I40E_PHY_TYPE_OFFSET2)
+#define I40E_CAP_PHY_TYPE_2_5GBASE_T BIT_ULL(I40E_PHY_TYPE_2_5GBASE_T)
+#define I40E_CAP_PHY_TYPE_5GBASE_T BIT_ULL(I40E_PHY_TYPE_5GBASE_T)
 #define I40E_HW_CAP_MAX_GPIO                   30
 #define I40E_HW_CAP_MDIO_PORT_MODE_MDIO                0
 #define I40E_HW_CAP_MDIO_PORT_MODE_I2C         1