net/bnxt: add enhancements to TruFlow ULP

1. Added support to specify l4 port masks in the template. Also enabled
   source mac in the wild card key for ingress flows.

2. Added support to enable offload for ipv6 traffic within the vxlan
   tunnel connection.

3. The flow counters is reduced from 7168 to 6912 for Whitney.
   The stats operation is updated to reflect counts for packets
   at egress from CFA instead of ingress to CFA

4. The miss path for the l2 context table is updated with correct
   parif and default action handler to handle the miss path for
   egress flows.

5. This support enables allocation of encapsulation, modification and
   action records dynamically based on a given flow actions.

6. Reduce the l2context resource requests during open_session. Move the
   SMAC from the L2Context to the EM/WM

7. Remap the parif in the bd action in order to eliminate incorrect
   replication of broadcast packets. The layer 4 source port mask
   was incorrectly updated in the outer layer 4 source port mask
   instead of inner layer 4. Add the l3 proto to egress rules, switch
   to using computed fields for l4 ports, add internal smac to f1/f2
   flows, add l3 proto to ingress ipv6 flows

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Mike Baucom <michael.baucom@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>

diff --git a/doc/guides/rel_notes/release_21_11.rst b/doc/guides/rel_notes/release_21_11.rst
index f6105de..73e377a 100644 (file)
--- a/doc/guides/rel_notes/release_21_11.rst
+++ b/doc/guides/rel_notes/release_21_11.rst
@@ -67,6 +67,12 @@ New Features
   Added macros ETH_RSS_IPV4_CHKSUM and ETH_RSS_L4_CHKSUM, now IPv4 and
   TCP/UDP/SCTP header checksum field can be used as input set for RSS.
 
+* **Updated Broadcom bnxt PMD.**
+
+  * Added flow offload support for Thor.
+  * Implement support for tunnel offload.
+  * Updated HWRM API to version 1.10.2.44
+
 * **Updated Intel ice driver.**
 
   * Added 1PPS out support by a devargs.

diff --git a/drivers/net/bnxt/tf_core/tf_tbl_sram.c b/drivers/net/bnxt/tf_core/tf_tbl_sram.c
index 167078a..636811b 100644 (file)
--- a/drivers/net/bnxt/tf_core/tf_tbl_sram.c
+++ b/drivers/net/bnxt/tf_core/tf_tbl_sram.c
@@ -134,11 +134,6 @@ static int tf_tbl_sram_get_info(struct tf_tbl_sram_get_info_parms *parms)
        if (slices)
                parms->slice_size = tf_tbl_sram_slices_2_size[slices];
 
-       TFP_DRV_LOG(DEBUG,
-                   "(%s) bank(%s) slice_size(%s)\n",
-                   tf_tbl_type_2_str(parms->tbl_type),
-                   tf_sram_bank_2_str(parms->bank_id),
-                   tf_sram_slice_2_str(parms->slice_size));
        return rc;
 }
 
@@ -373,7 +368,6 @@ tf_tbl_sram_free(struct tf *tfp __rte_unused,
                return rc;
        }
 
-
 #if (DBG_SRAM == 1)
        {
                struct tf_sram_mgr_dump_parms dparms;
@@ -411,7 +405,6 @@ tf_tbl_sram_set(struct tf *tfp,
        void *sram_handle = NULL;
        uint16_t base = 0, shift = 0;
 
-
        TF_CHECK_PARMS3(tfp, parms, parms->data);
 
        /* Retrieve the session information */

diff --git a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_class.c b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_class.c
index f74687a..ad38662 100644 (file)
--- a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_class.c
+++ b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_class.c
@@ -3,7 +3,7 @@
  * All rights reserved.
  */
 
-/* date: Thu May 20 11:56:39 2021 */
+/* date: Fri Aug  6 11:15:47 2021 */
 
 #include "ulp_template_db_enum.h"
 #include "ulp_template_db_field.h"
@@ -362,508 +362,652 @@ uint16_t ulp_class_sig_tbl[BNXT_ULP_CLASS_SIG_TBL_MAX_SZ] = {
        [BNXT_ULP_CLASS_HID_315d] = 344,
        [BNXT_ULP_CLASS_HID_3612] = 345,
        [BNXT_ULP_CLASS_HID_66da] = 346,
-       [BNXT_ULP_CLASS_HID_6165] = 347,
-       [BNXT_ULP_CLASS_HID_2aa1] = 348,
-       [BNXT_ULP_CLASS_HID_09cd] = 349,
-       [BNXT_ULP_CLASS_HID_3845] = 350,
-       [BNXT_ULP_CLASS_HID_11e9] = 351,
-       [BNXT_ULP_CLASS_HID_4361] = 352,
-       [BNXT_ULP_CLASS_HID_218d] = 353,
-       [BNXT_ULP_CLASS_HID_5105] = 354,
-       [BNXT_ULP_CLASS_HID_0c89] = 355,
-       [BNXT_ULP_CLASS_HID_3e81] = 356,
-       [BNXT_ULP_CLASS_HID_1dad] = 357,
-       [BNXT_ULP_CLASS_HID_4ca5] = 358,
-       [BNXT_ULP_CLASS_HID_25c9] = 359,
-       [BNXT_ULP_CLASS_HID_57c1] = 360,
-       [BNXT_ULP_CLASS_HID_33ed] = 361,
-       [BNXT_ULP_CLASS_HID_65e5] = 362,
-       [BNXT_ULP_CLASS_HID_6dd9] = 363,
-       [BNXT_ULP_CLASS_HID_261d] = 364,
-       [BNXT_ULP_CLASS_HID_0571] = 365,
-       [BNXT_ULP_CLASS_HID_34f9] = 366,
-       [BNXT_ULP_CLASS_HID_1d55] = 367,
-       [BNXT_ULP_CLASS_HID_4fdd] = 368,
-       [BNXT_ULP_CLASS_HID_2d31] = 369,
-       [BNXT_ULP_CLASS_HID_5db9] = 370,
-       [BNXT_ULP_CLASS_HID_0035] = 371,
-       [BNXT_ULP_CLASS_HID_323d] = 372,
-       [BNXT_ULP_CLASS_HID_1111] = 373,
-       [BNXT_ULP_CLASS_HID_4019] = 374,
-       [BNXT_ULP_CLASS_HID_2975] = 375,
-       [BNXT_ULP_CLASS_HID_5b7d] = 376,
-       [BNXT_ULP_CLASS_HID_3f51] = 377,
-       [BNXT_ULP_CLASS_HID_6959] = 378,
-       [BNXT_ULP_CLASS_HID_0e85] = 379,
-       [BNXT_ULP_CLASS_HID_380d] = 380,
-       [BNXT_ULP_CLASS_HID_1f21] = 381,
-       [BNXT_ULP_CLASS_HID_4ea9] = 382,
-       [BNXT_ULP_CLASS_HID_1705] = 383,
-       [BNXT_ULP_CLASS_HID_418d] = 384,
-       [BNXT_ULP_CLASS_HID_2721] = 385,
-       [BNXT_ULP_CLASS_HID_57a9] = 386,
-       [BNXT_ULP_CLASS_HID_1a25] = 387,
-       [BNXT_ULP_CLASS_HID_342d] = 388,
-       [BNXT_ULP_CLASS_HID_2b01] = 389,
-       [BNXT_ULP_CLASS_HID_5a09] = 390,
-       [BNXT_ULP_CLASS_HID_2325] = 391,
-       [BNXT_ULP_CLASS_HID_5d2d] = 392,
-       [BNXT_ULP_CLASS_HID_3101] = 393,
-       [BNXT_ULP_CLASS_HID_6309] = 394,
-       [BNXT_ULP_CLASS_HID_0bad] = 395,
-       [BNXT_ULP_CLASS_HID_2535] = 396,
-       [BNXT_ULP_CLASS_HID_1869] = 397,
-       [BNXT_ULP_CLASS_HID_4bf1] = 398,
-       [BNXT_ULP_CLASS_HID_136d] = 399,
-       [BNXT_ULP_CLASS_HID_43f5] = 400,
-       [BNXT_ULP_CLASS_HID_2129] = 401,
-       [BNXT_ULP_CLASS_HID_53b1] = 402,
-       [BNXT_ULP_CLASS_HID_072d] = 403,
-       [BNXT_ULP_CLASS_HID_3135] = 404,
-       [BNXT_ULP_CLASS_HID_1429] = 405,
-       [BNXT_ULP_CLASS_HID_4731] = 406,
-       [BNXT_ULP_CLASS_HID_2f6d] = 407,
-       [BNXT_ULP_CLASS_HID_5f75] = 408,
-       [BNXT_ULP_CLASS_HID_3d69] = 409,
-       [BNXT_ULP_CLASS_HID_6f71] = 410,
-       [BNXT_ULP_CLASS_HID_0dbd] = 411,
-       [BNXT_ULP_CLASS_HID_3f25] = 412,
-       [BNXT_ULP_CLASS_HID_1239] = 413,
-       [BNXT_ULP_CLASS_HID_4da1] = 414,
-       [BNXT_ULP_CLASS_HID_153d] = 415,
-       [BNXT_ULP_CLASS_HID_45a5] = 416,
-       [BNXT_ULP_CLASS_HID_3bb9] = 417,
-       [BNXT_ULP_CLASS_HID_55a1] = 418,
-       [BNXT_ULP_CLASS_HID_193d] = 419,
-       [BNXT_ULP_CLASS_HID_4b25] = 420,
-       [BNXT_ULP_CLASS_HID_2e39] = 421,
-       [BNXT_ULP_CLASS_HID_5921] = 422,
-       [BNXT_ULP_CLASS_HID_213d] = 423,
-       [BNXT_ULP_CLASS_HID_5125] = 424,
-       [BNXT_ULP_CLASS_HID_3739] = 425,
-       [BNXT_ULP_CLASS_HID_093d] = 426,
-       [BNXT_ULP_CLASS_HID_684d] = 427,
-       [BNXT_ULP_CLASS_HID_2389] = 428,
-       [BNXT_ULP_CLASS_HID_00e5] = 429,
-       [BNXT_ULP_CLASS_HID_316d] = 430,
-       [BNXT_ULP_CLASS_HID_18c1] = 431,
-       [BNXT_ULP_CLASS_HID_4a49] = 432,
-       [BNXT_ULP_CLASS_HID_28a5] = 433,
-       [BNXT_ULP_CLASS_HID_582d] = 434,
-       [BNXT_ULP_CLASS_HID_05a1] = 435,
-       [BNXT_ULP_CLASS_HID_37a9] = 436,
-       [BNXT_ULP_CLASS_HID_1485] = 437,
-       [BNXT_ULP_CLASS_HID_458d] = 438,
-       [BNXT_ULP_CLASS_HID_2ce1] = 439,
-       [BNXT_ULP_CLASS_HID_5ee9] = 440,
-       [BNXT_ULP_CLASS_HID_3ac5] = 441,
-       [BNXT_ULP_CLASS_HID_6ccd] = 442,
-       [BNXT_ULP_CLASS_HID_0b11] = 443,
-       [BNXT_ULP_CLASS_HID_3d99] = 444,
-       [BNXT_ULP_CLASS_HID_1ab5] = 445,
-       [BNXT_ULP_CLASS_HID_4b3d] = 446,
-       [BNXT_ULP_CLASS_HID_1291] = 447,
-       [BNXT_ULP_CLASS_HID_4419] = 448,
-       [BNXT_ULP_CLASS_HID_22b5] = 449,
-       [BNXT_ULP_CLASS_HID_523d] = 450,
-       [BNXT_ULP_CLASS_HID_1fb1] = 451,
-       [BNXT_ULP_CLASS_HID_31b9] = 452,
-       [BNXT_ULP_CLASS_HID_2e95] = 453,
-       [BNXT_ULP_CLASS_HID_5f9d] = 454,
-       [BNXT_ULP_CLASS_HID_26b1] = 455,
-       [BNXT_ULP_CLASS_HID_58b9] = 456,
-       [BNXT_ULP_CLASS_HID_3495] = 457,
-       [BNXT_ULP_CLASS_HID_669d] = 458,
-       [BNXT_ULP_CLASS_HID_0e39] = 459,
-       [BNXT_ULP_CLASS_HID_20a1] = 460,
-       [BNXT_ULP_CLASS_HID_1dfd] = 461,
-       [BNXT_ULP_CLASS_HID_4e65] = 462,
-       [BNXT_ULP_CLASS_HID_16f9] = 463,
-       [BNXT_ULP_CLASS_HID_4661] = 464,
-       [BNXT_ULP_CLASS_HID_24bd] = 465,
-       [BNXT_ULP_CLASS_HID_5625] = 466,
-       [BNXT_ULP_CLASS_HID_02b9] = 467,
-       [BNXT_ULP_CLASS_HID_34a1] = 468,
-       [BNXT_ULP_CLASS_HID_11bd] = 469,
-       [BNXT_ULP_CLASS_HID_42a5] = 470,
-       [BNXT_ULP_CLASS_HID_2af9] = 471,
-       [BNXT_ULP_CLASS_HID_5ae1] = 472,
-       [BNXT_ULP_CLASS_HID_38fd] = 473,
-       [BNXT_ULP_CLASS_HID_6ae5] = 474,
-       [BNXT_ULP_CLASS_HID_0829] = 475,
-       [BNXT_ULP_CLASS_HID_3ab1] = 476,
-       [BNXT_ULP_CLASS_HID_17ad] = 477,
-       [BNXT_ULP_CLASS_HID_4835] = 478,
-       [BNXT_ULP_CLASS_HID_10a9] = 479,
-       [BNXT_ULP_CLASS_HID_4031] = 480,
-       [BNXT_ULP_CLASS_HID_3e2d] = 481,
-       [BNXT_ULP_CLASS_HID_5035] = 482,
-       [BNXT_ULP_CLASS_HID_1ca9] = 483,
-       [BNXT_ULP_CLASS_HID_4eb1] = 484,
-       [BNXT_ULP_CLASS_HID_2bad] = 485,
-       [BNXT_ULP_CLASS_HID_5cb5] = 486,
-       [BNXT_ULP_CLASS_HID_24a9] = 487,
-       [BNXT_ULP_CLASS_HID_54b1] = 488,
-       [BNXT_ULP_CLASS_HID_32ad] = 489,
-       [BNXT_ULP_CLASS_HID_0ca9] = 490,
-       [BNXT_ULP_CLASS_HID_7f35] = 491,
-       [BNXT_ULP_CLASS_HID_34f1] = 492,
-       [BNXT_ULP_CLASS_HID_179d] = 493,
-       [BNXT_ULP_CLASS_HID_2615] = 494,
-       [BNXT_ULP_CLASS_HID_0fb9] = 495,
-       [BNXT_ULP_CLASS_HID_5d31] = 496,
-       [BNXT_ULP_CLASS_HID_3fdd] = 497,
-       [BNXT_ULP_CLASS_HID_4f55] = 498,
-       [BNXT_ULP_CLASS_HID_12d9] = 499,
-       [BNXT_ULP_CLASS_HID_20d1] = 500,
-       [BNXT_ULP_CLASS_HID_03fd] = 501,
-       [BNXT_ULP_CLASS_HID_52f5] = 502,
-       [BNXT_ULP_CLASS_HID_3b99] = 503,
-       [BNXT_ULP_CLASS_HID_4991] = 504,
-       [BNXT_ULP_CLASS_HID_2dbd] = 505,
-       [BNXT_ULP_CLASS_HID_7bb5] = 506,
-       [BNXT_ULP_CLASS_HID_34c6] = 507,
-       [BNXT_ULP_CLASS_HID_0c22] = 508,
-       [BNXT_ULP_CLASS_HID_1cbe] = 509,
-       [BNXT_ULP_CLASS_HID_179a] = 510,
-       [BNXT_ULP_CLASS_HID_59be] = 511,
-       [BNXT_ULP_CLASS_HID_515a] = 512,
-       [BNXT_ULP_CLASS_HID_1c72] = 513,
-       [BNXT_ULP_CLASS_HID_171e] = 514,
-       [BNXT_ULP_CLASS_HID_19c8] = 515,
-       [BNXT_ULP_CLASS_HID_112c] = 516,
-       [BNXT_ULP_CLASS_HID_4d68] = 517,
-       [BNXT_ULP_CLASS_HID_444c] = 518,
-       [BNXT_ULP_CLASS_HID_0e8c] = 519,
-       [BNXT_ULP_CLASS_HID_09e0] = 520,
-       [BNXT_ULP_CLASS_HID_1af0] = 521,
-       [BNXT_ULP_CLASS_HID_15d4] = 522,
-       [BNXT_ULP_CLASS_HID_1dd0] = 523,
-       [BNXT_ULP_CLASS_HID_14f4] = 524,
-       [BNXT_ULP_CLASS_HID_70b0] = 525,
-       [BNXT_ULP_CLASS_HID_4854] = 526,
-       [BNXT_ULP_CLASS_HID_3dd4] = 527,
-       [BNXT_ULP_CLASS_HID_34f8] = 528,
-       [BNXT_ULP_CLASS_HID_09e8] = 529,
-       [BNXT_ULP_CLASS_HID_008c] = 530,
-       [BNXT_ULP_CLASS_HID_34e6] = 531,
-       [BNXT_ULP_CLASS_HID_0c02] = 532,
-       [BNXT_ULP_CLASS_HID_1c9e] = 533,
-       [BNXT_ULP_CLASS_HID_17ba] = 534,
-       [BNXT_ULP_CLASS_HID_429e] = 535,
-       [BNXT_ULP_CLASS_HID_5dba] = 536,
-       [BNXT_ULP_CLASS_HID_2a16] = 537,
-       [BNXT_ULP_CLASS_HID_2532] = 538,
-       [BNXT_ULP_CLASS_HID_2da2] = 539,
-       [BNXT_ULP_CLASS_HID_24fe] = 540,
-       [BNXT_ULP_CLASS_HID_355a] = 541,
-       [BNXT_ULP_CLASS_HID_0c76] = 542,
-       [BNXT_ULP_CLASS_HID_13e6] = 543,
-       [BNXT_ULP_CLASS_HID_7276] = 544,
-       [BNXT_ULP_CLASS_HID_42d2] = 545,
-       [BNXT_ULP_CLASS_HID_5dee] = 546,
-       [BNXT_ULP_CLASS_HID_59de] = 547,
-       [BNXT_ULP_CLASS_HID_513a] = 548,
-       [BNXT_ULP_CLASS_HID_1c12] = 549,
-       [BNXT_ULP_CLASS_HID_177e] = 550,
-       [BNXT_ULP_CLASS_HID_0e92] = 551,
-       [BNXT_ULP_CLASS_HID_09fe] = 552,
-       [BNXT_ULP_CLASS_HID_5c1a] = 553,
-       [BNXT_ULP_CLASS_HID_5746] = 554,
-       [BNXT_ULP_CLASS_HID_79da] = 555,
-       [BNXT_ULP_CLASS_HID_7106] = 556,
-       [BNXT_ULP_CLASS_HID_3c1e] = 557,
-       [BNXT_ULP_CLASS_HID_377a] = 558,
-       [BNXT_ULP_CLASS_HID_2e9e] = 559,
-       [BNXT_ULP_CLASS_HID_29fa] = 560,
-       [BNXT_ULP_CLASS_HID_14d2] = 561,
-       [BNXT_ULP_CLASS_HID_7742] = 562,
-       [BNXT_ULP_CLASS_HID_3706] = 563,
-       [BNXT_ULP_CLASS_HID_0fe2] = 564,
-       [BNXT_ULP_CLASS_HID_1f7e] = 565,
-       [BNXT_ULP_CLASS_HID_145a] = 566,
-       [BNXT_ULP_CLASS_HID_417e] = 567,
-       [BNXT_ULP_CLASS_HID_5e5a] = 568,
-       [BNXT_ULP_CLASS_HID_29f6] = 569,
-       [BNXT_ULP_CLASS_HID_26d2] = 570,
-       [BNXT_ULP_CLASS_HID_2e42] = 571,
-       [BNXT_ULP_CLASS_HID_271e] = 572,
-       [BNXT_ULP_CLASS_HID_36ba] = 573,
-       [BNXT_ULP_CLASS_HID_0f96] = 574,
-       [BNXT_ULP_CLASS_HID_1006] = 575,
-       [BNXT_ULP_CLASS_HID_7196] = 576,
-       [BNXT_ULP_CLASS_HID_4132] = 577,
-       [BNXT_ULP_CLASS_HID_5e0e] = 578,
-       [BNXT_ULP_CLASS_HID_59fe] = 579,
-       [BNXT_ULP_CLASS_HID_511a] = 580,
-       [BNXT_ULP_CLASS_HID_1c32] = 581,
-       [BNXT_ULP_CLASS_HID_175e] = 582,
-       [BNXT_ULP_CLASS_HID_0eb2] = 583,
-       [BNXT_ULP_CLASS_HID_09de] = 584,
-       [BNXT_ULP_CLASS_HID_5c3a] = 585,
-       [BNXT_ULP_CLASS_HID_5766] = 586,
-       [BNXT_ULP_CLASS_HID_79fa] = 587,
-       [BNXT_ULP_CLASS_HID_7126] = 588,
-       [BNXT_ULP_CLASS_HID_3c3e] = 589,
-       [BNXT_ULP_CLASS_HID_375a] = 590,
-       [BNXT_ULP_CLASS_HID_2ebe] = 591,
-       [BNXT_ULP_CLASS_HID_29da] = 592,
-       [BNXT_ULP_CLASS_HID_14f2] = 593,
-       [BNXT_ULP_CLASS_HID_7762] = 594,
-       [BNXT_ULP_CLASS_HID_19e8] = 595,
-       [BNXT_ULP_CLASS_HID_110c] = 596,
-       [BNXT_ULP_CLASS_HID_4d48] = 597,
-       [BNXT_ULP_CLASS_HID_446c] = 598,
-       [BNXT_ULP_CLASS_HID_0eac] = 599,
-       [BNXT_ULP_CLASS_HID_09c0] = 600,
-       [BNXT_ULP_CLASS_HID_1ad0] = 601,
-       [BNXT_ULP_CLASS_HID_15f4] = 602,
-       [BNXT_ULP_CLASS_HID_39ec] = 603,
-       [BNXT_ULP_CLASS_HID_3100] = 604,
-       [BNXT_ULP_CLASS_HID_0210] = 605,
-       [BNXT_ULP_CLASS_HID_1d34] = 606,
-       [BNXT_ULP_CLASS_HID_2ea0] = 607,
-       [BNXT_ULP_CLASS_HID_29c4] = 608,
-       [BNXT_ULP_CLASS_HID_3ad4] = 609,
-       [BNXT_ULP_CLASS_HID_35e8] = 610,
-       [BNXT_ULP_CLASS_HID_5d80] = 611,
-       [BNXT_ULP_CLASS_HID_54a4] = 612,
-       [BNXT_ULP_CLASS_HID_29b4] = 613,
-       [BNXT_ULP_CLASS_HID_20c8] = 614,
-       [BNXT_ULP_CLASS_HID_7244] = 615,
-       [BNXT_ULP_CLASS_HID_4d98] = 616,
-       [BNXT_ULP_CLASS_HID_5e68] = 617,
-       [BNXT_ULP_CLASS_HID_598c] = 618,
-       [BNXT_ULP_CLASS_HID_1248] = 619,
-       [BNXT_ULP_CLASS_HID_74d8] = 620,
-       [BNXT_ULP_CLASS_HID_49a8] = 621,
-       [BNXT_ULP_CLASS_HID_40cc] = 622,
-       [BNXT_ULP_CLASS_HID_0b0c] = 623,
-       [BNXT_ULP_CLASS_HID_0220] = 624,
-       [BNXT_ULP_CLASS_HID_1730] = 625,
-       [BNXT_ULP_CLASS_HID_7980] = 626,
-       [BNXT_ULP_CLASS_HID_1db0] = 627,
-       [BNXT_ULP_CLASS_HID_1494] = 628,
-       [BNXT_ULP_CLASS_HID_70d0] = 629,
-       [BNXT_ULP_CLASS_HID_4834] = 630,
-       [BNXT_ULP_CLASS_HID_3db4] = 631,
-       [BNXT_ULP_CLASS_HID_3498] = 632,
-       [BNXT_ULP_CLASS_HID_0988] = 633,
-       [BNXT_ULP_CLASS_HID_00ec] = 634,
-       [BNXT_ULP_CLASS_HID_3f44] = 635,
-       [BNXT_ULP_CLASS_HID_36a8] = 636,
-       [BNXT_ULP_CLASS_HID_0b58] = 637,
-       [BNXT_ULP_CLASS_HID_02bc] = 638,
-       [BNXT_ULP_CLASS_HID_5f48] = 639,
-       [BNXT_ULP_CLASS_HID_56ac] = 640,
-       [BNXT_ULP_CLASS_HID_2b5c] = 641,
-       [BNXT_ULP_CLASS_HID_2280] = 642,
-       [BNXT_ULP_CLASS_HID_4000] = 643,
-       [BNXT_ULP_CLASS_HID_5b64] = 644,
-       [BNXT_ULP_CLASS_HID_2c14] = 645,
-       [BNXT_ULP_CLASS_HID_2778] = 646,
-       [BNXT_ULP_CLASS_HID_18f8] = 647,
-       [BNXT_ULP_CLASS_HID_13dc] = 648,
-       [BNXT_ULP_CLASS_HID_4c18] = 649,
-       [BNXT_ULP_CLASS_HID_477c] = 650,
-       [BNXT_ULP_CLASS_HID_1a88] = 651,
-       [BNXT_ULP_CLASS_HID_15ec] = 652,
-       [BNXT_ULP_CLASS_HID_4e28] = 653,
-       [BNXT_ULP_CLASS_HID_490c] = 654,
-       [BNXT_ULP_CLASS_HID_3a8c] = 655,
-       [BNXT_ULP_CLASS_HID_35f0] = 656,
-       [BNXT_ULP_CLASS_HID_06e0] = 657,
-       [BNXT_ULP_CLASS_HID_01c4] = 658,
-       [BNXT_ULP_CLASS_HID_1a08] = 659,
-       [BNXT_ULP_CLASS_HID_12ec] = 660,
-       [BNXT_ULP_CLASS_HID_4ea8] = 661,
-       [BNXT_ULP_CLASS_HID_478c] = 662,
-       [BNXT_ULP_CLASS_HID_0d4c] = 663,
-       [BNXT_ULP_CLASS_HID_0a20] = 664,
-       [BNXT_ULP_CLASS_HID_1930] = 665,
-       [BNXT_ULP_CLASS_HID_1614] = 666,
-       [BNXT_ULP_CLASS_HID_3a0c] = 667,
-       [BNXT_ULP_CLASS_HID_32e0] = 668,
-       [BNXT_ULP_CLASS_HID_01f0] = 669,
-       [BNXT_ULP_CLASS_HID_1ed4] = 670,
-       [BNXT_ULP_CLASS_HID_2d40] = 671,
-       [BNXT_ULP_CLASS_HID_2a24] = 672,
-       [BNXT_ULP_CLASS_HID_3934] = 673,
-       [BNXT_ULP_CLASS_HID_3608] = 674,
-       [BNXT_ULP_CLASS_HID_5e60] = 675,
-       [BNXT_ULP_CLASS_HID_5744] = 676,
-       [BNXT_ULP_CLASS_HID_2a54] = 677,
-       [BNXT_ULP_CLASS_HID_2328] = 678,
-       [BNXT_ULP_CLASS_HID_71a4] = 679,
-       [BNXT_ULP_CLASS_HID_4e78] = 680,
-       [BNXT_ULP_CLASS_HID_5d88] = 681,
-       [BNXT_ULP_CLASS_HID_5a6c] = 682,
-       [BNXT_ULP_CLASS_HID_11a8] = 683,
-       [BNXT_ULP_CLASS_HID_7738] = 684,
-       [BNXT_ULP_CLASS_HID_4a48] = 685,
-       [BNXT_ULP_CLASS_HID_432c] = 686,
-       [BNXT_ULP_CLASS_HID_08ec] = 687,
-       [BNXT_ULP_CLASS_HID_01c0] = 688,
-       [BNXT_ULP_CLASS_HID_14d0] = 689,
-       [BNXT_ULP_CLASS_HID_7a60] = 690,
-       [BNXT_ULP_CLASS_HID_1d90] = 691,
-       [BNXT_ULP_CLASS_HID_14b4] = 692,
-       [BNXT_ULP_CLASS_HID_70f0] = 693,
-       [BNXT_ULP_CLASS_HID_4814] = 694,
-       [BNXT_ULP_CLASS_HID_3d94] = 695,
-       [BNXT_ULP_CLASS_HID_34b8] = 696,
-       [BNXT_ULP_CLASS_HID_09a8] = 697,
-       [BNXT_ULP_CLASS_HID_00cc] = 698,
-       [BNXT_ULP_CLASS_HID_3f64] = 699,
-       [BNXT_ULP_CLASS_HID_3688] = 700,
-       [BNXT_ULP_CLASS_HID_0b78] = 701,
-       [BNXT_ULP_CLASS_HID_029c] = 702,
-       [BNXT_ULP_CLASS_HID_5f68] = 703,
-       [BNXT_ULP_CLASS_HID_568c] = 704,
-       [BNXT_ULP_CLASS_HID_2b7c] = 705,
-       [BNXT_ULP_CLASS_HID_22a0] = 706,
-       [BNXT_ULP_CLASS_HID_4020] = 707,
-       [BNXT_ULP_CLASS_HID_5b44] = 708,
-       [BNXT_ULP_CLASS_HID_2c34] = 709,
-       [BNXT_ULP_CLASS_HID_2758] = 710,
-       [BNXT_ULP_CLASS_HID_18d8] = 711,
-       [BNXT_ULP_CLASS_HID_13fc] = 712,
-       [BNXT_ULP_CLASS_HID_4c38] = 713,
-       [BNXT_ULP_CLASS_HID_475c] = 714,
-       [BNXT_ULP_CLASS_HID_1aa8] = 715,
-       [BNXT_ULP_CLASS_HID_15cc] = 716,
-       [BNXT_ULP_CLASS_HID_4e08] = 717,
-       [BNXT_ULP_CLASS_HID_492c] = 718,
-       [BNXT_ULP_CLASS_HID_3aac] = 719,
-       [BNXT_ULP_CLASS_HID_35d0] = 720,
-       [BNXT_ULP_CLASS_HID_06c0] = 721,
-       [BNXT_ULP_CLASS_HID_01e4] = 722,
-       [BNXT_ULP_CLASS_HID_4d32] = 723,
-       [BNXT_ULP_CLASS_HID_54aa] = 724,
-       [BNXT_ULP_CLASS_HID_0686] = 725,
-       [BNXT_ULP_CLASS_HID_540e] = 726,
-       [BNXT_ULP_CLASS_HID_2e3c] = 727,
-       [BNXT_ULP_CLASS_HID_3a20] = 728,
-       [BNXT_ULP_CLASS_HID_46f0] = 729,
-       [BNXT_ULP_CLASS_HID_52e4] = 730,
-       [BNXT_ULP_CLASS_HID_55e4] = 731,
-       [BNXT_ULP_CLASS_HID_21f8] = 732,
-       [BNXT_ULP_CLASS_HID_75e8] = 733,
-       [BNXT_ULP_CLASS_HID_41fc] = 734,
-       [BNXT_ULP_CLASS_HID_4d12] = 735,
-       [BNXT_ULP_CLASS_HID_548a] = 736,
-       [BNXT_ULP_CLASS_HID_3356] = 737,
-       [BNXT_ULP_CLASS_HID_1ace] = 738,
-       [BNXT_ULP_CLASS_HID_1a9a] = 739,
-       [BNXT_ULP_CLASS_HID_4d46] = 740,
-       [BNXT_ULP_CLASS_HID_2812] = 741,
-       [BNXT_ULP_CLASS_HID_338a] = 742,
-       [BNXT_ULP_CLASS_HID_06e6] = 743,
-       [BNXT_ULP_CLASS_HID_546e] = 744,
-       [BNXT_ULP_CLASS_HID_46ee] = 745,
-       [BNXT_ULP_CLASS_HID_0d22] = 746,
-       [BNXT_ULP_CLASS_HID_26e2] = 747,
-       [BNXT_ULP_CLASS_HID_746a] = 748,
-       [BNXT_ULP_CLASS_HID_1fa6] = 749,
-       [BNXT_ULP_CLASS_HID_2d2e] = 750,
-       [BNXT_ULP_CLASS_HID_4ef2] = 751,
-       [BNXT_ULP_CLASS_HID_576a] = 752,
-       [BNXT_ULP_CLASS_HID_30b6] = 753,
-       [BNXT_ULP_CLASS_HID_192e] = 754,
-       [BNXT_ULP_CLASS_HID_197a] = 755,
-       [BNXT_ULP_CLASS_HID_4ea6] = 756,
-       [BNXT_ULP_CLASS_HID_2bf2] = 757,
-       [BNXT_ULP_CLASS_HID_306a] = 758,
-       [BNXT_ULP_CLASS_HID_06c6] = 759,
-       [BNXT_ULP_CLASS_HID_544e] = 760,
-       [BNXT_ULP_CLASS_HID_46ce] = 761,
-       [BNXT_ULP_CLASS_HID_0d02] = 762,
-       [BNXT_ULP_CLASS_HID_26c2] = 763,
-       [BNXT_ULP_CLASS_HID_744a] = 764,
-       [BNXT_ULP_CLASS_HID_1f86] = 765,
-       [BNXT_ULP_CLASS_HID_2d0e] = 766,
-       [BNXT_ULP_CLASS_HID_2e1c] = 767,
-       [BNXT_ULP_CLASS_HID_3a00] = 768,
-       [BNXT_ULP_CLASS_HID_46d0] = 769,
-       [BNXT_ULP_CLASS_HID_52c4] = 770,
-       [BNXT_ULP_CLASS_HID_4e10] = 771,
-       [BNXT_ULP_CLASS_HID_5a04] = 772,
-       [BNXT_ULP_CLASS_HID_1f98] = 773,
-       [BNXT_ULP_CLASS_HID_72f8] = 774,
-       [BNXT_ULP_CLASS_HID_0a78] = 775,
-       [BNXT_ULP_CLASS_HID_166c] = 776,
-       [BNXT_ULP_CLASS_HID_233c] = 777,
-       [BNXT_ULP_CLASS_HID_0f20] = 778,
-       [BNXT_ULP_CLASS_HID_2a7c] = 779,
-       [BNXT_ULP_CLASS_HID_3660] = 780,
-       [BNXT_ULP_CLASS_HID_4330] = 781,
-       [BNXT_ULP_CLASS_HID_2f24] = 782,
-       [BNXT_ULP_CLASS_HID_5584] = 783,
-       [BNXT_ULP_CLASS_HID_2198] = 784,
-       [BNXT_ULP_CLASS_HID_7588] = 785,
-       [BNXT_ULP_CLASS_HID_419c] = 786,
-       [BNXT_ULP_CLASS_HID_7758] = 787,
-       [BNXT_ULP_CLASS_HID_43ac] = 788,
-       [BNXT_ULP_CLASS_HID_0c10] = 789,
-       [BNXT_ULP_CLASS_HID_1864] = 790,
-       [BNXT_ULP_CLASS_HID_30c8] = 791,
-       [BNXT_ULP_CLASS_HID_1cdc] = 792,
-       [BNXT_ULP_CLASS_HID_50cc] = 793,
-       [BNXT_ULP_CLASS_HID_3d20] = 794,
-       [BNXT_ULP_CLASS_HID_529c] = 795,
-       [BNXT_ULP_CLASS_HID_3ef0] = 796,
-       [BNXT_ULP_CLASS_HID_72e0] = 797,
-       [BNXT_ULP_CLASS_HID_5ef4] = 798,
-       [BNXT_ULP_CLASS_HID_2dfc] = 799,
-       [BNXT_ULP_CLASS_HID_39e0] = 800,
-       [BNXT_ULP_CLASS_HID_4530] = 801,
-       [BNXT_ULP_CLASS_HID_5124] = 802,
-       [BNXT_ULP_CLASS_HID_4df0] = 803,
-       [BNXT_ULP_CLASS_HID_59e4] = 804,
-       [BNXT_ULP_CLASS_HID_1c78] = 805,
-       [BNXT_ULP_CLASS_HID_7118] = 806,
-       [BNXT_ULP_CLASS_HID_0998] = 807,
-       [BNXT_ULP_CLASS_HID_158c] = 808,
-       [BNXT_ULP_CLASS_HID_20dc] = 809,
-       [BNXT_ULP_CLASS_HID_0cc0] = 810,
-       [BNXT_ULP_CLASS_HID_299c] = 811,
-       [BNXT_ULP_CLASS_HID_3580] = 812,
-       [BNXT_ULP_CLASS_HID_40d0] = 813,
-       [BNXT_ULP_CLASS_HID_2cc4] = 814,
-       [BNXT_ULP_CLASS_HID_55a4] = 815,
-       [BNXT_ULP_CLASS_HID_21b8] = 816,
-       [BNXT_ULP_CLASS_HID_75a8] = 817,
-       [BNXT_ULP_CLASS_HID_41bc] = 818,
-       [BNXT_ULP_CLASS_HID_7778] = 819,
-       [BNXT_ULP_CLASS_HID_438c] = 820,
-       [BNXT_ULP_CLASS_HID_0c30] = 821,
-       [BNXT_ULP_CLASS_HID_1844] = 822,
-       [BNXT_ULP_CLASS_HID_30e8] = 823,
-       [BNXT_ULP_CLASS_HID_1cfc] = 824,
-       [BNXT_ULP_CLASS_HID_50ec] = 825,
-       [BNXT_ULP_CLASS_HID_3d00] = 826,
-       [BNXT_ULP_CLASS_HID_52bc] = 827,
-       [BNXT_ULP_CLASS_HID_3ed0] = 828,
-       [BNXT_ULP_CLASS_HID_72c0] = 829,
-       [BNXT_ULP_CLASS_HID_5ed4] = 830,
-       [BNXT_ULP_CLASS_HID_3866] = 831,
-       [BNXT_ULP_CLASS_HID_381e] = 832,
-       [BNXT_ULP_CLASS_HID_3860] = 833,
-       [BNXT_ULP_CLASS_HID_0454] = 834,
-       [BNXT_ULP_CLASS_HID_3818] = 835,
-       [BNXT_ULP_CLASS_HID_042c] = 836,
-       [BNXT_ULP_CLASS_HID_3846] = 837,
-       [BNXT_ULP_CLASS_HID_387e] = 838,
-       [BNXT_ULP_CLASS_HID_3ba6] = 839,
-       [BNXT_ULP_CLASS_HID_385e] = 840,
-       [BNXT_ULP_CLASS_HID_3840] = 841,
-       [BNXT_ULP_CLASS_HID_0474] = 842,
-       [BNXT_ULP_CLASS_HID_3878] = 843,
-       [BNXT_ULP_CLASS_HID_044c] = 844,
-       [BNXT_ULP_CLASS_HID_3ba0] = 845,
-       [BNXT_ULP_CLASS_HID_0794] = 846,
-       [BNXT_ULP_CLASS_HID_3858] = 847,
-       [BNXT_ULP_CLASS_HID_046c] = 848
+       [BNXT_ULP_CLASS_HID_e082] = 347,
+       [BNXT_ULP_CLASS_HID_ab46] = 348,
+       [BNXT_ULP_CLASS_HID_c82a] = 349,
+       [BNXT_ULP_CLASS_HID_f9a2] = 350,
+       [BNXT_ULP_CLASS_HID_d8ce] = 351,
+       [BNXT_ULP_CLASS_HID_a2d2] = 352,
+       [BNXT_ULP_CLASS_HID_c076] = 353,
+       [BNXT_ULP_CLASS_HID_f1ee] = 354,
+       [BNXT_ULP_CLASS_HID_a96e] = 355,
+       [BNXT_ULP_CLASS_HID_dae6] = 356,
+       [BNXT_ULP_CLASS_HID_c7aa] = 357,
+       [BNXT_ULP_CLASS_HID_c26e] = 358,
+       [BNXT_ULP_CLASS_HID_a0fa] = 359,
+       [BNXT_ULP_CLASS_HID_d272] = 360,
+       [BNXT_ULP_CLASS_HID_fff6] = 361,
+       [BNXT_ULP_CLASS_HID_e16e] = 362,
+       [BNXT_ULP_CLASS_HID_e165] = 363,
+       [BNXT_ULP_CLASS_HID_aaa1] = 364,
+       [BNXT_ULP_CLASS_HID_c9cd] = 365,
+       [BNXT_ULP_CLASS_HID_f845] = 366,
+       [BNXT_ULP_CLASS_HID_90f9] = 367,
+       [BNXT_ULP_CLASS_HID_c371] = 368,
+       [BNXT_ULP_CLASS_HID_e19d] = 369,
+       [BNXT_ULP_CLASS_HID_d015] = 370,
+       [BNXT_ULP_CLASS_HID_8c09] = 371,
+       [BNXT_ULP_CLASS_HID_be89] = 372,
+       [BNXT_ULP_CLASS_HID_ddad] = 373,
+       [BNXT_ULP_CLASS_HID_cc2d] = 374,
+       [BNXT_ULP_CLASS_HID_a4d9] = 375,
+       [BNXT_ULP_CLASS_HID_d759] = 376,
+       [BNXT_ULP_CLASS_HID_f27d] = 377,
+       [BNXT_ULP_CLASS_HID_e4fd] = 378,
+       [BNXT_ULP_CLASS_HID_ecf6] = 379,
+       [BNXT_ULP_CLASS_HID_a732] = 380,
+       [BNXT_ULP_CLASS_HID_c45e] = 381,
+       [BNXT_ULP_CLASS_HID_f5d6] = 382,
+       [BNXT_ULP_CLASS_HID_d4ba] = 383,
+       [BNXT_ULP_CLASS_HID_aea6] = 384,
+       [BNXT_ULP_CLASS_HID_cc02] = 385,
+       [BNXT_ULP_CLASS_HID_fd9a] = 386,
+       [BNXT_ULP_CLASS_HID_a51a] = 387,
+       [BNXT_ULP_CLASS_HID_d692] = 388,
+       [BNXT_ULP_CLASS_HID_cbde] = 389,
+       [BNXT_ULP_CLASS_HID_ce1a] = 390,
+       [BNXT_ULP_CLASS_HID_ac8e] = 391,
+       [BNXT_ULP_CLASS_HID_de06] = 392,
+       [BNXT_ULP_CLASS_HID_f382] = 393,
+       [BNXT_ULP_CLASS_HID_ed1a] = 394,
+       [BNXT_ULP_CLASS_HID_9d6a] = 395,
+       [BNXT_ULP_CLASS_HID_cee2] = 396,
+       [BNXT_ULP_CLASS_HID_ec0e] = 397,
+       [BNXT_ULP_CLASS_HID_dd86] = 398,
+       [BNXT_ULP_CLASS_HID_852e] = 399,
+       [BNXT_ULP_CLASS_HID_b6a6] = 400,
+       [BNXT_ULP_CLASS_HID_eb82] = 401,
+       [BNXT_ULP_CLASS_HID_c50a] = 402,
+       [BNXT_ULP_CLASS_HID_ccca] = 403,
+       [BNXT_ULP_CLASS_HID_8706] = 404,
+       [BNXT_ULP_CLASS_HID_d38e] = 405,
+       [BNXT_ULP_CLASS_HID_d5ca] = 406,
+       [BNXT_ULP_CLASS_HID_b48e] = 407,
+       [BNXT_ULP_CLASS_HID_8e8a] = 408,
+       [BNXT_ULP_CLASS_HID_db02] = 409,
+       [BNXT_ULP_CLASS_HID_dd8e] = 410,
+       [BNXT_ULP_CLASS_HID_819a] = 411,
+       [BNXT_ULP_CLASS_HID_b31a] = 412,
+       [BNXT_ULP_CLASS_HID_d03e] = 413,
+       [BNXT_ULP_CLASS_HID_c1be] = 414,
+       [BNXT_ULP_CLASS_HID_890e] = 415,
+       [BNXT_ULP_CLASS_HID_ba8e] = 416,
+       [BNXT_ULP_CLASS_HID_dfaa] = 417,
+       [BNXT_ULP_CLASS_HID_c93a] = 418,
+       [BNXT_ULP_CLASS_HID_b11a] = 419,
+       [BNXT_ULP_CLASS_HID_8b4e] = 420,
+       [BNXT_ULP_CLASS_HID_c79e] = 421,
+       [BNXT_ULP_CLASS_HID_d9da] = 422,
+       [BNXT_ULP_CLASS_HID_b88e] = 423,
+       [BNXT_ULP_CLASS_HID_ea0e] = 424,
+       [BNXT_ULP_CLASS_HID_cf0a] = 425,
+       [BNXT_ULP_CLASS_HID_c18e] = 426,
+       [BNXT_ULP_CLASS_HID_a94a] = 427,
+       [BNXT_ULP_CLASS_HID_daca] = 428,
+       [BNXT_ULP_CLASS_HID_ffee] = 429,
+       [BNXT_ULP_CLASS_HID_e96e] = 430,
+       [BNXT_ULP_CLASS_HID_910e] = 431,
+       [BNXT_ULP_CLASS_HID_c28e] = 432,
+       [BNXT_ULP_CLASS_HID_e7aa] = 433,
+       [BNXT_ULP_CLASS_HID_d12a] = 434,
+       [BNXT_ULP_CLASS_HID_d8ca] = 435,
+       [BNXT_ULP_CLASS_HID_930e] = 436,
+       [BNXT_ULP_CLASS_HID_ef4e] = 437,
+       [BNXT_ULP_CLASS_HID_e18a] = 438,
+       [BNXT_ULP_CLASS_HID_c08e] = 439,
+       [BNXT_ULP_CLASS_HID_9a8a] = 440,
+       [BNXT_ULP_CLASS_HID_d70a] = 441,
+       [BNXT_ULP_CLASS_HID_e90e] = 442,
+       [BNXT_ULP_CLASS_HID_edd9] = 443,
+       [BNXT_ULP_CLASS_HID_a61d] = 444,
+       [BNXT_ULP_CLASS_HID_c571] = 445,
+       [BNXT_ULP_CLASS_HID_f4f9] = 446,
+       [BNXT_ULP_CLASS_HID_9c45] = 447,
+       [BNXT_ULP_CLASS_HID_cfcd] = 448,
+       [BNXT_ULP_CLASS_HID_ed21] = 449,
+       [BNXT_ULP_CLASS_HID_dca9] = 450,
+       [BNXT_ULP_CLASS_HID_80b5] = 451,
+       [BNXT_ULP_CLASS_HID_b235] = 452,
+       [BNXT_ULP_CLASS_HID_d111] = 453,
+       [BNXT_ULP_CLASS_HID_c091] = 454,
+       [BNXT_ULP_CLASS_HID_a865] = 455,
+       [BNXT_ULP_CLASS_HID_dbe5] = 456,
+       [BNXT_ULP_CLASS_HID_fec1] = 457,
+       [BNXT_ULP_CLASS_HID_e841] = 458,
+       [BNXT_ULP_CLASS_HID_8e85] = 459,
+       [BNXT_ULP_CLASS_HID_b80d] = 460,
+       [BNXT_ULP_CLASS_HID_df65] = 461,
+       [BNXT_ULP_CLASS_HID_ceed] = 462,
+       [BNXT_ULP_CLASS_HID_9645] = 463,
+       [BNXT_ULP_CLASS_HID_c1cd] = 464,
+       [BNXT_ULP_CLASS_HID_e725] = 465,
+       [BNXT_ULP_CLASS_HID_d6ad] = 466,
+       [BNXT_ULP_CLASS_HID_9aa5] = 467,
+       [BNXT_ULP_CLASS_HID_b425] = 468,
+       [BNXT_ULP_CLASS_HID_eb05] = 469,
+       [BNXT_ULP_CLASS_HID_da85] = 470,
+       [BNXT_ULP_CLASS_HID_a265] = 471,
+       [BNXT_ULP_CLASS_HID_dde5] = 472,
+       [BNXT_ULP_CLASS_HID_f0c5] = 473,
+       [BNXT_ULP_CLASS_HID_e245] = 474,
+       [BNXT_ULP_CLASS_HID_8b8f] = 475,
+       [BNXT_ULP_CLASS_HID_a517] = 476,
+       [BNXT_ULP_CLASS_HID_d86b] = 477,
+       [BNXT_ULP_CLASS_HID_cbf3] = 478,
+       [BNXT_ULP_CLASS_HID_934f] = 479,
+       [BNXT_ULP_CLASS_HID_c2c7] = 480,
+       [BNXT_ULP_CLASS_HID_e02b] = 481,
+       [BNXT_ULP_CLASS_HID_d3a3] = 482,
+       [BNXT_ULP_CLASS_HID_87a7] = 483,
+       [BNXT_ULP_CLASS_HID_b137] = 484,
+       [BNXT_ULP_CLASS_HID_d403] = 485,
+       [BNXT_ULP_CLASS_HID_c793] = 486,
+       [BNXT_ULP_CLASS_HID_af67] = 487,
+       [BNXT_ULP_CLASS_HID_dee7] = 488,
+       [BNXT_ULP_CLASS_HID_fdc3] = 489,
+       [BNXT_ULP_CLASS_HID_ef43] = 490,
+       [BNXT_ULP_CLASS_HID_8dbf] = 491,
+       [BNXT_ULP_CLASS_HID_bf07] = 492,
+       [BNXT_ULP_CLASS_HID_d21f] = 493,
+       [BNXT_ULP_CLASS_HID_cde7] = 494,
+       [BNXT_ULP_CLASS_HID_956f] = 495,
+       [BNXT_ULP_CLASS_HID_c4c7] = 496,
+       [BNXT_ULP_CLASS_HID_fbcf] = 497,
+       [BNXT_ULP_CLASS_HID_d5a7] = 498,
+       [BNXT_ULP_CLASS_HID_9957] = 499,
+       [BNXT_ULP_CLASS_HID_cb27] = 500,
+       [BNXT_ULP_CLASS_HID_ee37] = 501,
+       [BNXT_ULP_CLASS_HID_d987] = 502,
+       [BNXT_ULP_CLASS_HID_a107] = 503,
+       [BNXT_ULP_CLASS_HID_d0e7] = 504,
+       [BNXT_ULP_CLASS_HID_f7e7] = 505,
+       [BNXT_ULP_CLASS_HID_c827] = 506,
+       [BNXT_ULP_CLASS_HID_f76a] = 507,
+       [BNXT_ULP_CLASS_HID_bcae] = 508,
+       [BNXT_ULP_CLASS_HID_dfc2] = 509,
+       [BNXT_ULP_CLASS_HID_ee4a] = 510,
+       [BNXT_ULP_CLASS_HID_cf26] = 511,
+       [BNXT_ULP_CLASS_HID_b53a] = 512,
+       [BNXT_ULP_CLASS_HID_d79e] = 513,
+       [BNXT_ULP_CLASS_HID_e606] = 514,
+       [BNXT_ULP_CLASS_HID_be86] = 515,
+       [BNXT_ULP_CLASS_HID_cd0e] = 516,
+       [BNXT_ULP_CLASS_HID_d042] = 517,
+       [BNXT_ULP_CLASS_HID_d586] = 518,
+       [BNXT_ULP_CLASS_HID_b712] = 519,
+       [BNXT_ULP_CLASS_HID_c59a] = 520,
+       [BNXT_ULP_CLASS_HID_e81e] = 521,
+       [BNXT_ULP_CLASS_HID_f686] = 522,
+       [BNXT_ULP_CLASS_HID_86f6] = 523,
+       [BNXT_ULP_CLASS_HID_d57e] = 524,
+       [BNXT_ULP_CLASS_HID_f792] = 525,
+       [BNXT_ULP_CLASS_HID_c61a] = 526,
+       [BNXT_ULP_CLASS_HID_9eb2] = 527,
+       [BNXT_ULP_CLASS_HID_ad3a] = 528,
+       [BNXT_ULP_CLASS_HID_f01e] = 529,
+       [BNXT_ULP_CLASS_HID_de96] = 530,
+       [BNXT_ULP_CLASS_HID_d756] = 531,
+       [BNXT_ULP_CLASS_HID_9c9a] = 532,
+       [BNXT_ULP_CLASS_HID_c812] = 533,
+       [BNXT_ULP_CLASS_HID_ce56] = 534,
+       [BNXT_ULP_CLASS_HID_af12] = 535,
+       [BNXT_ULP_CLASS_HID_9516] = 536,
+       [BNXT_ULP_CLASS_HID_c09e] = 537,
+       [BNXT_ULP_CLASS_HID_c612] = 538,
+       [BNXT_ULP_CLASS_HID_9a06] = 539,
+       [BNXT_ULP_CLASS_HID_a886] = 540,
+       [BNXT_ULP_CLASS_HID_cba2] = 541,
+       [BNXT_ULP_CLASS_HID_da22] = 542,
+       [BNXT_ULP_CLASS_HID_9292] = 543,
+       [BNXT_ULP_CLASS_HID_a112] = 544,
+       [BNXT_ULP_CLASS_HID_c436] = 545,
+       [BNXT_ULP_CLASS_HID_d2a6] = 546,
+       [BNXT_ULP_CLASS_HID_aa86] = 547,
+       [BNXT_ULP_CLASS_HID_90d2] = 548,
+       [BNXT_ULP_CLASS_HID_dc02] = 549,
+       [BNXT_ULP_CLASS_HID_c246] = 550,
+       [BNXT_ULP_CLASS_HID_a312] = 551,
+       [BNXT_ULP_CLASS_HID_f192] = 552,
+       [BNXT_ULP_CLASS_HID_d496] = 553,
+       [BNXT_ULP_CLASS_HID_da12] = 554,
+       [BNXT_ULP_CLASS_HID_b2d6] = 555,
+       [BNXT_ULP_CLASS_HID_c156] = 556,
+       [BNXT_ULP_CLASS_HID_e472] = 557,
+       [BNXT_ULP_CLASS_HID_f2f2] = 558,
+       [BNXT_ULP_CLASS_HID_8a92] = 559,
+       [BNXT_ULP_CLASS_HID_d912] = 560,
+       [BNXT_ULP_CLASS_HID_fc36] = 561,
+       [BNXT_ULP_CLASS_HID_cab6] = 562,
+       [BNXT_ULP_CLASS_HID_c356] = 563,
+       [BNXT_ULP_CLASS_HID_8892] = 564,
+       [BNXT_ULP_CLASS_HID_f4d2] = 565,
+       [BNXT_ULP_CLASS_HID_fa16] = 566,
+       [BNXT_ULP_CLASS_HID_db12] = 567,
+       [BNXT_ULP_CLASS_HID_8116] = 568,
+       [BNXT_ULP_CLASS_HID_cc96] = 569,
+       [BNXT_ULP_CLASS_HID_f292] = 570,
+       [BNXT_ULP_CLASS_HID_e84d] = 571,
+       [BNXT_ULP_CLASS_HID_a389] = 572,
+       [BNXT_ULP_CLASS_HID_c0e5] = 573,
+       [BNXT_ULP_CLASS_HID_f16d] = 574,
+       [BNXT_ULP_CLASS_HID_99d1] = 575,
+       [BNXT_ULP_CLASS_HID_ca59] = 576,
+       [BNXT_ULP_CLASS_HID_e8b5] = 577,
+       [BNXT_ULP_CLASS_HID_d93d] = 578,
+       [BNXT_ULP_CLASS_HID_8521] = 579,
+       [BNXT_ULP_CLASS_HID_b7a1] = 580,
+       [BNXT_ULP_CLASS_HID_d485] = 581,
+       [BNXT_ULP_CLASS_HID_c505] = 582,
+       [BNXT_ULP_CLASS_HID_adf1] = 583,
+       [BNXT_ULP_CLASS_HID_de71] = 584,
+       [BNXT_ULP_CLASS_HID_fb55] = 585,
+       [BNXT_ULP_CLASS_HID_edd5] = 586,
+       [BNXT_ULP_CLASS_HID_8b11] = 587,
+       [BNXT_ULP_CLASS_HID_bd99] = 588,
+       [BNXT_ULP_CLASS_HID_daf1] = 589,
+       [BNXT_ULP_CLASS_HID_cb79] = 590,
+       [BNXT_ULP_CLASS_HID_93d1] = 591,
+       [BNXT_ULP_CLASS_HID_c459] = 592,
+       [BNXT_ULP_CLASS_HID_e2b1] = 593,
+       [BNXT_ULP_CLASS_HID_d339] = 594,
+       [BNXT_ULP_CLASS_HID_9f31] = 595,
+       [BNXT_ULP_CLASS_HID_b1b1] = 596,
+       [BNXT_ULP_CLASS_HID_ee91] = 597,
+       [BNXT_ULP_CLASS_HID_df11] = 598,
+       [BNXT_ULP_CLASS_HID_a7f1] = 599,
+       [BNXT_ULP_CLASS_HID_d871] = 600,
+       [BNXT_ULP_CLASS_HID_f551] = 601,
+       [BNXT_ULP_CLASS_HID_e7d1] = 602,
+       [BNXT_ULP_CLASS_HID_8e1b] = 603,
+       [BNXT_ULP_CLASS_HID_a083] = 604,
+       [BNXT_ULP_CLASS_HID_ddff] = 605,
+       [BNXT_ULP_CLASS_HID_ce67] = 606,
+       [BNXT_ULP_CLASS_HID_96db] = 607,
+       [BNXT_ULP_CLASS_HID_c753] = 608,
+       [BNXT_ULP_CLASS_HID_e5bf] = 609,
+       [BNXT_ULP_CLASS_HID_d637] = 610,
+       [BNXT_ULP_CLASS_HID_8233] = 611,
+       [BNXT_ULP_CLASS_HID_b4a3] = 612,
+       [BNXT_ULP_CLASS_HID_d197] = 613,
+       [BNXT_ULP_CLASS_HID_c207] = 614,
+       [BNXT_ULP_CLASS_HID_aaf3] = 615,
+       [BNXT_ULP_CLASS_HID_db73] = 616,
+       [BNXT_ULP_CLASS_HID_f857] = 617,
+       [BNXT_ULP_CLASS_HID_ead7] = 618,
+       [BNXT_ULP_CLASS_HID_882b] = 619,
+       [BNXT_ULP_CLASS_HID_ba93] = 620,
+       [BNXT_ULP_CLASS_HID_d78b] = 621,
+       [BNXT_ULP_CLASS_HID_c873] = 622,
+       [BNXT_ULP_CLASS_HID_90fb] = 623,
+       [BNXT_ULP_CLASS_HID_c153] = 624,
+       [BNXT_ULP_CLASS_HID_fe5b] = 625,
+       [BNXT_ULP_CLASS_HID_d033] = 626,
+       [BNXT_ULP_CLASS_HID_9cc3] = 627,
+       [BNXT_ULP_CLASS_HID_ceb3] = 628,
+       [BNXT_ULP_CLASS_HID_eba3] = 629,
+       [BNXT_ULP_CLASS_HID_dc13] = 630,
+       [BNXT_ULP_CLASS_HID_a493] = 631,
+       [BNXT_ULP_CLASS_HID_d573] = 632,
+       [BNXT_ULP_CLASS_HID_f273] = 633,
+       [BNXT_ULP_CLASS_HID_cdb3] = 634,
+       [BNXT_ULP_CLASS_HID_ff35] = 635,
+       [BNXT_ULP_CLASS_HID_b4f1] = 636,
+       [BNXT_ULP_CLASS_HID_d79d] = 637,
+       [BNXT_ULP_CLASS_HID_e615] = 638,
+       [BNXT_ULP_CLASS_HID_8ea9] = 639,
+       [BNXT_ULP_CLASS_HID_dd21] = 640,
+       [BNXT_ULP_CLASS_HID_ffcd] = 641,
+       [BNXT_ULP_CLASS_HID_ce45] = 642,
+       [BNXT_ULP_CLASS_HID_9259] = 643,
+       [BNXT_ULP_CLASS_HID_a0d9] = 644,
+       [BNXT_ULP_CLASS_HID_c3fd] = 645,
+       [BNXT_ULP_CLASS_HID_d27d] = 646,
+       [BNXT_ULP_CLASS_HID_ba89] = 647,
+       [BNXT_ULP_CLASS_HID_c909] = 648,
+       [BNXT_ULP_CLASS_HID_ec2d] = 649,
+       [BNXT_ULP_CLASS_HID_faad] = 650,
+       [BNXT_ULP_CLASS_HID_34c6] = 651,
+       [BNXT_ULP_CLASS_HID_0c22] = 652,
+       [BNXT_ULP_CLASS_HID_1cbe] = 653,
+       [BNXT_ULP_CLASS_HID_179a] = 654,
+       [BNXT_ULP_CLASS_HID_59be] = 655,
+       [BNXT_ULP_CLASS_HID_515a] = 656,
+       [BNXT_ULP_CLASS_HID_1c72] = 657,
+       [BNXT_ULP_CLASS_HID_171e] = 658,
+       [BNXT_ULP_CLASS_HID_19c8] = 659,
+       [BNXT_ULP_CLASS_HID_112c] = 660,
+       [BNXT_ULP_CLASS_HID_4d68] = 661,
+       [BNXT_ULP_CLASS_HID_444c] = 662,
+       [BNXT_ULP_CLASS_HID_0e8c] = 663,
+       [BNXT_ULP_CLASS_HID_09e0] = 664,
+       [BNXT_ULP_CLASS_HID_1af0] = 665,
+       [BNXT_ULP_CLASS_HID_15d4] = 666,
+       [BNXT_ULP_CLASS_HID_1dd0] = 667,
+       [BNXT_ULP_CLASS_HID_14f4] = 668,
+       [BNXT_ULP_CLASS_HID_70b0] = 669,
+       [BNXT_ULP_CLASS_HID_4854] = 670,
+       [BNXT_ULP_CLASS_HID_3dd4] = 671,
+       [BNXT_ULP_CLASS_HID_34f8] = 672,
+       [BNXT_ULP_CLASS_HID_09e8] = 673,
+       [BNXT_ULP_CLASS_HID_008c] = 674,
+       [BNXT_ULP_CLASS_HID_34e6] = 675,
+       [BNXT_ULP_CLASS_HID_0c02] = 676,
+       [BNXT_ULP_CLASS_HID_1c9e] = 677,
+       [BNXT_ULP_CLASS_HID_17ba] = 678,
+       [BNXT_ULP_CLASS_HID_429e] = 679,
+       [BNXT_ULP_CLASS_HID_5dba] = 680,
+       [BNXT_ULP_CLASS_HID_2a16] = 681,
+       [BNXT_ULP_CLASS_HID_2532] = 682,
+       [BNXT_ULP_CLASS_HID_2da2] = 683,
+       [BNXT_ULP_CLASS_HID_24fe] = 684,
+       [BNXT_ULP_CLASS_HID_355a] = 685,
+       [BNXT_ULP_CLASS_HID_0c76] = 686,
+       [BNXT_ULP_CLASS_HID_13e6] = 687,
+       [BNXT_ULP_CLASS_HID_7276] = 688,
+       [BNXT_ULP_CLASS_HID_42d2] = 689,
+       [BNXT_ULP_CLASS_HID_5dee] = 690,
+       [BNXT_ULP_CLASS_HID_59de] = 691,
+       [BNXT_ULP_CLASS_HID_513a] = 692,
+       [BNXT_ULP_CLASS_HID_1c12] = 693,
+       [BNXT_ULP_CLASS_HID_177e] = 694,
+       [BNXT_ULP_CLASS_HID_0e92] = 695,
+       [BNXT_ULP_CLASS_HID_09fe] = 696,
+       [BNXT_ULP_CLASS_HID_5c1a] = 697,
+       [BNXT_ULP_CLASS_HID_5746] = 698,
+       [BNXT_ULP_CLASS_HID_79da] = 699,
+       [BNXT_ULP_CLASS_HID_7106] = 700,
+       [BNXT_ULP_CLASS_HID_3c1e] = 701,
+       [BNXT_ULP_CLASS_HID_377a] = 702,
+       [BNXT_ULP_CLASS_HID_2e9e] = 703,
+       [BNXT_ULP_CLASS_HID_29fa] = 704,
+       [BNXT_ULP_CLASS_HID_14d2] = 705,
+       [BNXT_ULP_CLASS_HID_7742] = 706,
+       [BNXT_ULP_CLASS_HID_3706] = 707,
+       [BNXT_ULP_CLASS_HID_0fe2] = 708,
+       [BNXT_ULP_CLASS_HID_1f7e] = 709,
+       [BNXT_ULP_CLASS_HID_145a] = 710,
+       [BNXT_ULP_CLASS_HID_417e] = 711,
+       [BNXT_ULP_CLASS_HID_5e5a] = 712,
+       [BNXT_ULP_CLASS_HID_29f6] = 713,
+       [BNXT_ULP_CLASS_HID_26d2] = 714,
+       [BNXT_ULP_CLASS_HID_2e42] = 715,
+       [BNXT_ULP_CLASS_HID_271e] = 716,
+       [BNXT_ULP_CLASS_HID_36ba] = 717,
+       [BNXT_ULP_CLASS_HID_0f96] = 718,
+       [BNXT_ULP_CLASS_HID_1006] = 719,
+       [BNXT_ULP_CLASS_HID_7196] = 720,
+       [BNXT_ULP_CLASS_HID_4132] = 721,
+       [BNXT_ULP_CLASS_HID_5e0e] = 722,
+       [BNXT_ULP_CLASS_HID_59fe] = 723,
+       [BNXT_ULP_CLASS_HID_511a] = 724,
+       [BNXT_ULP_CLASS_HID_1c32] = 725,
+       [BNXT_ULP_CLASS_HID_175e] = 726,
+       [BNXT_ULP_CLASS_HID_0eb2] = 727,
+       [BNXT_ULP_CLASS_HID_09de] = 728,
+       [BNXT_ULP_CLASS_HID_5c3a] = 729,
+       [BNXT_ULP_CLASS_HID_5766] = 730,
+       [BNXT_ULP_CLASS_HID_79fa] = 731,
+       [BNXT_ULP_CLASS_HID_7126] = 732,
+       [BNXT_ULP_CLASS_HID_3c3e] = 733,
+       [BNXT_ULP_CLASS_HID_375a] = 734,
+       [BNXT_ULP_CLASS_HID_2ebe] = 735,
+       [BNXT_ULP_CLASS_HID_29da] = 736,
+       [BNXT_ULP_CLASS_HID_14f2] = 737,
+       [BNXT_ULP_CLASS_HID_7762] = 738,
+       [BNXT_ULP_CLASS_HID_19e8] = 739,
+       [BNXT_ULP_CLASS_HID_110c] = 740,
+       [BNXT_ULP_CLASS_HID_4d48] = 741,
+       [BNXT_ULP_CLASS_HID_446c] = 742,
+       [BNXT_ULP_CLASS_HID_0eac] = 743,
+       [BNXT_ULP_CLASS_HID_09c0] = 744,
+       [BNXT_ULP_CLASS_HID_1ad0] = 745,
+       [BNXT_ULP_CLASS_HID_15f4] = 746,
+       [BNXT_ULP_CLASS_HID_39ec] = 747,
+       [BNXT_ULP_CLASS_HID_3100] = 748,
+       [BNXT_ULP_CLASS_HID_0210] = 749,
+       [BNXT_ULP_CLASS_HID_1d34] = 750,
+       [BNXT_ULP_CLASS_HID_2ea0] = 751,
+       [BNXT_ULP_CLASS_HID_29c4] = 752,
+       [BNXT_ULP_CLASS_HID_3ad4] = 753,
+       [BNXT_ULP_CLASS_HID_35e8] = 754,
+       [BNXT_ULP_CLASS_HID_5d80] = 755,
+       [BNXT_ULP_CLASS_HID_54a4] = 756,
+       [BNXT_ULP_CLASS_HID_29b4] = 757,
+       [BNXT_ULP_CLASS_HID_20c8] = 758,
+       [BNXT_ULP_CLASS_HID_7244] = 759,
+       [BNXT_ULP_CLASS_HID_4d98] = 760,
+       [BNXT_ULP_CLASS_HID_5e68] = 761,
+       [BNXT_ULP_CLASS_HID_598c] = 762,
+       [BNXT_ULP_CLASS_HID_1248] = 763,
+       [BNXT_ULP_CLASS_HID_74d8] = 764,
+       [BNXT_ULP_CLASS_HID_49a8] = 765,
+       [BNXT_ULP_CLASS_HID_40cc] = 766,
+       [BNXT_ULP_CLASS_HID_0b0c] = 767,
+       [BNXT_ULP_CLASS_HID_0220] = 768,
+       [BNXT_ULP_CLASS_HID_1730] = 769,
+       [BNXT_ULP_CLASS_HID_7980] = 770,
+       [BNXT_ULP_CLASS_HID_1db0] = 771,
+       [BNXT_ULP_CLASS_HID_1494] = 772,
+       [BNXT_ULP_CLASS_HID_70d0] = 773,
+       [BNXT_ULP_CLASS_HID_4834] = 774,
+       [BNXT_ULP_CLASS_HID_3db4] = 775,
+       [BNXT_ULP_CLASS_HID_3498] = 776,
+       [BNXT_ULP_CLASS_HID_0988] = 777,
+       [BNXT_ULP_CLASS_HID_00ec] = 778,
+       [BNXT_ULP_CLASS_HID_3f44] = 779,
+       [BNXT_ULP_CLASS_HID_36a8] = 780,
+       [BNXT_ULP_CLASS_HID_0b58] = 781,
+       [BNXT_ULP_CLASS_HID_02bc] = 782,
+       [BNXT_ULP_CLASS_HID_5f48] = 783,
+       [BNXT_ULP_CLASS_HID_56ac] = 784,
+       [BNXT_ULP_CLASS_HID_2b5c] = 785,
+       [BNXT_ULP_CLASS_HID_2280] = 786,
+       [BNXT_ULP_CLASS_HID_4000] = 787,
+       [BNXT_ULP_CLASS_HID_5b64] = 788,
+       [BNXT_ULP_CLASS_HID_2c14] = 789,
+       [BNXT_ULP_CLASS_HID_2778] = 790,
+       [BNXT_ULP_CLASS_HID_18f8] = 791,
+       [BNXT_ULP_CLASS_HID_13dc] = 792,
+       [BNXT_ULP_CLASS_HID_4c18] = 793,
+       [BNXT_ULP_CLASS_HID_477c] = 794,
+       [BNXT_ULP_CLASS_HID_1a88] = 795,
+       [BNXT_ULP_CLASS_HID_15ec] = 796,
+       [BNXT_ULP_CLASS_HID_4e28] = 797,
+       [BNXT_ULP_CLASS_HID_490c] = 798,
+       [BNXT_ULP_CLASS_HID_3a8c] = 799,
+       [BNXT_ULP_CLASS_HID_35f0] = 800,
+       [BNXT_ULP_CLASS_HID_06e0] = 801,
+       [BNXT_ULP_CLASS_HID_01c4] = 802,
+       [BNXT_ULP_CLASS_HID_1a08] = 803,
+       [BNXT_ULP_CLASS_HID_12ec] = 804,
+       [BNXT_ULP_CLASS_HID_4ea8] = 805,
+       [BNXT_ULP_CLASS_HID_478c] = 806,
+       [BNXT_ULP_CLASS_HID_0d4c] = 807,
+       [BNXT_ULP_CLASS_HID_0a20] = 808,
+       [BNXT_ULP_CLASS_HID_1930] = 809,
+       [BNXT_ULP_CLASS_HID_1614] = 810,
+       [BNXT_ULP_CLASS_HID_3a0c] = 811,
+       [BNXT_ULP_CLASS_HID_32e0] = 812,
+       [BNXT_ULP_CLASS_HID_01f0] = 813,
+       [BNXT_ULP_CLASS_HID_1ed4] = 814,
+       [BNXT_ULP_CLASS_HID_2d40] = 815,
+       [BNXT_ULP_CLASS_HID_2a24] = 816,
+       [BNXT_ULP_CLASS_HID_3934] = 817,
+       [BNXT_ULP_CLASS_HID_3608] = 818,
+       [BNXT_ULP_CLASS_HID_5e60] = 819,
+       [BNXT_ULP_CLASS_HID_5744] = 820,
+       [BNXT_ULP_CLASS_HID_2a54] = 821,
+       [BNXT_ULP_CLASS_HID_2328] = 822,
+       [BNXT_ULP_CLASS_HID_71a4] = 823,
+       [BNXT_ULP_CLASS_HID_4e78] = 824,
+       [BNXT_ULP_CLASS_HID_5d88] = 825,
+       [BNXT_ULP_CLASS_HID_5a6c] = 826,
+       [BNXT_ULP_CLASS_HID_11a8] = 827,
+       [BNXT_ULP_CLASS_HID_7738] = 828,
+       [BNXT_ULP_CLASS_HID_4a48] = 829,
+       [BNXT_ULP_CLASS_HID_432c] = 830,
+       [BNXT_ULP_CLASS_HID_08ec] = 831,
+       [BNXT_ULP_CLASS_HID_01c0] = 832,
+       [BNXT_ULP_CLASS_HID_14d0] = 833,
+       [BNXT_ULP_CLASS_HID_7a60] = 834,
+       [BNXT_ULP_CLASS_HID_1d90] = 835,
+       [BNXT_ULP_CLASS_HID_14b4] = 836,
+       [BNXT_ULP_CLASS_HID_70f0] = 837,
+       [BNXT_ULP_CLASS_HID_4814] = 838,
+       [BNXT_ULP_CLASS_HID_3d94] = 839,
+       [BNXT_ULP_CLASS_HID_34b8] = 840,
+       [BNXT_ULP_CLASS_HID_09a8] = 841,
+       [BNXT_ULP_CLASS_HID_00cc] = 842,
+       [BNXT_ULP_CLASS_HID_3f64] = 843,
+       [BNXT_ULP_CLASS_HID_3688] = 844,
+       [BNXT_ULP_CLASS_HID_0b78] = 845,
+       [BNXT_ULP_CLASS_HID_029c] = 846,
+       [BNXT_ULP_CLASS_HID_5f68] = 847,
+       [BNXT_ULP_CLASS_HID_568c] = 848,
+       [BNXT_ULP_CLASS_HID_2b7c] = 849,
+       [BNXT_ULP_CLASS_HID_22a0] = 850,
+       [BNXT_ULP_CLASS_HID_4020] = 851,
+       [BNXT_ULP_CLASS_HID_5b44] = 852,
+       [BNXT_ULP_CLASS_HID_2c34] = 853,
+       [BNXT_ULP_CLASS_HID_2758] = 854,
+       [BNXT_ULP_CLASS_HID_18d8] = 855,
+       [BNXT_ULP_CLASS_HID_13fc] = 856,
+       [BNXT_ULP_CLASS_HID_4c38] = 857,
+       [BNXT_ULP_CLASS_HID_475c] = 858,
+       [BNXT_ULP_CLASS_HID_1aa8] = 859,
+       [BNXT_ULP_CLASS_HID_15cc] = 860,
+       [BNXT_ULP_CLASS_HID_4e08] = 861,
+       [BNXT_ULP_CLASS_HID_492c] = 862,
+       [BNXT_ULP_CLASS_HID_3aac] = 863,
+       [BNXT_ULP_CLASS_HID_35d0] = 864,
+       [BNXT_ULP_CLASS_HID_06c0] = 865,
+       [BNXT_ULP_CLASS_HID_01e4] = 866,
+       [BNXT_ULP_CLASS_HID_4d32] = 867,
+       [BNXT_ULP_CLASS_HID_54aa] = 868,
+       [BNXT_ULP_CLASS_HID_0686] = 869,
+       [BNXT_ULP_CLASS_HID_540e] = 870,
+       [BNXT_ULP_CLASS_HID_2e3c] = 871,
+       [BNXT_ULP_CLASS_HID_3a20] = 872,
+       [BNXT_ULP_CLASS_HID_46f0] = 873,
+       [BNXT_ULP_CLASS_HID_52e4] = 874,
+       [BNXT_ULP_CLASS_HID_55e4] = 875,
+       [BNXT_ULP_CLASS_HID_21f8] = 876,
+       [BNXT_ULP_CLASS_HID_75e8] = 877,
+       [BNXT_ULP_CLASS_HID_41fc] = 878,
+       [BNXT_ULP_CLASS_HID_4d12] = 879,
+       [BNXT_ULP_CLASS_HID_548a] = 880,
+       [BNXT_ULP_CLASS_HID_3356] = 881,
+       [BNXT_ULP_CLASS_HID_1ace] = 882,
+       [BNXT_ULP_CLASS_HID_1a9a] = 883,
+       [BNXT_ULP_CLASS_HID_4d46] = 884,
+       [BNXT_ULP_CLASS_HID_2812] = 885,
+       [BNXT_ULP_CLASS_HID_338a] = 886,
+       [BNXT_ULP_CLASS_HID_06e6] = 887,
+       [BNXT_ULP_CLASS_HID_546e] = 888,
+       [BNXT_ULP_CLASS_HID_46ee] = 889,
+       [BNXT_ULP_CLASS_HID_0d22] = 890,
+       [BNXT_ULP_CLASS_HID_26e2] = 891,
+       [BNXT_ULP_CLASS_HID_746a] = 892,
+       [BNXT_ULP_CLASS_HID_1fa6] = 893,
+       [BNXT_ULP_CLASS_HID_2d2e] = 894,
+       [BNXT_ULP_CLASS_HID_4ef2] = 895,
+       [BNXT_ULP_CLASS_HID_576a] = 896,
+       [BNXT_ULP_CLASS_HID_30b6] = 897,
+       [BNXT_ULP_CLASS_HID_192e] = 898,
+       [BNXT_ULP_CLASS_HID_197a] = 899,
+       [BNXT_ULP_CLASS_HID_4ea6] = 900,
+       [BNXT_ULP_CLASS_HID_2bf2] = 901,
+       [BNXT_ULP_CLASS_HID_306a] = 902,
+       [BNXT_ULP_CLASS_HID_06c6] = 903,
+       [BNXT_ULP_CLASS_HID_544e] = 904,
+       [BNXT_ULP_CLASS_HID_46ce] = 905,
+       [BNXT_ULP_CLASS_HID_0d02] = 906,
+       [BNXT_ULP_CLASS_HID_26c2] = 907,
+       [BNXT_ULP_CLASS_HID_744a] = 908,
+       [BNXT_ULP_CLASS_HID_1f86] = 909,
+       [BNXT_ULP_CLASS_HID_2d0e] = 910,
+       [BNXT_ULP_CLASS_HID_2e1c] = 911,
+       [BNXT_ULP_CLASS_HID_3a00] = 912,
+       [BNXT_ULP_CLASS_HID_46d0] = 913,
+       [BNXT_ULP_CLASS_HID_52c4] = 914,
+       [BNXT_ULP_CLASS_HID_4e10] = 915,
+       [BNXT_ULP_CLASS_HID_5a04] = 916,
+       [BNXT_ULP_CLASS_HID_1f98] = 917,
+       [BNXT_ULP_CLASS_HID_72f8] = 918,
+       [BNXT_ULP_CLASS_HID_0a78] = 919,
+       [BNXT_ULP_CLASS_HID_166c] = 920,
+       [BNXT_ULP_CLASS_HID_233c] = 921,
+       [BNXT_ULP_CLASS_HID_0f20] = 922,
+       [BNXT_ULP_CLASS_HID_2a7c] = 923,
+       [BNXT_ULP_CLASS_HID_3660] = 924,
+       [BNXT_ULP_CLASS_HID_4330] = 925,
+       [BNXT_ULP_CLASS_HID_2f24] = 926,
+       [BNXT_ULP_CLASS_HID_5584] = 927,
+       [BNXT_ULP_CLASS_HID_2198] = 928,
+       [BNXT_ULP_CLASS_HID_7588] = 929,
+       [BNXT_ULP_CLASS_HID_419c] = 930,
+       [BNXT_ULP_CLASS_HID_7758] = 931,
+       [BNXT_ULP_CLASS_HID_43ac] = 932,
+       [BNXT_ULP_CLASS_HID_0c10] = 933,
+       [BNXT_ULP_CLASS_HID_1864] = 934,
+       [BNXT_ULP_CLASS_HID_30c8] = 935,
+       [BNXT_ULP_CLASS_HID_1cdc] = 936,
+       [BNXT_ULP_CLASS_HID_50cc] = 937,
+       [BNXT_ULP_CLASS_HID_3d20] = 938,
+       [BNXT_ULP_CLASS_HID_529c] = 939,
+       [BNXT_ULP_CLASS_HID_3ef0] = 940,
+       [BNXT_ULP_CLASS_HID_72e0] = 941,
+       [BNXT_ULP_CLASS_HID_5ef4] = 942,
+       [BNXT_ULP_CLASS_HID_2dfc] = 943,
+       [BNXT_ULP_CLASS_HID_39e0] = 944,
+       [BNXT_ULP_CLASS_HID_4530] = 945,
+       [BNXT_ULP_CLASS_HID_5124] = 946,
+       [BNXT_ULP_CLASS_HID_4df0] = 947,
+       [BNXT_ULP_CLASS_HID_59e4] = 948,
+       [BNXT_ULP_CLASS_HID_1c78] = 949,
+       [BNXT_ULP_CLASS_HID_7118] = 950,
+       [BNXT_ULP_CLASS_HID_0998] = 951,
+       [BNXT_ULP_CLASS_HID_158c] = 952,
+       [BNXT_ULP_CLASS_HID_20dc] = 953,
+       [BNXT_ULP_CLASS_HID_0cc0] = 954,
+       [BNXT_ULP_CLASS_HID_299c] = 955,
+       [BNXT_ULP_CLASS_HID_3580] = 956,
+       [BNXT_ULP_CLASS_HID_40d0] = 957,
+       [BNXT_ULP_CLASS_HID_2cc4] = 958,
+       [BNXT_ULP_CLASS_HID_55a4] = 959,
+       [BNXT_ULP_CLASS_HID_21b8] = 960,
+       [BNXT_ULP_CLASS_HID_75a8] = 961,
+       [BNXT_ULP_CLASS_HID_41bc] = 962,
+       [BNXT_ULP_CLASS_HID_7778] = 963,
+       [BNXT_ULP_CLASS_HID_438c] = 964,
+       [BNXT_ULP_CLASS_HID_0c30] = 965,
+       [BNXT_ULP_CLASS_HID_1844] = 966,
+       [BNXT_ULP_CLASS_HID_30e8] = 967,
+       [BNXT_ULP_CLASS_HID_1cfc] = 968,
+       [BNXT_ULP_CLASS_HID_50ec] = 969,
+       [BNXT_ULP_CLASS_HID_3d00] = 970,
+       [BNXT_ULP_CLASS_HID_52bc] = 971,
+       [BNXT_ULP_CLASS_HID_3ed0] = 972,
+       [BNXT_ULP_CLASS_HID_72c0] = 973,
+       [BNXT_ULP_CLASS_HID_5ed4] = 974,
+       [BNXT_ULP_CLASS_HID_3866] = 975,
+       [BNXT_ULP_CLASS_HID_381e] = 976,
+       [BNXT_ULP_CLASS_HID_3860] = 977,
+       [BNXT_ULP_CLASS_HID_0454] = 978,
+       [BNXT_ULP_CLASS_HID_3818] = 979,
+       [BNXT_ULP_CLASS_HID_042c] = 980,
+       [BNXT_ULP_CLASS_HID_3846] = 981,
+       [BNXT_ULP_CLASS_HID_387e] = 982,
+       [BNXT_ULP_CLASS_HID_3ba6] = 983,
+       [BNXT_ULP_CLASS_HID_385e] = 984,
+       [BNXT_ULP_CLASS_HID_3840] = 985,
+       [BNXT_ULP_CLASS_HID_0474] = 986,
+       [BNXT_ULP_CLASS_HID_3878] = 987,
+       [BNXT_ULP_CLASS_HID_044c] = 988,
+       [BNXT_ULP_CLASS_HID_3ba0] = 989,
+       [BNXT_ULP_CLASS_HID_0794] = 990,
+       [BNXT_ULP_CLASS_HID_3858] = 991,
+       [BNXT_ULP_CLASS_HID_046c] = 992
 };
 
 /* Array for the proto matcher list */
@@ -7165,7 +7309,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_0_BITMASK_O_UDP_DST_PORT }
        },
        [347] = {
-       .class_hid = BNXT_ULP_CLASS_HID_6165,
+       .class_hid = BNXT_ULP_CLASS_HID_e082,
        .class_tid = 2,
        .hdr_sig_id = 1,
        .flow_sig_id = 1313792,
@@ -7176,7 +7320,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR |
@@ -7185,7 +7329,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC }
        },
        [348] = {
-       .class_hid = BNXT_ULP_CLASS_HID_2aa1,
+       .class_hid = BNXT_ULP_CLASS_HID_ab46,
        .class_tid = 2,
        .hdr_sig_id = 1,
        .flow_sig_id = 1321984,
@@ -7196,7 +7340,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR |
@@ -7206,7 +7350,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC }
        },
        [349] = {
-       .class_hid = BNXT_ULP_CLASS_HID_09cd,
+       .class_hid = BNXT_ULP_CLASS_HID_c82a,
        .class_tid = 2,
        .hdr_sig_id = 1,
        .flow_sig_id = 3410944,
@@ -7217,7 +7361,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR |
@@ -7227,7 +7371,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_SMAC }
        },
        [350] = {
-       .class_hid = BNXT_ULP_CLASS_HID_3845,
+       .class_hid = BNXT_ULP_CLASS_HID_f9a2,
        .class_tid = 2,
        .hdr_sig_id = 1,
        .flow_sig_id = 3419136,
@@ -7238,7 +7382,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR |
@@ -7249,10 +7393,10 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_SMAC }
        },
        [351] = {
-       .class_hid = BNXT_ULP_CLASS_HID_11e9,
+       .class_hid = BNXT_ULP_CLASS_HID_d8ce,
        .class_tid = 2,
        .hdr_sig_id = 1,
-       .flow_sig_id = 2148797440,
+       .flow_sig_id = 538184704,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -7260,20 +7404,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI |
                BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV4_SRC_ADDR }
+               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_SRC_ADDR }
        },
        [352] = {
-       .class_hid = BNXT_ULP_CLASS_HID_4361,
+       .class_hid = BNXT_ULP_CLASS_HID_a2d2,
        .class_tid = 2,
        .hdr_sig_id = 1,
-       .flow_sig_id = 2148805632,
+       .flow_sig_id = 538192896,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -7281,7 +7425,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR |
@@ -7289,13 +7433,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_DST_PORT |
                BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI |
                BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV4_SRC_ADDR }
+               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_SRC_ADDR }
        },
        [353] = {
-       .class_hid = BNXT_ULP_CLASS_HID_218d,
+       .class_hid = BNXT_ULP_CLASS_HID_c076,
        .class_tid = 2,
        .hdr_sig_id = 1,
-       .flow_sig_id = 2150894592,
+       .flow_sig_id = 540281856,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -7303,7 +7447,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR |
@@ -7311,13 +7455,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI |
                BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC |
                BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV4_SRC_ADDR }
+               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_SRC_ADDR }
        },
        [354] = {
-       .class_hid = BNXT_ULP_CLASS_HID_5105,
+       .class_hid = BNXT_ULP_CLASS_HID_f1ee,
        .class_tid = 2,
        .hdr_sig_id = 1,
-       .flow_sig_id = 2150902784,
+       .flow_sig_id = 540290048,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -7325,7 +7469,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR |
@@ -7334,13 +7478,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI |
                BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC |
                BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV4_SRC_ADDR }
+               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_SRC_ADDR }
        },
        [355] = {
-       .class_hid = BNXT_ULP_CLASS_HID_0c89,
+       .class_hid = BNXT_ULP_CLASS_HID_a96e,
        .class_tid = 2,
        .hdr_sig_id = 1,
-       .flow_sig_id = 4296281088,
+       .flow_sig_id = 1075055616,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -7348,20 +7492,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI |
                BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV4_DST_ADDR }
+               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_DST_ADDR }
        },
        [356] = {
-       .class_hid = BNXT_ULP_CLASS_HID_3e81,
+       .class_hid = BNXT_ULP_CLASS_HID_dae6,
        .class_tid = 2,
        .hdr_sig_id = 1,
-       .flow_sig_id = 4296289280,
+       .flow_sig_id = 1075063808,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -7369,7 +7513,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR |
@@ -7377,13 +7521,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_DST_PORT |
                BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI |
                BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV4_DST_ADDR }
+               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_DST_ADDR }
        },
        [357] = {
-       .class_hid = BNXT_ULP_CLASS_HID_1dad,
+       .class_hid = BNXT_ULP_CLASS_HID_c7aa,
        .class_tid = 2,
        .hdr_sig_id = 1,
-       .flow_sig_id = 4298378240,
+       .flow_sig_id = 1077152768,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -7391,7 +7535,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR |
@@ -7399,13 +7543,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI |
                BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC |
                BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV4_DST_ADDR }
+               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_DST_ADDR }
        },
        [358] = {
-       .class_hid = BNXT_ULP_CLASS_HID_4ca5,
+       .class_hid = BNXT_ULP_CLASS_HID_c26e,
        .class_tid = 2,
        .hdr_sig_id = 1,
-       .flow_sig_id = 4298386432,
+       .flow_sig_id = 1077160960,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -7413,7 +7557,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR |
@@ -7422,13 +7566,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI |
                BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC |
                BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV4_DST_ADDR }
+               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_DST_ADDR }
        },
        [359] = {
-       .class_hid = BNXT_ULP_CLASS_HID_25c9,
+       .class_hid = BNXT_ULP_CLASS_HID_a0fa,
        .class_tid = 2,
        .hdr_sig_id = 1,
-       .flow_sig_id = 6443764736,
+       .flow_sig_id = 1611926528,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -7436,21 +7580,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI |
                BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV4_DST_ADDR }
+               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_DST_ADDR }
        },
        [360] = {
-       .class_hid = BNXT_ULP_CLASS_HID_57c1,
+       .class_hid = BNXT_ULP_CLASS_HID_d272,
        .class_tid = 2,
        .hdr_sig_id = 1,
-       .flow_sig_id = 6443772928,
+       .flow_sig_id = 1611934720,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -7458,7 +7602,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR |
@@ -7466,14 +7610,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_DST_PORT |
                BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI |
                BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV4_DST_ADDR }
+               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_DST_ADDR }
        },
        [361] = {
-       .class_hid = BNXT_ULP_CLASS_HID_33ed,
+       .class_hid = BNXT_ULP_CLASS_HID_fff6,
        .class_tid = 2,
        .hdr_sig_id = 1,
-       .flow_sig_id = 6445861888,
+       .flow_sig_id = 1614023680,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -7481,7 +7625,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR |
@@ -7489,14 +7633,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI |
                BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC |
                BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV4_DST_ADDR }
+               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_DST_ADDR }
        },
        [362] = {
-       .class_hid = BNXT_ULP_CLASS_HID_65e5,
+       .class_hid = BNXT_ULP_CLASS_HID_e16e,
        .class_tid = 2,
        .hdr_sig_id = 1,
-       .flow_sig_id = 6445870080,
+       .flow_sig_id = 1614031872,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -7504,7 +7648,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_SRC_ADDR |
@@ -7513,11 +7657,11 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_1_BITMASK_T_VXLAN_VNI |
                BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC |
                BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV4_DST_ADDR }
+               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_DST_ADDR }
        },
        [363] = {
-       .class_hid = BNXT_ULP_CLASS_HID_6dd9,
+       .class_hid = BNXT_ULP_CLASS_HID_e165,
        .class_tid = 2,
        .hdr_sig_id = 2,
        .flow_sig_id = 1313792,
@@ -7529,7 +7673,6 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
                BNXT_ULP_HDR_BIT_I_IPV4 |
-               BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
@@ -7538,7 +7681,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC }
        },
        [364] = {
-       .class_hid = BNXT_ULP_CLASS_HID_261d,
+       .class_hid = BNXT_ULP_CLASS_HID_aaa1,
        .class_tid = 2,
        .hdr_sig_id = 2,
        .flow_sig_id = 1321984,
@@ -7550,7 +7693,6 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
                BNXT_ULP_HDR_BIT_I_IPV4 |
-               BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
@@ -7560,7 +7702,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC }
        },
        [365] = {
-       .class_hid = BNXT_ULP_CLASS_HID_0571,
+       .class_hid = BNXT_ULP_CLASS_HID_c9cd,
        .class_tid = 2,
        .hdr_sig_id = 2,
        .flow_sig_id = 3410944,
@@ -7572,7 +7714,6 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
                BNXT_ULP_HDR_BIT_I_IPV4 |
-               BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
@@ -7582,7 +7723,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC }
        },
        [366] = {
-       .class_hid = BNXT_ULP_CLASS_HID_34f9,
+       .class_hid = BNXT_ULP_CLASS_HID_f845,
        .class_tid = 2,
        .hdr_sig_id = 2,
        .flow_sig_id = 3419136,
@@ -7594,7 +7735,6 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
                BNXT_ULP_HDR_BIT_I_IPV4 |
-               BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
@@ -7605,7 +7745,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC }
        },
        [367] = {
-       .class_hid = BNXT_ULP_CLASS_HID_1d55,
+       .class_hid = BNXT_ULP_CLASS_HID_90f9,
        .class_tid = 2,
        .hdr_sig_id = 2,
        .flow_sig_id = 2148797440,
@@ -7617,7 +7757,6 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
                BNXT_ULP_HDR_BIT_I_IPV4 |
-               BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
@@ -7627,7 +7766,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR }
        },
        [368] = {
-       .class_hid = BNXT_ULP_CLASS_HID_4fdd,
+       .class_hid = BNXT_ULP_CLASS_HID_c371,
        .class_tid = 2,
        .hdr_sig_id = 2,
        .flow_sig_id = 2148805632,
@@ -7639,7 +7778,6 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
                BNXT_ULP_HDR_BIT_I_IPV4 |
-               BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
@@ -7650,7 +7788,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR }
        },
        [369] = {
-       .class_hid = BNXT_ULP_CLASS_HID_2d31,
+       .class_hid = BNXT_ULP_CLASS_HID_e19d,
        .class_tid = 2,
        .hdr_sig_id = 2,
        .flow_sig_id = 2150894592,
@@ -7662,7 +7800,6 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
                BNXT_ULP_HDR_BIT_I_IPV4 |
-               BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
@@ -7673,7 +7810,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR }
        },
        [370] = {
-       .class_hid = BNXT_ULP_CLASS_HID_5db9,
+       .class_hid = BNXT_ULP_CLASS_HID_d015,
        .class_tid = 2,
        .hdr_sig_id = 2,
        .flow_sig_id = 2150902784,
@@ -7685,7 +7822,6 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
                BNXT_ULP_HDR_BIT_I_IPV4 |
-               BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
@@ -7697,7 +7833,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR }
        },
        [371] = {
-       .class_hid = BNXT_ULP_CLASS_HID_0035,
+       .class_hid = BNXT_ULP_CLASS_HID_8c09,
        .class_tid = 2,
        .hdr_sig_id = 2,
        .flow_sig_id = 4296281088,
@@ -7709,7 +7845,6 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
                BNXT_ULP_HDR_BIT_I_IPV4 |
-               BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
@@ -7719,7 +7854,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR }
        },
        [372] = {
-       .class_hid = BNXT_ULP_CLASS_HID_323d,
+       .class_hid = BNXT_ULP_CLASS_HID_be89,
        .class_tid = 2,
        .hdr_sig_id = 2,
        .flow_sig_id = 4296289280,
@@ -7731,7 +7866,6 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
                BNXT_ULP_HDR_BIT_I_IPV4 |
-               BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
@@ -7742,7 +7876,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR }
        },
        [373] = {
-       .class_hid = BNXT_ULP_CLASS_HID_1111,
+       .class_hid = BNXT_ULP_CLASS_HID_ddad,
        .class_tid = 2,
        .hdr_sig_id = 2,
        .flow_sig_id = 4298378240,
@@ -7754,7 +7888,6 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
                BNXT_ULP_HDR_BIT_I_IPV4 |
-               BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
@@ -7765,7 +7898,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR }
        },
        [374] = {
-       .class_hid = BNXT_ULP_CLASS_HID_4019,
+       .class_hid = BNXT_ULP_CLASS_HID_cc2d,
        .class_tid = 2,
        .hdr_sig_id = 2,
        .flow_sig_id = 4298386432,
@@ -7777,7 +7910,6 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
                BNXT_ULP_HDR_BIT_I_IPV4 |
-               BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
@@ -7789,7 +7921,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR }
        },
        [375] = {
-       .class_hid = BNXT_ULP_CLASS_HID_2975,
+       .class_hid = BNXT_ULP_CLASS_HID_a4d9,
        .class_tid = 2,
        .hdr_sig_id = 2,
        .flow_sig_id = 6443764736,
@@ -7801,7 +7933,6 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
                BNXT_ULP_HDR_BIT_I_IPV4 |
-               BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
@@ -7812,7 +7943,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR }
        },
        [376] = {
-       .class_hid = BNXT_ULP_CLASS_HID_5b7d,
+       .class_hid = BNXT_ULP_CLASS_HID_d759,
        .class_tid = 2,
        .hdr_sig_id = 2,
        .flow_sig_id = 6443772928,
@@ -7824,7 +7955,6 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
                BNXT_ULP_HDR_BIT_I_IPV4 |
-               BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
@@ -7836,7 +7966,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR }
        },
        [377] = {
-       .class_hid = BNXT_ULP_CLASS_HID_3f51,
+       .class_hid = BNXT_ULP_CLASS_HID_f27d,
        .class_tid = 2,
        .hdr_sig_id = 2,
        .flow_sig_id = 6445861888,
@@ -7848,7 +7978,6 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
                BNXT_ULP_HDR_BIT_I_IPV4 |
-               BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
@@ -7860,7 +7989,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR }
        },
        [378] = {
-       .class_hid = BNXT_ULP_CLASS_HID_6959,
+       .class_hid = BNXT_ULP_CLASS_HID_e4fd,
        .class_tid = 2,
        .hdr_sig_id = 2,
        .flow_sig_id = 6445870080,
@@ -7872,7 +8001,6 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
                BNXT_ULP_HDR_BIT_I_IPV4 |
-               BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
                BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
@@ -7885,10 +8013,10 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR }
        },
        [379] = {
-       .class_hid = BNXT_ULP_CLASS_HID_0e85,
+       .class_hid = BNXT_ULP_CLASS_HID_ecf6,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 8591248384,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 1313792,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -7896,21 +8024,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC }
        },
        [380] = {
-       .class_hid = BNXT_ULP_CLASS_HID_380d,
+       .class_hid = BNXT_ULP_CLASS_HID_a732,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 8591256576,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 1321984,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -7918,22 +8045,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC }
        },
        [381] = {
-       .class_hid = BNXT_ULP_CLASS_HID_1f21,
+       .class_hid = BNXT_ULP_CLASS_HID_c45e,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 8593345536,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 3410944,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -7941,22 +8067,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC }
        },
        [382] = {
-       .class_hid = BNXT_ULP_CLASS_HID_4ea9,
+       .class_hid = BNXT_ULP_CLASS_HID_f5d6,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 8593353728,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 3419136,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -7964,23 +8089,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC }
        },
        [383] = {
-       .class_hid = BNXT_ULP_CLASS_HID_1705,
+       .class_hid = BNXT_ULP_CLASS_HID_d4ba,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 10738732032,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 538184704,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -7988,22 +8112,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR }
        },
        [384] = {
-       .class_hid = BNXT_ULP_CLASS_HID_418d,
+       .class_hid = BNXT_ULP_CLASS_HID_aea6,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 10738740224,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 538192896,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8011,23 +8134,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR }
        },
        [385] = {
-       .class_hid = BNXT_ULP_CLASS_HID_2721,
+       .class_hid = BNXT_ULP_CLASS_HID_cc02,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 10740829184,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 540281856,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8035,23 +8157,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR }
        },
        [386] = {
-       .class_hid = BNXT_ULP_CLASS_HID_57a9,
+       .class_hid = BNXT_ULP_CLASS_HID_fd9a,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 10740837376,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 540290048,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8059,24 +8180,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR }
        },
        [387] = {
-       .class_hid = BNXT_ULP_CLASS_HID_1a25,
+       .class_hid = BNXT_ULP_CLASS_HID_a51a,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 12886215680,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 1075055616,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8084,22 +8204,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR }
        },
        [388] = {
-       .class_hid = BNXT_ULP_CLASS_HID_342d,
+       .class_hid = BNXT_ULP_CLASS_HID_d692,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 12886223872,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 1075063808,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8107,23 +8226,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR }
        },
        [389] = {
-       .class_hid = BNXT_ULP_CLASS_HID_2b01,
+       .class_hid = BNXT_ULP_CLASS_HID_cbde,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 12888312832,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 1077152768,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8131,23 +8249,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR }
        },
        [390] = {
-       .class_hid = BNXT_ULP_CLASS_HID_5a09,
+       .class_hid = BNXT_ULP_CLASS_HID_ce1a,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 12888321024,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 1077160960,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8155,24 +8272,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR }
        },
        [391] = {
-       .class_hid = BNXT_ULP_CLASS_HID_2325,
+       .class_hid = BNXT_ULP_CLASS_HID_ac8e,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 15033699328,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 1611926528,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8180,23 +8296,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR }
        },
        [392] = {
-       .class_hid = BNXT_ULP_CLASS_HID_5d2d,
+       .class_hid = BNXT_ULP_CLASS_HID_de06,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 15033707520,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 1611934720,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8204,24 +8319,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR }
        },
        [393] = {
-       .class_hid = BNXT_ULP_CLASS_HID_3101,
+       .class_hid = BNXT_ULP_CLASS_HID_f382,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 15035796480,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 1614023680,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8229,24 +8343,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR }
        },
        [394] = {
-       .class_hid = BNXT_ULP_CLASS_HID_6309,
+       .class_hid = BNXT_ULP_CLASS_HID_ed1a,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 15035804672,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 1614031872,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8254,25 +8367,24 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR }
        },
        [395] = {
-       .class_hid = BNXT_ULP_CLASS_HID_0bad,
+       .class_hid = BNXT_ULP_CLASS_HID_9d6a,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 17181182976,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 2148797440,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8280,21 +8392,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT }
        },
        [396] = {
-       .class_hid = BNXT_ULP_CLASS_HID_2535,
+       .class_hid = BNXT_ULP_CLASS_HID_cee2,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 17181191168,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 2148805632,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8302,22 +8414,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT }
        },
        [397] = {
-       .class_hid = BNXT_ULP_CLASS_HID_1869,
+       .class_hid = BNXT_ULP_CLASS_HID_ec0e,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 17183280128,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 2150894592,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8325,22 +8437,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT }
        },
        [398] = {
-       .class_hid = BNXT_ULP_CLASS_HID_4bf1,
+       .class_hid = BNXT_ULP_CLASS_HID_dd86,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 17183288320,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 2150902784,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8348,23 +8460,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT }
        },
        [399] = {
-       .class_hid = BNXT_ULP_CLASS_HID_136d,
+       .class_hid = BNXT_ULP_CLASS_HID_852e,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 19328666624,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 2685668352,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8372,22 +8484,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT }
        },
        [400] = {
-       .class_hid = BNXT_ULP_CLASS_HID_43f5,
+       .class_hid = BNXT_ULP_CLASS_HID_b6a6,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 19328674816,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 2685676544,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8395,23 +8507,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT }
        },
        [401] = {
-       .class_hid = BNXT_ULP_CLASS_HID_2129,
+       .class_hid = BNXT_ULP_CLASS_HID_eb82,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 19330763776,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 2687765504,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8419,23 +8531,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT }
        },
        [402] = {
-       .class_hid = BNXT_ULP_CLASS_HID_53b1,
+       .class_hid = BNXT_ULP_CLASS_HID_c50a,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 19330771968,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 2687773696,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8443,24 +8555,24 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT }
        },
        [403] = {
-       .class_hid = BNXT_ULP_CLASS_HID_072d,
+       .class_hid = BNXT_ULP_CLASS_HID_ccca,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 21476150272,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 3222539264,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8468,22 +8580,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT }
        },
        [404] = {
-       .class_hid = BNXT_ULP_CLASS_HID_3135,
+       .class_hid = BNXT_ULP_CLASS_HID_8706,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 21476158464,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 3222547456,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8491,23 +8603,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT }
        },
        [405] = {
-       .class_hid = BNXT_ULP_CLASS_HID_1429,
+       .class_hid = BNXT_ULP_CLASS_HID_d38e,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 21478247424,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 3224636416,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8515,23 +8627,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT }
        },
        [406] = {
-       .class_hid = BNXT_ULP_CLASS_HID_4731,
+       .class_hid = BNXT_ULP_CLASS_HID_d5ca,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 21478255616,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 3224644608,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8539,24 +8651,24 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT }
        },
        [407] = {
-       .class_hid = BNXT_ULP_CLASS_HID_2f6d,
+       .class_hid = BNXT_ULP_CLASS_HID_b48e,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 23623633920,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 3759410176,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8564,23 +8676,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT }
        },
        [408] = {
-       .class_hid = BNXT_ULP_CLASS_HID_5f75,
+       .class_hid = BNXT_ULP_CLASS_HID_8e8a,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 23623642112,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 3759418368,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8588,24 +8700,24 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT }
        },
        [409] = {
-       .class_hid = BNXT_ULP_CLASS_HID_3d69,
+       .class_hid = BNXT_ULP_CLASS_HID_db02,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 23625731072,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 3761507328,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8613,24 +8725,24 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT }
        },
        [410] = {
-       .class_hid = BNXT_ULP_CLASS_HID_6f71,
+       .class_hid = BNXT_ULP_CLASS_HID_dd8e,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 23625739264,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 3761515520,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8638,25 +8750,25 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
-       },
-       [411] = {
-       .class_hid = BNXT_ULP_CLASS_HID_0dbd,
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT }
+       },
+       [411] = {
+       .class_hid = BNXT_ULP_CLASS_HID_819a,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 25771117568,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 4296281088,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8664,22 +8776,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
        },
        [412] = {
-       .class_hid = BNXT_ULP_CLASS_HID_3f25,
+       .class_hid = BNXT_ULP_CLASS_HID_b31a,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 25771125760,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 4296289280,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8687,23 +8798,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
        },
        [413] = {
-       .class_hid = BNXT_ULP_CLASS_HID_1239,
+       .class_hid = BNXT_ULP_CLASS_HID_d03e,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 25773214720,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 4298378240,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8711,23 +8821,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
        },
        [414] = {
-       .class_hid = BNXT_ULP_CLASS_HID_4da1,
+       .class_hid = BNXT_ULP_CLASS_HID_c1be,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 25773222912,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 4298386432,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8735,24 +8844,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
        },
        [415] = {
-       .class_hid = BNXT_ULP_CLASS_HID_153d,
+       .class_hid = BNXT_ULP_CLASS_HID_890e,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 27918601216,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 4833152000,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8760,23 +8868,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
        },
        [416] = {
-       .class_hid = BNXT_ULP_CLASS_HID_45a5,
+       .class_hid = BNXT_ULP_CLASS_HID_ba8e,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 27918609408,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 4833160192,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8784,24 +8891,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
        },
        [417] = {
-       .class_hid = BNXT_ULP_CLASS_HID_3bb9,
+       .class_hid = BNXT_ULP_CLASS_HID_dfaa,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 27920698368,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 4835249152,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8809,24 +8915,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
        },
        [418] = {
-       .class_hid = BNXT_ULP_CLASS_HID_55a1,
+       .class_hid = BNXT_ULP_CLASS_HID_c93a,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 27920706560,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 4835257344,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8834,25 +8939,24 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
        },
        [419] = {
-       .class_hid = BNXT_ULP_CLASS_HID_193d,
+       .class_hid = BNXT_ULP_CLASS_HID_b11a,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 30066084864,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 5370022912,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8860,23 +8964,22 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
        },
        [420] = {
-       .class_hid = BNXT_ULP_CLASS_HID_4b25,
+       .class_hid = BNXT_ULP_CLASS_HID_8b4e,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 30066093056,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 5370031104,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8884,24 +8987,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
        },
        [421] = {
-       .class_hid = BNXT_ULP_CLASS_HID_2e39,
+       .class_hid = BNXT_ULP_CLASS_HID_c79e,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 30068182016,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 5372120064,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8909,24 +9011,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
        },
        [422] = {
-       .class_hid = BNXT_ULP_CLASS_HID_5921,
+       .class_hid = BNXT_ULP_CLASS_HID_d9da,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 30068190208,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 5372128256,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8934,25 +9035,24 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
        },
        [423] = {
-       .class_hid = BNXT_ULP_CLASS_HID_213d,
+       .class_hid = BNXT_ULP_CLASS_HID_b88e,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 32213568512,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 5906893824,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8960,24 +9060,23 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
        },
        [424] = {
-       .class_hid = BNXT_ULP_CLASS_HID_5125,
+       .class_hid = BNXT_ULP_CLASS_HID_ea0e,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 32213576704,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 5906902016,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -8985,25 +9084,24 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
        },
        [425] = {
-       .class_hid = BNXT_ULP_CLASS_HID_3739,
+       .class_hid = BNXT_ULP_CLASS_HID_cf0a,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 32215665664,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 5908990976,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -9011,25 +9109,24 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
        },
        [426] = {
-       .class_hid = BNXT_ULP_CLASS_HID_093d,
+       .class_hid = BNXT_ULP_CLASS_HID_c18e,
        .class_tid = 2,
-       .hdr_sig_id = 2,
-       .flow_sig_id = 32215673856,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 5908999168,
        .flow_pattern_id = 1,
        .app_sig = 0,
        .hdr_sig = { .bits =
@@ -9037,25 +9134,3496 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_O_UDP |
                BNXT_ULP_HDR_BIT_T_VXLAN |
                BNXT_ULP_HDR_BIT_I_ETH |
-               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
                BNXT_ULP_HDR_BIT_I_TCP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT |
-               BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT }
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
+       },
+       [427] = {
+       .class_hid = BNXT_ULP_CLASS_HID_a94a,
+       .class_tid = 2,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 6443764736,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
+       },
+       [428] = {
+       .class_hid = BNXT_ULP_CLASS_HID_daca,
+       .class_tid = 2,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 6443772928,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
+       },
+       [429] = {
+       .class_hid = BNXT_ULP_CLASS_HID_ffee,
+       .class_tid = 2,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 6445861888,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
+       },
+       [430] = {
+       .class_hid = BNXT_ULP_CLASS_HID_e96e,
+       .class_tid = 2,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 6445870080,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
+       },
+       [431] = {
+       .class_hid = BNXT_ULP_CLASS_HID_910e,
+       .class_tid = 2,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 6980635648,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
+       },
+       [432] = {
+       .class_hid = BNXT_ULP_CLASS_HID_c28e,
+       .class_tid = 2,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 6980643840,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
+       },
+       [433] = {
+       .class_hid = BNXT_ULP_CLASS_HID_e7aa,
+       .class_tid = 2,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 6982732800,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
+       },
+       [434] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d12a,
+       .class_tid = 2,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 6982740992,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
+       },
+       [435] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d8ca,
+       .class_tid = 2,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 7517506560,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
+       },
+       [436] = {
+       .class_hid = BNXT_ULP_CLASS_HID_930e,
+       .class_tid = 2,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 7517514752,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
+       },
+       [437] = {
+       .class_hid = BNXT_ULP_CLASS_HID_ef4e,
+       .class_tid = 2,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 7519603712,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
+       },
+       [438] = {
+       .class_hid = BNXT_ULP_CLASS_HID_e18a,
+       .class_tid = 2,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 7519611904,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
+       },
+       [439] = {
+       .class_hid = BNXT_ULP_CLASS_HID_c08e,
+       .class_tid = 2,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 8054377472,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
+       },
+       [440] = {
+       .class_hid = BNXT_ULP_CLASS_HID_9a8a,
+       .class_tid = 2,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 8054385664,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
+       },
+       [441] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d70a,
+       .class_tid = 2,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 8056474624,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
+       },
+       [442] = {
+       .class_hid = BNXT_ULP_CLASS_HID_e90e,
+       .class_tid = 2,
+       .hdr_sig_id = 3,
+       .flow_sig_id = 8056482816,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT }
+       },
+       [443] = {
+       .class_hid = BNXT_ULP_CLASS_HID_edd9,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 1313792,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC }
+       },
+       [444] = {
+       .class_hid = BNXT_ULP_CLASS_HID_a61d,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 1321984,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC }
+       },
+       [445] = {
+       .class_hid = BNXT_ULP_CLASS_HID_c571,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 3410944,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC }
+       },
+       [446] = {
+       .class_hid = BNXT_ULP_CLASS_HID_f4f9,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 3419136,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC }
+       },
+       [447] = {
+       .class_hid = BNXT_ULP_CLASS_HID_9c45,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 2148797440,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR }
+       },
+       [448] = {
+       .class_hid = BNXT_ULP_CLASS_HID_cfcd,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 2148805632,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR }
+       },
+       [449] = {
+       .class_hid = BNXT_ULP_CLASS_HID_ed21,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 2150894592,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR }
+       },
+       [450] = {
+       .class_hid = BNXT_ULP_CLASS_HID_dca9,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 2150902784,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR }
+       },
+       [451] = {
+       .class_hid = BNXT_ULP_CLASS_HID_80b5,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 4296281088,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+       },
+       [452] = {
+       .class_hid = BNXT_ULP_CLASS_HID_b235,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 4296289280,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+       },
+       [453] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d111,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 4298378240,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+       },
+       [454] = {
+       .class_hid = BNXT_ULP_CLASS_HID_c091,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 4298386432,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+       },
+       [455] = {
+       .class_hid = BNXT_ULP_CLASS_HID_a865,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 6443764736,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+       },
+       [456] = {
+       .class_hid = BNXT_ULP_CLASS_HID_dbe5,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 6443772928,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+       },
+       [457] = {
+       .class_hid = BNXT_ULP_CLASS_HID_fec1,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 6445861888,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+       },
+       [458] = {
+       .class_hid = BNXT_ULP_CLASS_HID_e841,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 6445870080,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+       },
+       [459] = {
+       .class_hid = BNXT_ULP_CLASS_HID_8e85,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 8591248384,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT }
+       },
+       [460] = {
+       .class_hid = BNXT_ULP_CLASS_HID_b80d,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 8591256576,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT }
+       },
+       [461] = {
+       .class_hid = BNXT_ULP_CLASS_HID_df65,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 8593345536,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT }
+       },
+       [462] = {
+       .class_hid = BNXT_ULP_CLASS_HID_ceed,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 8593353728,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT }
+       },
+       [463] = {
+       .class_hid = BNXT_ULP_CLASS_HID_9645,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 10738732032,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT }
+       },
+       [464] = {
+       .class_hid = BNXT_ULP_CLASS_HID_c1cd,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 10738740224,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT }
+       },
+       [465] = {
+       .class_hid = BNXT_ULP_CLASS_HID_e725,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 10740829184,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT }
+       },
+       [466] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d6ad,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 10740837376,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT }
+       },
+       [467] = {
+       .class_hid = BNXT_ULP_CLASS_HID_9aa5,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 12886215680,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT }
+       },
+       [468] = {
+       .class_hid = BNXT_ULP_CLASS_HID_b425,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 12886223872,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT }
+       },
+       [469] = {
+       .class_hid = BNXT_ULP_CLASS_HID_eb05,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 12888312832,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT }
+       },
+       [470] = {
+       .class_hid = BNXT_ULP_CLASS_HID_da85,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 12888321024,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT }
+       },
+       [471] = {
+       .class_hid = BNXT_ULP_CLASS_HID_a265,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 15033699328,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT }
+       },
+       [472] = {
+       .class_hid = BNXT_ULP_CLASS_HID_dde5,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 15033707520,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT }
+       },
+       [473] = {
+       .class_hid = BNXT_ULP_CLASS_HID_f0c5,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 15035796480,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT }
+       },
+       [474] = {
+       .class_hid = BNXT_ULP_CLASS_HID_e245,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 15035804672,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT }
+       },
+       [475] = {
+       .class_hid = BNXT_ULP_CLASS_HID_8b8f,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 17181182976,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [476] = {
+       .class_hid = BNXT_ULP_CLASS_HID_a517,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 17181191168,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [477] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d86b,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 17183280128,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [478] = {
+       .class_hid = BNXT_ULP_CLASS_HID_cbf3,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 17183288320,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [479] = {
+       .class_hid = BNXT_ULP_CLASS_HID_934f,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 19328666624,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [480] = {
+       .class_hid = BNXT_ULP_CLASS_HID_c2c7,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 19328674816,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [481] = {
+       .class_hid = BNXT_ULP_CLASS_HID_e02b,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 19330763776,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [482] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d3a3,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 19330771968,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [483] = {
+       .class_hid = BNXT_ULP_CLASS_HID_87a7,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 21476150272,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [484] = {
+       .class_hid = BNXT_ULP_CLASS_HID_b137,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 21476158464,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [485] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d403,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 21478247424,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [486] = {
+       .class_hid = BNXT_ULP_CLASS_HID_c793,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 21478255616,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [487] = {
+       .class_hid = BNXT_ULP_CLASS_HID_af67,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 23623633920,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [488] = {
+       .class_hid = BNXT_ULP_CLASS_HID_dee7,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 23623642112,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [489] = {
+       .class_hid = BNXT_ULP_CLASS_HID_fdc3,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 23625731072,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [490] = {
+       .class_hid = BNXT_ULP_CLASS_HID_ef43,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 23625739264,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [491] = {
+       .class_hid = BNXT_ULP_CLASS_HID_8dbf,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 25771117568,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [492] = {
+       .class_hid = BNXT_ULP_CLASS_HID_bf07,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 25771125760,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [493] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d21f,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 25773214720,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [494] = {
+       .class_hid = BNXT_ULP_CLASS_HID_cde7,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 25773222912,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [495] = {
+       .class_hid = BNXT_ULP_CLASS_HID_956f,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 27918601216,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [496] = {
+       .class_hid = BNXT_ULP_CLASS_HID_c4c7,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 27918609408,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [497] = {
+       .class_hid = BNXT_ULP_CLASS_HID_fbcf,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 27920698368,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [498] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d5a7,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 27920706560,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [499] = {
+       .class_hid = BNXT_ULP_CLASS_HID_9957,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 30066084864,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [500] = {
+       .class_hid = BNXT_ULP_CLASS_HID_cb27,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 30066093056,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [501] = {
+       .class_hid = BNXT_ULP_CLASS_HID_ee37,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 30068182016,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [502] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d987,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 30068190208,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [503] = {
+       .class_hid = BNXT_ULP_CLASS_HID_a107,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 32213568512,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [504] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d0e7,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 32213576704,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [505] = {
+       .class_hid = BNXT_ULP_CLASS_HID_f7e7,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 32215665664,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [506] = {
+       .class_hid = BNXT_ULP_CLASS_HID_c827,
+       .class_tid = 2,
+       .hdr_sig_id = 4,
+       .flow_sig_id = 32215673856,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV4 |
+               BNXT_ULP_HDR_BIT_I_TCP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT |
+               BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT }
+       },
+       [507] = {
+       .class_hid = BNXT_ULP_CLASS_HID_f76a,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 1313792,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC }
+       },
+       [508] = {
+       .class_hid = BNXT_ULP_CLASS_HID_bcae,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 1321984,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC }
+       },
+       [509] = {
+       .class_hid = BNXT_ULP_CLASS_HID_dfc2,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 3410944,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC }
+       },
+       [510] = {
+       .class_hid = BNXT_ULP_CLASS_HID_ee4a,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 3419136,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC }
+       },
+       [511] = {
+       .class_hid = BNXT_ULP_CLASS_HID_cf26,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 538184704,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR }
+       },
+       [512] = {
+       .class_hid = BNXT_ULP_CLASS_HID_b53a,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 538192896,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR }
+       },
+       [513] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d79e,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 540281856,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR }
+       },
+       [514] = {
+       .class_hid = BNXT_ULP_CLASS_HID_e606,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 540290048,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR }
+       },
+       [515] = {
+       .class_hid = BNXT_ULP_CLASS_HID_be86,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 1075055616,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR }
+       },
+       [516] = {
+       .class_hid = BNXT_ULP_CLASS_HID_cd0e,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 1075063808,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR }
+       },
+       [517] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d042,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 1077152768,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR }
+       },
+       [518] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d586,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 1077160960,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR }
+       },
+       [519] = {
+       .class_hid = BNXT_ULP_CLASS_HID_b712,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 1611926528,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR }
+       },
+       [520] = {
+       .class_hid = BNXT_ULP_CLASS_HID_c59a,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 1611934720,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR }
+       },
+       [521] = {
+       .class_hid = BNXT_ULP_CLASS_HID_e81e,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 1614023680,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR }
+       },
+       [522] = {
+       .class_hid = BNXT_ULP_CLASS_HID_f686,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 1614031872,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR }
+       },
+       [523] = {
+       .class_hid = BNXT_ULP_CLASS_HID_86f6,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 2148797440,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT }
+       },
+       [524] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d57e,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 2148805632,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT }
+       },
+       [525] = {
+       .class_hid = BNXT_ULP_CLASS_HID_f792,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 2150894592,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT }
+       },
+       [526] = {
+       .class_hid = BNXT_ULP_CLASS_HID_c61a,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 2150902784,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT }
+       },
+       [527] = {
+       .class_hid = BNXT_ULP_CLASS_HID_9eb2,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 2685668352,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT }
+       },
+       [528] = {
+       .class_hid = BNXT_ULP_CLASS_HID_ad3a,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 2685676544,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT }
+       },
+       [529] = {
+       .class_hid = BNXT_ULP_CLASS_HID_f01e,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 2687765504,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT }
+       },
+       [530] = {
+       .class_hid = BNXT_ULP_CLASS_HID_de96,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 2687773696,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT }
+       },
+       [531] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d756,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 3222539264,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT }
+       },
+       [532] = {
+       .class_hid = BNXT_ULP_CLASS_HID_9c9a,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 3222547456,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT }
+       },
+       [533] = {
+       .class_hid = BNXT_ULP_CLASS_HID_c812,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 3224636416,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT }
+       },
+       [534] = {
+       .class_hid = BNXT_ULP_CLASS_HID_ce56,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 3224644608,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT }
+       },
+       [535] = {
+       .class_hid = BNXT_ULP_CLASS_HID_af12,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 3759410176,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT }
+       },
+       [536] = {
+       .class_hid = BNXT_ULP_CLASS_HID_9516,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 3759418368,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT }
+       },
+       [537] = {
+       .class_hid = BNXT_ULP_CLASS_HID_c09e,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 3761507328,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT }
+       },
+       [538] = {
+       .class_hid = BNXT_ULP_CLASS_HID_c612,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 3761515520,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT }
+       },
+       [539] = {
+       .class_hid = BNXT_ULP_CLASS_HID_9a06,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 4296281088,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [540] = {
+       .class_hid = BNXT_ULP_CLASS_HID_a886,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 4296289280,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [541] = {
+       .class_hid = BNXT_ULP_CLASS_HID_cba2,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 4298378240,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [542] = {
+       .class_hid = BNXT_ULP_CLASS_HID_da22,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 4298386432,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [543] = {
+       .class_hid = BNXT_ULP_CLASS_HID_9292,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 4833152000,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [544] = {
+       .class_hid = BNXT_ULP_CLASS_HID_a112,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 4833160192,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [545] = {
+       .class_hid = BNXT_ULP_CLASS_HID_c436,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 4835249152,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [546] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d2a6,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 4835257344,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [547] = {
+       .class_hid = BNXT_ULP_CLASS_HID_aa86,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 5370022912,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [548] = {
+       .class_hid = BNXT_ULP_CLASS_HID_90d2,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 5370031104,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [549] = {
+       .class_hid = BNXT_ULP_CLASS_HID_dc02,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 5372120064,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [550] = {
+       .class_hid = BNXT_ULP_CLASS_HID_c246,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 5372128256,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [551] = {
+       .class_hid = BNXT_ULP_CLASS_HID_a312,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 5906893824,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [552] = {
+       .class_hid = BNXT_ULP_CLASS_HID_f192,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 5906902016,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [553] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d496,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 5908990976,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [554] = {
+       .class_hid = BNXT_ULP_CLASS_HID_da12,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 5908999168,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [555] = {
+       .class_hid = BNXT_ULP_CLASS_HID_b2d6,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 6443764736,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [556] = {
+       .class_hid = BNXT_ULP_CLASS_HID_c156,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 6443772928,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [557] = {
+       .class_hid = BNXT_ULP_CLASS_HID_e472,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 6445861888,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [558] = {
+       .class_hid = BNXT_ULP_CLASS_HID_f2f2,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 6445870080,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [559] = {
+       .class_hid = BNXT_ULP_CLASS_HID_8a92,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 6980635648,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [560] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d912,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 6980643840,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [561] = {
+       .class_hid = BNXT_ULP_CLASS_HID_fc36,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 6982732800,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [562] = {
+       .class_hid = BNXT_ULP_CLASS_HID_cab6,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 6982740992,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [563] = {
+       .class_hid = BNXT_ULP_CLASS_HID_c356,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 7517506560,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [564] = {
+       .class_hid = BNXT_ULP_CLASS_HID_8892,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 7517514752,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [565] = {
+       .class_hid = BNXT_ULP_CLASS_HID_f4d2,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 7519603712,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [566] = {
+       .class_hid = BNXT_ULP_CLASS_HID_fa16,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 7519611904,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [567] = {
+       .class_hid = BNXT_ULP_CLASS_HID_db12,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 8054377472,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [568] = {
+       .class_hid = BNXT_ULP_CLASS_HID_8116,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 8054385664,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [569] = {
+       .class_hid = BNXT_ULP_CLASS_HID_cc96,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 8056474624,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
+       },
+       [570] = {
+       .class_hid = BNXT_ULP_CLASS_HID_f292,
+       .class_tid = 2,
+       .hdr_sig_id = 5,
+       .flow_sig_id = 8056482816,
+       .flow_pattern_id = 1,
+       .app_sig = 0,
+       .hdr_sig = { .bits =
+               BNXT_ULP_HDR_BIT_O_IPV4 |
+               BNXT_ULP_HDR_BIT_O_UDP |
+               BNXT_ULP_HDR_BIT_T_VXLAN |
+               BNXT_ULP_HDR_BIT_I_ETH |
+               BNXT_ULP_HDR_BIT_I_IPV6 |
+               BNXT_ULP_HDR_BIT_I_UDP |
+               BNXT_ULP_FLOW_DIR_BITMASK_ING },
+       .field_sig = { .bits =
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT }
        },
-       [427] = {
-       .class_hid = BNXT_ULP_CLASS_HID_684d,
+       [571] = {
+       .class_hid = BNXT_ULP_CLASS_HID_e84d,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 1313792,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9068,15 +12636,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC }
        },
-       [428] = {
-       .class_hid = BNXT_ULP_CLASS_HID_2389,
+       [572] = {
+       .class_hid = BNXT_ULP_CLASS_HID_a389,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 1321984,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9089,16 +12657,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC }
        },
-       [429] = {
-       .class_hid = BNXT_ULP_CLASS_HID_00e5,
+       [573] = {
+       .class_hid = BNXT_ULP_CLASS_HID_c0e5,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 3410944,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9111,16 +12679,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC }
        },
-       [430] = {
-       .class_hid = BNXT_ULP_CLASS_HID_316d,
+       [574] = {
+       .class_hid = BNXT_ULP_CLASS_HID_f16d,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 3419136,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9133,17 +12701,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC }
        },
-       [431] = {
-       .class_hid = BNXT_ULP_CLASS_HID_18c1,
+       [575] = {
+       .class_hid = BNXT_ULP_CLASS_HID_99d1,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 2148797440,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9156,16 +12724,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR }
        },
-       [432] = {
-       .class_hid = BNXT_ULP_CLASS_HID_4a49,
+       [576] = {
+       .class_hid = BNXT_ULP_CLASS_HID_ca59,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 2148805632,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9178,17 +12746,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR }
        },
-       [433] = {
-       .class_hid = BNXT_ULP_CLASS_HID_28a5,
+       [577] = {
+       .class_hid = BNXT_ULP_CLASS_HID_e8b5,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 2150894592,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9201,17 +12769,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR }
        },
-       [434] = {
-       .class_hid = BNXT_ULP_CLASS_HID_582d,
+       [578] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d93d,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 2150902784,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9224,18 +12792,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR }
        },
-       [435] = {
-       .class_hid = BNXT_ULP_CLASS_HID_05a1,
+       [579] = {
+       .class_hid = BNXT_ULP_CLASS_HID_8521,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 4296281088,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9248,16 +12816,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR }
        },
-       [436] = {
-       .class_hid = BNXT_ULP_CLASS_HID_37a9,
+       [580] = {
+       .class_hid = BNXT_ULP_CLASS_HID_b7a1,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 4296289280,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9270,17 +12838,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR }
        },
-       [437] = {
-       .class_hid = BNXT_ULP_CLASS_HID_1485,
+       [581] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d485,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 4298378240,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9293,17 +12861,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR }
        },
-       [438] = {
-       .class_hid = BNXT_ULP_CLASS_HID_458d,
+       [582] = {
+       .class_hid = BNXT_ULP_CLASS_HID_c505,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 4298386432,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9316,18 +12884,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR }
        },
-       [439] = {
-       .class_hid = BNXT_ULP_CLASS_HID_2ce1,
+       [583] = {
+       .class_hid = BNXT_ULP_CLASS_HID_adf1,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 6443764736,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9340,17 +12908,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR }
        },
-       [440] = {
-       .class_hid = BNXT_ULP_CLASS_HID_5ee9,
+       [584] = {
+       .class_hid = BNXT_ULP_CLASS_HID_de71,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 6443772928,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9363,18 +12931,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR }
        },
-       [441] = {
-       .class_hid = BNXT_ULP_CLASS_HID_3ac5,
+       [585] = {
+       .class_hid = BNXT_ULP_CLASS_HID_fb55,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 6445861888,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9387,18 +12955,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR }
        },
-       [442] = {
-       .class_hid = BNXT_ULP_CLASS_HID_6ccd,
+       [586] = {
+       .class_hid = BNXT_ULP_CLASS_HID_edd5,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 6445870080,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9411,19 +12979,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR }
        },
-       [443] = {
-       .class_hid = BNXT_ULP_CLASS_HID_0b11,
+       [587] = {
+       .class_hid = BNXT_ULP_CLASS_HID_8b11,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 8591248384,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9436,16 +13004,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT }
        },
-       [444] = {
-       .class_hid = BNXT_ULP_CLASS_HID_3d99,
+       [588] = {
+       .class_hid = BNXT_ULP_CLASS_HID_bd99,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 8591256576,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9458,17 +13026,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT }
        },
-       [445] = {
-       .class_hid = BNXT_ULP_CLASS_HID_1ab5,
+       [589] = {
+       .class_hid = BNXT_ULP_CLASS_HID_daf1,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 8593345536,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9481,17 +13049,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT }
        },
-       [446] = {
-       .class_hid = BNXT_ULP_CLASS_HID_4b3d,
+       [590] = {
+       .class_hid = BNXT_ULP_CLASS_HID_cb79,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 8593353728,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9504,18 +13072,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT }
        },
-       [447] = {
-       .class_hid = BNXT_ULP_CLASS_HID_1291,
+       [591] = {
+       .class_hid = BNXT_ULP_CLASS_HID_93d1,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 10738732032,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9528,17 +13096,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT }
        },
-       [448] = {
-       .class_hid = BNXT_ULP_CLASS_HID_4419,
+       [592] = {
+       .class_hid = BNXT_ULP_CLASS_HID_c459,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 10738740224,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9551,18 +13119,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT }
        },
-       [449] = {
-       .class_hid = BNXT_ULP_CLASS_HID_22b5,
+       [593] = {
+       .class_hid = BNXT_ULP_CLASS_HID_e2b1,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 10740829184,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9575,18 +13143,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT }
        },
-       [450] = {
-       .class_hid = BNXT_ULP_CLASS_HID_523d,
+       [594] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d339,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 10740837376,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9599,19 +13167,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT }
        },
-       [451] = {
-       .class_hid = BNXT_ULP_CLASS_HID_1fb1,
+       [595] = {
+       .class_hid = BNXT_ULP_CLASS_HID_9f31,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 12886215680,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9624,17 +13192,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT }
        },
-       [452] = {
-       .class_hid = BNXT_ULP_CLASS_HID_31b9,
+       [596] = {
+       .class_hid = BNXT_ULP_CLASS_HID_b1b1,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 12886223872,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9647,18 +13215,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT }
        },
-       [453] = {
-       .class_hid = BNXT_ULP_CLASS_HID_2e95,
+       [597] = {
+       .class_hid = BNXT_ULP_CLASS_HID_ee91,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 12888312832,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9671,18 +13239,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT }
        },
-       [454] = {
-       .class_hid = BNXT_ULP_CLASS_HID_5f9d,
+       [598] = {
+       .class_hid = BNXT_ULP_CLASS_HID_df11,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 12888321024,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9695,19 +13263,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT }
        },
-       [455] = {
-       .class_hid = BNXT_ULP_CLASS_HID_26b1,
+       [599] = {
+       .class_hid = BNXT_ULP_CLASS_HID_a7f1,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 15033699328,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9720,18 +13288,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT }
        },
-       [456] = {
-       .class_hid = BNXT_ULP_CLASS_HID_58b9,
+       [600] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d871,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 15033707520,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9744,19 +13312,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT }
        },
-       [457] = {
-       .class_hid = BNXT_ULP_CLASS_HID_3495,
+       [601] = {
+       .class_hid = BNXT_ULP_CLASS_HID_f551,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 15035796480,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9769,19 +13337,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT }
        },
-       [458] = {
-       .class_hid = BNXT_ULP_CLASS_HID_669d,
+       [602] = {
+       .class_hid = BNXT_ULP_CLASS_HID_e7d1,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 15035804672,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9794,20 +13362,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT }
        },
-       [459] = {
-       .class_hid = BNXT_ULP_CLASS_HID_0e39,
+       [603] = {
+       .class_hid = BNXT_ULP_CLASS_HID_8e1b,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 17181182976,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9820,16 +13388,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [460] = {
-       .class_hid = BNXT_ULP_CLASS_HID_20a1,
+       [604] = {
+       .class_hid = BNXT_ULP_CLASS_HID_a083,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 17181191168,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9842,17 +13410,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [461] = {
-       .class_hid = BNXT_ULP_CLASS_HID_1dfd,
+       [605] = {
+       .class_hid = BNXT_ULP_CLASS_HID_ddff,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 17183280128,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9865,17 +13433,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [462] = {
-       .class_hid = BNXT_ULP_CLASS_HID_4e65,
+       [606] = {
+       .class_hid = BNXT_ULP_CLASS_HID_ce67,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 17183288320,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9888,18 +13456,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [463] = {
-       .class_hid = BNXT_ULP_CLASS_HID_16f9,
+       [607] = {
+       .class_hid = BNXT_ULP_CLASS_HID_96db,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 19328666624,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9912,17 +13480,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [464] = {
-       .class_hid = BNXT_ULP_CLASS_HID_4661,
+       [608] = {
+       .class_hid = BNXT_ULP_CLASS_HID_c753,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 19328674816,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9935,18 +13503,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [465] = {
-       .class_hid = BNXT_ULP_CLASS_HID_24bd,
+       [609] = {
+       .class_hid = BNXT_ULP_CLASS_HID_e5bf,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 19330763776,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9959,18 +13527,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [466] = {
-       .class_hid = BNXT_ULP_CLASS_HID_5625,
+       [610] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d637,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 19330771968,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -9983,19 +13551,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [467] = {
-       .class_hid = BNXT_ULP_CLASS_HID_02b9,
+       [611] = {
+       .class_hid = BNXT_ULP_CLASS_HID_8233,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 21476150272,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -10008,17 +13576,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [468] = {
-       .class_hid = BNXT_ULP_CLASS_HID_34a1,
+       [612] = {
+       .class_hid = BNXT_ULP_CLASS_HID_b4a3,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 21476158464,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -10031,18 +13599,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [469] = {
-       .class_hid = BNXT_ULP_CLASS_HID_11bd,
+       [613] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d197,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 21478247424,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -10055,18 +13623,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [470] = {
-       .class_hid = BNXT_ULP_CLASS_HID_42a5,
+       [614] = {
+       .class_hid = BNXT_ULP_CLASS_HID_c207,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 21478255616,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -10079,19 +13647,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [471] = {
-       .class_hid = BNXT_ULP_CLASS_HID_2af9,
+       [615] = {
+       .class_hid = BNXT_ULP_CLASS_HID_aaf3,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 23623633920,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -10104,18 +13672,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [472] = {
-       .class_hid = BNXT_ULP_CLASS_HID_5ae1,
+       [616] = {
+       .class_hid = BNXT_ULP_CLASS_HID_db73,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 23623642112,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -10128,19 +13696,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [473] = {
-       .class_hid = BNXT_ULP_CLASS_HID_38fd,
+       [617] = {
+       .class_hid = BNXT_ULP_CLASS_HID_f857,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 23625731072,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -10153,19 +13721,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [474] = {
-       .class_hid = BNXT_ULP_CLASS_HID_6ae5,
+       [618] = {
+       .class_hid = BNXT_ULP_CLASS_HID_ead7,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 23625739264,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -10178,20 +13746,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [475] = {
-       .class_hid = BNXT_ULP_CLASS_HID_0829,
+       [619] = {
+       .class_hid = BNXT_ULP_CLASS_HID_882b,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 25771117568,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -10204,17 +13772,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [476] = {
-       .class_hid = BNXT_ULP_CLASS_HID_3ab1,
+       [620] = {
+       .class_hid = BNXT_ULP_CLASS_HID_ba93,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 25771125760,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -10227,18 +13795,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [477] = {
-       .class_hid = BNXT_ULP_CLASS_HID_17ad,
+       [621] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d78b,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 25773214720,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -10251,18 +13819,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [478] = {
-       .class_hid = BNXT_ULP_CLASS_HID_4835,
+       [622] = {
+       .class_hid = BNXT_ULP_CLASS_HID_c873,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 25773222912,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -10275,19 +13843,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [479] = {
-       .class_hid = BNXT_ULP_CLASS_HID_10a9,
+       [623] = {
+       .class_hid = BNXT_ULP_CLASS_HID_90fb,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 27918601216,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -10300,18 +13868,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [480] = {
-       .class_hid = BNXT_ULP_CLASS_HID_4031,
+       [624] = {
+       .class_hid = BNXT_ULP_CLASS_HID_c153,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 27918609408,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -10324,19 +13892,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [481] = {
-       .class_hid = BNXT_ULP_CLASS_HID_3e2d,
+       [625] = {
+       .class_hid = BNXT_ULP_CLASS_HID_fe5b,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 27920698368,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -10349,19 +13917,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [482] = {
-       .class_hid = BNXT_ULP_CLASS_HID_5035,
+       [626] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d033,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 27920706560,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -10374,20 +13942,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [483] = {
-       .class_hid = BNXT_ULP_CLASS_HID_1ca9,
+       [627] = {
+       .class_hid = BNXT_ULP_CLASS_HID_9cc3,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 30066084864,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -10400,18 +13968,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [484] = {
-       .class_hid = BNXT_ULP_CLASS_HID_4eb1,
+       [628] = {
+       .class_hid = BNXT_ULP_CLASS_HID_ceb3,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 30066093056,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -10424,19 +13992,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [485] = {
-       .class_hid = BNXT_ULP_CLASS_HID_2bad,
+       [629] = {
+       .class_hid = BNXT_ULP_CLASS_HID_eba3,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 30068182016,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -10449,19 +14017,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [486] = {
-       .class_hid = BNXT_ULP_CLASS_HID_5cb5,
+       [630] = {
+       .class_hid = BNXT_ULP_CLASS_HID_dc13,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 30068190208,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -10474,20 +14042,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [487] = {
-       .class_hid = BNXT_ULP_CLASS_HID_24a9,
+       [631] = {
+       .class_hid = BNXT_ULP_CLASS_HID_a493,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 32213568512,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -10500,19 +14068,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [488] = {
-       .class_hid = BNXT_ULP_CLASS_HID_54b1,
+       [632] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d573,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 32213576704,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -10525,20 +14093,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [489] = {
-       .class_hid = BNXT_ULP_CLASS_HID_32ad,
+       [633] = {
+       .class_hid = BNXT_ULP_CLASS_HID_f273,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 32215665664,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -10551,20 +14119,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [490] = {
-       .class_hid = BNXT_ULP_CLASS_HID_0ca9,
+       [634] = {
+       .class_hid = BNXT_ULP_CLASS_HID_cdb3,
        .class_tid = 2,
-       .hdr_sig_id = 3,
+       .hdr_sig_id = 6,
        .flow_sig_id = 32215673856,
        .flow_pattern_id = 1,
        .app_sig = 0,
@@ -10577,21 +14145,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_UDP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT |
-               BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT }
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT |
+               BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT }
        },
-       [491] = {
-       .class_hid = BNXT_ULP_CLASS_HID_7f35,
+       [635] = {
+       .class_hid = BNXT_ULP_CLASS_HID_ff35,
        .class_tid = 2,
-       .hdr_sig_id = 4,
+       .hdr_sig_id = 7,
        .flow_sig_id = 1313792,
        .flow_pattern_id = 2,
        .app_sig = 0,
@@ -10604,15 +14172,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_ICMP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC }
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC }
        },
-       [492] = {
-       .class_hid = BNXT_ULP_CLASS_HID_34f1,
+       [636] = {
+       .class_hid = BNXT_ULP_CLASS_HID_b4f1,
        .class_tid = 2,
-       .hdr_sig_id = 4,
+       .hdr_sig_id = 7,
        .flow_sig_id = 1321984,
        .flow_pattern_id = 2,
        .app_sig = 0,
@@ -10625,16 +14193,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_ICMP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC }
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC }
        },
-       [493] = {
-       .class_hid = BNXT_ULP_CLASS_HID_179d,
+       [637] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d79d,
        .class_tid = 2,
-       .hdr_sig_id = 4,
+       .hdr_sig_id = 7,
        .flow_sig_id = 3410944,
        .flow_pattern_id = 2,
        .app_sig = 0,
@@ -10647,16 +14215,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_ICMP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC }
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC }
        },
-       [494] = {
-       .class_hid = BNXT_ULP_CLASS_HID_2615,
+       [638] = {
+       .class_hid = BNXT_ULP_CLASS_HID_e615,
        .class_tid = 2,
-       .hdr_sig_id = 4,
+       .hdr_sig_id = 7,
        .flow_sig_id = 3419136,
        .flow_pattern_id = 2,
        .app_sig = 0,
@@ -10669,17 +14237,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_ICMP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC }
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC }
        },
-       [495] = {
-       .class_hid = BNXT_ULP_CLASS_HID_0fb9,
+       [639] = {
+       .class_hid = BNXT_ULP_CLASS_HID_8ea9,
        .class_tid = 2,
-       .hdr_sig_id = 4,
+       .hdr_sig_id = 7,
        .flow_sig_id = 2148797440,
        .flow_pattern_id = 2,
        .app_sig = 0,
@@ -10692,16 +14260,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_ICMP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR }
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_SRC_ADDR }
        },
-       [496] = {
-       .class_hid = BNXT_ULP_CLASS_HID_5d31,
+       [640] = {
+       .class_hid = BNXT_ULP_CLASS_HID_dd21,
        .class_tid = 2,
-       .hdr_sig_id = 4,
+       .hdr_sig_id = 7,
        .flow_sig_id = 2148805632,
        .flow_pattern_id = 2,
        .app_sig = 0,
@@ -10714,17 +14282,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_ICMP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR }
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_SRC_ADDR }
        },
-       [497] = {
-       .class_hid = BNXT_ULP_CLASS_HID_3fdd,
+       [641] = {
+       .class_hid = BNXT_ULP_CLASS_HID_ffcd,
        .class_tid = 2,
-       .hdr_sig_id = 4,
+       .hdr_sig_id = 7,
        .flow_sig_id = 2150894592,
        .flow_pattern_id = 2,
        .app_sig = 0,
@@ -10737,17 +14305,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_ICMP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR }
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_SRC_ADDR }
        },
-       [498] = {
-       .class_hid = BNXT_ULP_CLASS_HID_4f55,
+       [642] = {
+       .class_hid = BNXT_ULP_CLASS_HID_ce45,
        .class_tid = 2,
-       .hdr_sig_id = 4,
+       .hdr_sig_id = 7,
        .flow_sig_id = 2150902784,
        .flow_pattern_id = 2,
        .app_sig = 0,
@@ -10760,18 +14328,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_ICMP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR }
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_SRC_ADDR }
        },
-       [499] = {
-       .class_hid = BNXT_ULP_CLASS_HID_12d9,
+       [643] = {
+       .class_hid = BNXT_ULP_CLASS_HID_9259,
        .class_tid = 2,
-       .hdr_sig_id = 4,
+       .hdr_sig_id = 7,
        .flow_sig_id = 4296281088,
        .flow_pattern_id = 2,
        .app_sig = 0,
@@ -10784,16 +14352,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_ICMP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_DST_ADDR }
        },
-       [500] = {
-       .class_hid = BNXT_ULP_CLASS_HID_20d1,
+       [644] = {
+       .class_hid = BNXT_ULP_CLASS_HID_a0d9,
        .class_tid = 2,
-       .hdr_sig_id = 4,
+       .hdr_sig_id = 7,
        .flow_sig_id = 4296289280,
        .flow_pattern_id = 2,
        .app_sig = 0,
@@ -10806,17 +14374,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_ICMP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_DST_ADDR }
        },
-       [501] = {
-       .class_hid = BNXT_ULP_CLASS_HID_03fd,
+       [645] = {
+       .class_hid = BNXT_ULP_CLASS_HID_c3fd,
        .class_tid = 2,
-       .hdr_sig_id = 4,
+       .hdr_sig_id = 7,
        .flow_sig_id = 4298378240,
        .flow_pattern_id = 2,
        .app_sig = 0,
@@ -10829,17 +14397,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_ICMP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_DST_ADDR }
        },
-       [502] = {
-       .class_hid = BNXT_ULP_CLASS_HID_52f5,
+       [646] = {
+       .class_hid = BNXT_ULP_CLASS_HID_d27d,
        .class_tid = 2,
-       .hdr_sig_id = 4,
+       .hdr_sig_id = 7,
        .flow_sig_id = 4298386432,
        .flow_pattern_id = 2,
        .app_sig = 0,
@@ -10852,18 +14420,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_ICMP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_DST_ADDR }
        },
-       [503] = {
-       .class_hid = BNXT_ULP_CLASS_HID_3b99,
+       [647] = {
+       .class_hid = BNXT_ULP_CLASS_HID_ba89,
        .class_tid = 2,
-       .hdr_sig_id = 4,
+       .hdr_sig_id = 7,
        .flow_sig_id = 6443764736,
        .flow_pattern_id = 2,
        .app_sig = 0,
@@ -10876,17 +14444,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_ICMP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_DST_ADDR }
        },
-       [504] = {
-       .class_hid = BNXT_ULP_CLASS_HID_4991,
+       [648] = {
+       .class_hid = BNXT_ULP_CLASS_HID_c909,
        .class_tid = 2,
-       .hdr_sig_id = 4,
+       .hdr_sig_id = 7,
        .flow_sig_id = 6443772928,
        .flow_pattern_id = 2,
        .app_sig = 0,
@@ -10899,18 +14467,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_ICMP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_DST_ADDR }
        },
-       [505] = {
-       .class_hid = BNXT_ULP_CLASS_HID_2dbd,
+       [649] = {
+       .class_hid = BNXT_ULP_CLASS_HID_ec2d,
        .class_tid = 2,
-       .hdr_sig_id = 4,
+       .hdr_sig_id = 7,
        .flow_sig_id = 6445861888,
        .flow_pattern_id = 2,
        .app_sig = 0,
@@ -10923,18 +14491,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_ICMP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_DST_ADDR }
        },
-       [506] = {
-       .class_hid = BNXT_ULP_CLASS_HID_7bb5,
+       [650] = {
+       .class_hid = BNXT_ULP_CLASS_HID_faad,
        .class_tid = 2,
-       .hdr_sig_id = 4,
+       .hdr_sig_id = 7,
        .flow_sig_id = 6445870080,
        .flow_pattern_id = 2,
        .app_sig = 0,
@@ -10947,16 +14515,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HDR_BIT_I_ICMP |
                BNXT_ULP_FLOW_DIR_BITMASK_ING },
        .field_sig = { .bits =
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_O_IPV4_DST_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
-               BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
-               BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
+               BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_SRC_ADDR |
+               BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_DST_ADDR }
        },
-       [507] = {
+       [651] = {
        .class_hid = BNXT_ULP_CLASS_HID_34c6,
        .class_tid = 3,
        .hdr_sig_id = 0,
@@ -10971,7 +14539,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_0_BITMASK_O_ETH_SMAC |
                BNXT_ULP_HF_0_3_0_BITMASK_O_IPV6_DST_ADDR }
        },
-       [508] = {
+       [652] = {
        .class_hid = BNXT_ULP_CLASS_HID_0c22,
        .class_tid = 3,
        .hdr_sig_id = 0,
@@ -10987,7 +14555,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_0_BITMASK_O_ETH_SMAC |
                BNXT_ULP_HF_0_3_0_BITMASK_O_IPV6_DST_ADDR }
        },
-       [509] = {
+       [653] = {
        .class_hid = BNXT_ULP_CLASS_HID_1cbe,
        .class_tid = 3,
        .hdr_sig_id = 0,
@@ -11003,7 +14571,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_0_BITMASK_O_IPV6_SRC_ADDR |
                BNXT_ULP_HF_0_3_0_BITMASK_O_IPV6_DST_ADDR }
        },
-       [510] = {
+       [654] = {
        .class_hid = BNXT_ULP_CLASS_HID_179a,
        .class_tid = 3,
        .hdr_sig_id = 0,
@@ -11020,7 +14588,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_0_BITMASK_O_IPV6_SRC_ADDR |
                BNXT_ULP_HF_0_3_0_BITMASK_O_IPV6_DST_ADDR }
        },
-       [511] = {
+       [655] = {
        .class_hid = BNXT_ULP_CLASS_HID_59be,
        .class_tid = 3,
        .hdr_sig_id = 1,
@@ -11035,7 +14603,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_1_BITMASK_O_ETH_SMAC |
                BNXT_ULP_HF_0_3_1_BITMASK_O_IPV4_DST_ADDR }
        },
-       [512] = {
+       [656] = {
        .class_hid = BNXT_ULP_CLASS_HID_515a,
        .class_tid = 3,
        .hdr_sig_id = 1,
@@ -11051,7 +14619,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_1_BITMASK_O_ETH_SMAC |
                BNXT_ULP_HF_0_3_1_BITMASK_O_IPV4_DST_ADDR }
        },
-       [513] = {
+       [657] = {
        .class_hid = BNXT_ULP_CLASS_HID_1c72,
        .class_tid = 3,
        .hdr_sig_id = 1,
@@ -11067,7 +14635,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_1_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_3_1_BITMASK_O_IPV4_DST_ADDR }
        },
-       [514] = {
+       [658] = {
        .class_hid = BNXT_ULP_CLASS_HID_171e,
        .class_tid = 3,
        .hdr_sig_id = 1,
@@ -11084,7 +14652,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_1_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_3_1_BITMASK_O_IPV4_DST_ADDR }
        },
-       [515] = {
+       [659] = {
        .class_hid = BNXT_ULP_CLASS_HID_19c8,
        .class_tid = 3,
        .hdr_sig_id = 2,
@@ -11100,7 +14668,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_2_BITMASK_O_ETH_SMAC |
                BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_DST_ADDR }
        },
-       [516] = {
+       [660] = {
        .class_hid = BNXT_ULP_CLASS_HID_112c,
        .class_tid = 3,
        .hdr_sig_id = 2,
@@ -11117,7 +14685,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_2_BITMASK_O_ETH_SMAC |
                BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_DST_ADDR }
        },
-       [517] = {
+       [661] = {
        .class_hid = BNXT_ULP_CLASS_HID_4d68,
        .class_tid = 3,
        .hdr_sig_id = 2,
@@ -11134,7 +14702,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_2_BITMASK_OO_VLAN_VID |
                BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_DST_ADDR }
        },
-       [518] = {
+       [662] = {
        .class_hid = BNXT_ULP_CLASS_HID_444c,
        .class_tid = 3,
        .hdr_sig_id = 2,
@@ -11152,7 +14720,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_2_BITMASK_OO_VLAN_VID |
                BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_DST_ADDR }
        },
-       [519] = {
+       [663] = {
        .class_hid = BNXT_ULP_CLASS_HID_0e8c,
        .class_tid = 3,
        .hdr_sig_id = 2,
@@ -11169,7 +14737,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_SRC_ADDR |
                BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_DST_ADDR }
        },
-       [520] = {
+       [664] = {
        .class_hid = BNXT_ULP_CLASS_HID_09e0,
        .class_tid = 3,
        .hdr_sig_id = 2,
@@ -11187,7 +14755,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_SRC_ADDR |
                BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_DST_ADDR }
        },
-       [521] = {
+       [665] = {
        .class_hid = BNXT_ULP_CLASS_HID_1af0,
        .class_tid = 3,
        .hdr_sig_id = 2,
@@ -11205,7 +14773,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_SRC_ADDR |
                BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_DST_ADDR }
        },
-       [522] = {
+       [666] = {
        .class_hid = BNXT_ULP_CLASS_HID_15d4,
        .class_tid = 3,
        .hdr_sig_id = 2,
@@ -11224,7 +14792,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_SRC_ADDR |
                BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_DST_ADDR }
        },
-       [523] = {
+       [667] = {
        .class_hid = BNXT_ULP_CLASS_HID_1dd0,
        .class_tid = 3,
        .hdr_sig_id = 3,
@@ -11240,7 +14808,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_3_BITMASK_O_ETH_SMAC |
                BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_DST_ADDR }
        },
-       [524] = {
+       [668] = {
        .class_hid = BNXT_ULP_CLASS_HID_14f4,
        .class_tid = 3,
        .hdr_sig_id = 3,
@@ -11257,7 +14825,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_3_BITMASK_O_ETH_SMAC |
                BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_DST_ADDR }
        },
-       [525] = {
+       [669] = {
        .class_hid = BNXT_ULP_CLASS_HID_70b0,
        .class_tid = 3,
        .hdr_sig_id = 3,
@@ -11274,7 +14842,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_3_BITMASK_OO_VLAN_VID |
                BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_DST_ADDR }
        },
-       [526] = {
+       [670] = {
        .class_hid = BNXT_ULP_CLASS_HID_4854,
        .class_tid = 3,
        .hdr_sig_id = 3,
@@ -11292,7 +14860,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_3_BITMASK_OO_VLAN_VID |
                BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_DST_ADDR }
        },
-       [527] = {
+       [671] = {
        .class_hid = BNXT_ULP_CLASS_HID_3dd4,
        .class_tid = 3,
        .hdr_sig_id = 3,
@@ -11309,7 +14877,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_DST_ADDR }
        },
-       [528] = {
+       [672] = {
        .class_hid = BNXT_ULP_CLASS_HID_34f8,
        .class_tid = 3,
        .hdr_sig_id = 3,
@@ -11327,7 +14895,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_DST_ADDR }
        },
-       [529] = {
+       [673] = {
        .class_hid = BNXT_ULP_CLASS_HID_09e8,
        .class_tid = 3,
        .hdr_sig_id = 3,
@@ -11345,7 +14913,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_DST_ADDR }
        },
-       [530] = {
+       [674] = {
        .class_hid = BNXT_ULP_CLASS_HID_008c,
        .class_tid = 3,
        .hdr_sig_id = 3,
@@ -11364,7 +14932,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_DST_ADDR }
        },
-       [531] = {
+       [675] = {
        .class_hid = BNXT_ULP_CLASS_HID_34e6,
        .class_tid = 3,
        .hdr_sig_id = 4,
@@ -11380,7 +14948,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_4_BITMASK_O_ETH_SMAC |
                BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR }
        },
-       [532] = {
+       [676] = {
        .class_hid = BNXT_ULP_CLASS_HID_0c02,
        .class_tid = 3,
        .hdr_sig_id = 4,
@@ -11397,7 +14965,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_4_BITMASK_O_ETH_SMAC |
                BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR }
        },
-       [533] = {
+       [677] = {
        .class_hid = BNXT_ULP_CLASS_HID_1c9e,
        .class_tid = 3,
        .hdr_sig_id = 4,
@@ -11414,7 +14982,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_SRC_ADDR |
                BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR }
        },
-       [534] = {
+       [678] = {
        .class_hid = BNXT_ULP_CLASS_HID_17ba,
        .class_tid = 3,
        .hdr_sig_id = 4,
@@ -11432,7 +15000,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_SRC_ADDR |
                BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR }
        },
-       [535] = {
+       [679] = {
        .class_hid = BNXT_ULP_CLASS_HID_429e,
        .class_tid = 3,
        .hdr_sig_id = 4,
@@ -11449,7 +15017,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_SRC_PORT }
        },
-       [536] = {
+       [680] = {
        .class_hid = BNXT_ULP_CLASS_HID_5dba,
        .class_tid = 3,
        .hdr_sig_id = 4,
@@ -11467,7 +15035,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_SRC_PORT }
        },
-       [537] = {
+       [681] = {
        .class_hid = BNXT_ULP_CLASS_HID_2a16,
        .class_tid = 3,
        .hdr_sig_id = 4,
@@ -11485,7 +15053,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_SRC_PORT }
        },
-       [538] = {
+       [682] = {
        .class_hid = BNXT_ULP_CLASS_HID_2532,
        .class_tid = 3,
        .hdr_sig_id = 4,
@@ -11504,7 +15072,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_SRC_PORT }
        },
-       [539] = {
+       [683] = {
        .class_hid = BNXT_ULP_CLASS_HID_2da2,
        .class_tid = 3,
        .hdr_sig_id = 4,
@@ -11521,7 +15089,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_DST_PORT }
        },
-       [540] = {
+       [684] = {
        .class_hid = BNXT_ULP_CLASS_HID_24fe,
        .class_tid = 3,
        .hdr_sig_id = 4,
@@ -11539,7 +15107,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_DST_PORT }
        },
-       [541] = {
+       [685] = {
        .class_hid = BNXT_ULP_CLASS_HID_355a,
        .class_tid = 3,
        .hdr_sig_id = 4,
@@ -11557,7 +15125,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_DST_PORT }
        },
-       [542] = {
+       [686] = {
        .class_hid = BNXT_ULP_CLASS_HID_0c76,
        .class_tid = 3,
        .hdr_sig_id = 4,
@@ -11576,7 +15144,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_DST_PORT }
        },
-       [543] = {
+       [687] = {
        .class_hid = BNXT_ULP_CLASS_HID_13e6,
        .class_tid = 3,
        .hdr_sig_id = 4,
@@ -11594,7 +15162,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_DST_PORT }
        },
-       [544] = {
+       [688] = {
        .class_hid = BNXT_ULP_CLASS_HID_7276,
        .class_tid = 3,
        .hdr_sig_id = 4,
@@ -11613,7 +15181,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_DST_PORT }
        },
-       [545] = {
+       [689] = {
        .class_hid = BNXT_ULP_CLASS_HID_42d2,
        .class_tid = 3,
        .hdr_sig_id = 4,
@@ -11632,7 +15200,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_DST_PORT }
        },
-       [546] = {
+       [690] = {
        .class_hid = BNXT_ULP_CLASS_HID_5dee,
        .class_tid = 3,
        .hdr_sig_id = 4,
@@ -11652,7 +15220,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_DST_PORT }
        },
-       [547] = {
+       [691] = {
        .class_hid = BNXT_ULP_CLASS_HID_59de,
        .class_tid = 3,
        .hdr_sig_id = 5,
@@ -11668,7 +15236,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_5_BITMASK_O_ETH_SMAC |
                BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR }
        },
-       [548] = {
+       [692] = {
        .class_hid = BNXT_ULP_CLASS_HID_513a,
        .class_tid = 3,
        .hdr_sig_id = 5,
@@ -11685,7 +15253,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_5_BITMASK_O_ETH_SMAC |
                BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR }
        },
-       [549] = {
+       [693] = {
        .class_hid = BNXT_ULP_CLASS_HID_1c12,
        .class_tid = 3,
        .hdr_sig_id = 5,
@@ -11702,7 +15270,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR }
        },
-       [550] = {
+       [694] = {
        .class_hid = BNXT_ULP_CLASS_HID_177e,
        .class_tid = 3,
        .hdr_sig_id = 5,
@@ -11720,7 +15288,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR }
        },
-       [551] = {
+       [695] = {
        .class_hid = BNXT_ULP_CLASS_HID_0e92,
        .class_tid = 3,
        .hdr_sig_id = 5,
@@ -11737,7 +15305,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_SRC_PORT }
        },
-       [552] = {
+       [696] = {
        .class_hid = BNXT_ULP_CLASS_HID_09fe,
        .class_tid = 3,
        .hdr_sig_id = 5,
@@ -11755,7 +15323,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_SRC_PORT }
        },
-       [553] = {
+       [697] = {
        .class_hid = BNXT_ULP_CLASS_HID_5c1a,
        .class_tid = 3,
        .hdr_sig_id = 5,
@@ -11773,7 +15341,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_SRC_PORT }
        },
-       [554] = {
+       [698] = {
        .class_hid = BNXT_ULP_CLASS_HID_5746,
        .class_tid = 3,
        .hdr_sig_id = 5,
@@ -11792,7 +15360,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_SRC_PORT }
        },
-       [555] = {
+       [699] = {
        .class_hid = BNXT_ULP_CLASS_HID_79da,
        .class_tid = 3,
        .hdr_sig_id = 5,
@@ -11809,7 +15377,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_DST_PORT }
        },
-       [556] = {
+       [700] = {
        .class_hid = BNXT_ULP_CLASS_HID_7106,
        .class_tid = 3,
        .hdr_sig_id = 5,
@@ -11827,7 +15395,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_DST_PORT }
        },
-       [557] = {
+       [701] = {
        .class_hid = BNXT_ULP_CLASS_HID_3c1e,
        .class_tid = 3,
        .hdr_sig_id = 5,
@@ -11845,7 +15413,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_DST_PORT }
        },
-       [558] = {
+       [702] = {
        .class_hid = BNXT_ULP_CLASS_HID_377a,
        .class_tid = 3,
        .hdr_sig_id = 5,
@@ -11864,7 +15432,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_DST_PORT }
        },
-       [559] = {
+       [703] = {
        .class_hid = BNXT_ULP_CLASS_HID_2e9e,
        .class_tid = 3,
        .hdr_sig_id = 5,
@@ -11882,7 +15450,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_DST_PORT }
        },
-       [560] = {
+       [704] = {
        .class_hid = BNXT_ULP_CLASS_HID_29fa,
        .class_tid = 3,
        .hdr_sig_id = 5,
@@ -11901,7 +15469,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_DST_PORT }
        },
-       [561] = {
+       [705] = {
        .class_hid = BNXT_ULP_CLASS_HID_14d2,
        .class_tid = 3,
        .hdr_sig_id = 5,
@@ -11920,7 +15488,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_DST_PORT }
        },
-       [562] = {
+       [706] = {
        .class_hid = BNXT_ULP_CLASS_HID_7742,
        .class_tid = 3,
        .hdr_sig_id = 5,
@@ -11940,7 +15508,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_DST_PORT }
        },
-       [563] = {
+       [707] = {
        .class_hid = BNXT_ULP_CLASS_HID_3706,
        .class_tid = 3,
        .hdr_sig_id = 6,
@@ -11956,7 +15524,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_6_BITMASK_O_ETH_SMAC |
                BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR }
        },
-       [564] = {
+       [708] = {
        .class_hid = BNXT_ULP_CLASS_HID_0fe2,
        .class_tid = 3,
        .hdr_sig_id = 6,
@@ -11973,7 +15541,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_6_BITMASK_O_ETH_SMAC |
                BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR }
        },
-       [565] = {
+       [709] = {
        .class_hid = BNXT_ULP_CLASS_HID_1f7e,
        .class_tid = 3,
        .hdr_sig_id = 6,
@@ -11990,7 +15558,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_SRC_ADDR |
                BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR }
        },
-       [566] = {
+       [710] = {
        .class_hid = BNXT_ULP_CLASS_HID_145a,
        .class_tid = 3,
        .hdr_sig_id = 6,
@@ -12008,7 +15576,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_SRC_ADDR |
                BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR }
        },
-       [567] = {
+       [711] = {
        .class_hid = BNXT_ULP_CLASS_HID_417e,
        .class_tid = 3,
        .hdr_sig_id = 6,
@@ -12025,7 +15593,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_SRC_PORT }
        },
-       [568] = {
+       [712] = {
        .class_hid = BNXT_ULP_CLASS_HID_5e5a,
        .class_tid = 3,
        .hdr_sig_id = 6,
@@ -12043,7 +15611,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_SRC_PORT }
        },
-       [569] = {
+       [713] = {
        .class_hid = BNXT_ULP_CLASS_HID_29f6,
        .class_tid = 3,
        .hdr_sig_id = 6,
@@ -12061,7 +15629,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_SRC_PORT }
        },
-       [570] = {
+       [714] = {
        .class_hid = BNXT_ULP_CLASS_HID_26d2,
        .class_tid = 3,
        .hdr_sig_id = 6,
@@ -12080,7 +15648,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_SRC_PORT }
        },
-       [571] = {
+       [715] = {
        .class_hid = BNXT_ULP_CLASS_HID_2e42,
        .class_tid = 3,
        .hdr_sig_id = 6,
@@ -12097,7 +15665,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_DST_PORT }
        },
-       [572] = {
+       [716] = {
        .class_hid = BNXT_ULP_CLASS_HID_271e,
        .class_tid = 3,
        .hdr_sig_id = 6,
@@ -12115,7 +15683,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_DST_PORT }
        },
-       [573] = {
+       [717] = {
        .class_hid = BNXT_ULP_CLASS_HID_36ba,
        .class_tid = 3,
        .hdr_sig_id = 6,
@@ -12133,7 +15701,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_DST_PORT }
        },
-       [574] = {
+       [718] = {
        .class_hid = BNXT_ULP_CLASS_HID_0f96,
        .class_tid = 3,
        .hdr_sig_id = 6,
@@ -12152,7 +15720,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_DST_PORT }
        },
-       [575] = {
+       [719] = {
        .class_hid = BNXT_ULP_CLASS_HID_1006,
        .class_tid = 3,
        .hdr_sig_id = 6,
@@ -12170,7 +15738,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_DST_PORT }
        },
-       [576] = {
+       [720] = {
        .class_hid = BNXT_ULP_CLASS_HID_7196,
        .class_tid = 3,
        .hdr_sig_id = 6,
@@ -12189,7 +15757,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_DST_PORT }
        },
-       [577] = {
+       [721] = {
        .class_hid = BNXT_ULP_CLASS_HID_4132,
        .class_tid = 3,
        .hdr_sig_id = 6,
@@ -12208,7 +15776,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_DST_PORT }
        },
-       [578] = {
+       [722] = {
        .class_hid = BNXT_ULP_CLASS_HID_5e0e,
        .class_tid = 3,
        .hdr_sig_id = 6,
@@ -12228,7 +15796,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_DST_PORT }
        },
-       [579] = {
+       [723] = {
        .class_hid = BNXT_ULP_CLASS_HID_59fe,
        .class_tid = 3,
        .hdr_sig_id = 7,
@@ -12244,7 +15812,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_7_BITMASK_O_ETH_SMAC |
                BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR }
        },
-       [580] = {
+       [724] = {
        .class_hid = BNXT_ULP_CLASS_HID_511a,
        .class_tid = 3,
        .hdr_sig_id = 7,
@@ -12261,7 +15829,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_7_BITMASK_O_ETH_SMAC |
                BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR }
        },
-       [581] = {
+       [725] = {
        .class_hid = BNXT_ULP_CLASS_HID_1c32,
        .class_tid = 3,
        .hdr_sig_id = 7,
@@ -12278,7 +15846,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR }
        },
-       [582] = {
+       [726] = {
        .class_hid = BNXT_ULP_CLASS_HID_175e,
        .class_tid = 3,
        .hdr_sig_id = 7,
@@ -12296,7 +15864,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR }
        },
-       [583] = {
+       [727] = {
        .class_hid = BNXT_ULP_CLASS_HID_0eb2,
        .class_tid = 3,
        .hdr_sig_id = 7,
@@ -12313,7 +15881,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_SRC_PORT }
        },
-       [584] = {
+       [728] = {
        .class_hid = BNXT_ULP_CLASS_HID_09de,
        .class_tid = 3,
        .hdr_sig_id = 7,
@@ -12331,7 +15899,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_SRC_PORT }
        },
-       [585] = {
+       [729] = {
        .class_hid = BNXT_ULP_CLASS_HID_5c3a,
        .class_tid = 3,
        .hdr_sig_id = 7,
@@ -12349,7 +15917,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_SRC_PORT }
        },
-       [586] = {
+       [730] = {
        .class_hid = BNXT_ULP_CLASS_HID_5766,
        .class_tid = 3,
        .hdr_sig_id = 7,
@@ -12368,7 +15936,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_SRC_PORT }
        },
-       [587] = {
+       [731] = {
        .class_hid = BNXT_ULP_CLASS_HID_79fa,
        .class_tid = 3,
        .hdr_sig_id = 7,
@@ -12385,7 +15953,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_DST_PORT }
        },
-       [588] = {
+       [732] = {
        .class_hid = BNXT_ULP_CLASS_HID_7126,
        .class_tid = 3,
        .hdr_sig_id = 7,
@@ -12403,7 +15971,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_DST_PORT }
        },
-       [589] = {
+       [733] = {
        .class_hid = BNXT_ULP_CLASS_HID_3c3e,
        .class_tid = 3,
        .hdr_sig_id = 7,
@@ -12421,7 +15989,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_DST_PORT }
        },
-       [590] = {
+       [734] = {
        .class_hid = BNXT_ULP_CLASS_HID_375a,
        .class_tid = 3,
        .hdr_sig_id = 7,
@@ -12440,7 +16008,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_DST_PORT }
        },
-       [591] = {
+       [735] = {
        .class_hid = BNXT_ULP_CLASS_HID_2ebe,
        .class_tid = 3,
        .hdr_sig_id = 7,
@@ -12458,7 +16026,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_DST_PORT }
        },
-       [592] = {
+       [736] = {
        .class_hid = BNXT_ULP_CLASS_HID_29da,
        .class_tid = 3,
        .hdr_sig_id = 7,
@@ -12477,7 +16045,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_DST_PORT }
        },
-       [593] = {
+       [737] = {
        .class_hid = BNXT_ULP_CLASS_HID_14f2,
        .class_tid = 3,
        .hdr_sig_id = 7,
@@ -12496,7 +16064,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_DST_PORT }
        },
-       [594] = {
+       [738] = {
        .class_hid = BNXT_ULP_CLASS_HID_7762,
        .class_tid = 3,
        .hdr_sig_id = 7,
@@ -12516,7 +16084,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_DST_PORT }
        },
-       [595] = {
+       [739] = {
        .class_hid = BNXT_ULP_CLASS_HID_19e8,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -12533,7 +16101,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_ETH_SMAC |
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR }
        },
-       [596] = {
+       [740] = {
        .class_hid = BNXT_ULP_CLASS_HID_110c,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -12551,7 +16119,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_ETH_SMAC |
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR }
        },
-       [597] = {
+       [741] = {
        .class_hid = BNXT_ULP_CLASS_HID_4d48,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -12569,7 +16137,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_OO_VLAN_VID |
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR }
        },
-       [598] = {
+       [742] = {
        .class_hid = BNXT_ULP_CLASS_HID_446c,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -12588,7 +16156,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_OO_VLAN_VID |
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR }
        },
-       [599] = {
+       [743] = {
        .class_hid = BNXT_ULP_CLASS_HID_0eac,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -12606,7 +16174,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_SRC_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR }
        },
-       [600] = {
+       [744] = {
        .class_hid = BNXT_ULP_CLASS_HID_09c0,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -12625,7 +16193,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_SRC_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR }
        },
-       [601] = {
+       [745] = {
        .class_hid = BNXT_ULP_CLASS_HID_1ad0,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -12644,7 +16212,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_SRC_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR }
        },
-       [602] = {
+       [746] = {
        .class_hid = BNXT_ULP_CLASS_HID_15f4,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -12664,7 +16232,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_SRC_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR }
        },
-       [603] = {
+       [747] = {
        .class_hid = BNXT_ULP_CLASS_HID_39ec,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -12682,7 +16250,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT }
        },
-       [604] = {
+       [748] = {
        .class_hid = BNXT_ULP_CLASS_HID_3100,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -12701,7 +16269,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT }
        },
-       [605] = {
+       [749] = {
        .class_hid = BNXT_ULP_CLASS_HID_0210,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -12720,7 +16288,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT }
        },
-       [606] = {
+       [750] = {
        .class_hid = BNXT_ULP_CLASS_HID_1d34,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -12740,7 +16308,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT }
        },
-       [607] = {
+       [751] = {
        .class_hid = BNXT_ULP_CLASS_HID_2ea0,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -12759,7 +16327,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT }
        },
-       [608] = {
+       [752] = {
        .class_hid = BNXT_ULP_CLASS_HID_29c4,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -12779,7 +16347,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT }
        },
-       [609] = {
+       [753] = {
        .class_hid = BNXT_ULP_CLASS_HID_3ad4,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -12799,7 +16367,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT }
        },
-       [610] = {
+       [754] = {
        .class_hid = BNXT_ULP_CLASS_HID_35e8,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -12820,7 +16388,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT }
        },
-       [611] = {
+       [755] = {
        .class_hid = BNXT_ULP_CLASS_HID_5d80,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -12838,7 +16406,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT }
        },
-       [612] = {
+       [756] = {
        .class_hid = BNXT_ULP_CLASS_HID_54a4,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -12857,7 +16425,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT }
        },
-       [613] = {
+       [757] = {
        .class_hid = BNXT_ULP_CLASS_HID_29b4,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -12876,7 +16444,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT }
        },
-       [614] = {
+       [758] = {
        .class_hid = BNXT_ULP_CLASS_HID_20c8,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -12896,7 +16464,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT }
        },
-       [615] = {
+       [759] = {
        .class_hid = BNXT_ULP_CLASS_HID_7244,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -12915,7 +16483,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT }
        },
-       [616] = {
+       [760] = {
        .class_hid = BNXT_ULP_CLASS_HID_4d98,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -12935,7 +16503,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT }
        },
-       [617] = {
+       [761] = {
        .class_hid = BNXT_ULP_CLASS_HID_5e68,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -12955,7 +16523,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT }
        },
-       [618] = {
+       [762] = {
        .class_hid = BNXT_ULP_CLASS_HID_598c,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -12976,7 +16544,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT }
        },
-       [619] = {
+       [763] = {
        .class_hid = BNXT_ULP_CLASS_HID_1248,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -12995,7 +16563,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT }
        },
-       [620] = {
+       [764] = {
        .class_hid = BNXT_ULP_CLASS_HID_74d8,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -13015,7 +16583,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT }
        },
-       [621] = {
+       [765] = {
        .class_hid = BNXT_ULP_CLASS_HID_49a8,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -13035,7 +16603,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT }
        },
-       [622] = {
+       [766] = {
        .class_hid = BNXT_ULP_CLASS_HID_40cc,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -13056,7 +16624,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT }
        },
-       [623] = {
+       [767] = {
        .class_hid = BNXT_ULP_CLASS_HID_0b0c,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -13076,7 +16644,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT }
        },
-       [624] = {
+       [768] = {
        .class_hid = BNXT_ULP_CLASS_HID_0220,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -13097,7 +16665,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT }
        },
-       [625] = {
+       [769] = {
        .class_hid = BNXT_ULP_CLASS_HID_1730,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -13118,7 +16686,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT }
        },
-       [626] = {
+       [770] = {
        .class_hid = BNXT_ULP_CLASS_HID_7980,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -13140,7 +16708,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT }
        },
-       [627] = {
+       [771] = {
        .class_hid = BNXT_ULP_CLASS_HID_1db0,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13157,7 +16725,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_ETH_SMAC |
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR }
        },
-       [628] = {
+       [772] = {
        .class_hid = BNXT_ULP_CLASS_HID_1494,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13175,7 +16743,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_ETH_SMAC |
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR }
        },
-       [629] = {
+       [773] = {
        .class_hid = BNXT_ULP_CLASS_HID_70d0,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13193,7 +16761,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_OO_VLAN_VID |
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR }
        },
-       [630] = {
+       [774] = {
        .class_hid = BNXT_ULP_CLASS_HID_4834,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13212,7 +16780,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_OO_VLAN_VID |
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR }
        },
-       [631] = {
+       [775] = {
        .class_hid = BNXT_ULP_CLASS_HID_3db4,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13230,7 +16798,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR }
        },
-       [632] = {
+       [776] = {
        .class_hid = BNXT_ULP_CLASS_HID_3498,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13249,7 +16817,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR }
        },
-       [633] = {
+       [777] = {
        .class_hid = BNXT_ULP_CLASS_HID_0988,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13268,7 +16836,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR }
        },
-       [634] = {
+       [778] = {
        .class_hid = BNXT_ULP_CLASS_HID_00ec,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13288,7 +16856,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR }
        },
-       [635] = {
+       [779] = {
        .class_hid = BNXT_ULP_CLASS_HID_3f44,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13306,7 +16874,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT }
        },
-       [636] = {
+       [780] = {
        .class_hid = BNXT_ULP_CLASS_HID_36a8,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13325,7 +16893,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT }
        },
-       [637] = {
+       [781] = {
        .class_hid = BNXT_ULP_CLASS_HID_0b58,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13344,7 +16912,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT }
        },
-       [638] = {
+       [782] = {
        .class_hid = BNXT_ULP_CLASS_HID_02bc,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13364,7 +16932,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT }
        },
-       [639] = {
+       [783] = {
        .class_hid = BNXT_ULP_CLASS_HID_5f48,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13383,7 +16951,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT }
        },
-       [640] = {
+       [784] = {
        .class_hid = BNXT_ULP_CLASS_HID_56ac,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13403,7 +16971,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT }
        },
-       [641] = {
+       [785] = {
        .class_hid = BNXT_ULP_CLASS_HID_2b5c,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13423,7 +16991,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT }
        },
-       [642] = {
+       [786] = {
        .class_hid = BNXT_ULP_CLASS_HID_2280,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13444,7 +17012,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT }
        },
-       [643] = {
+       [787] = {
        .class_hid = BNXT_ULP_CLASS_HID_4000,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13462,7 +17030,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT }
        },
-       [644] = {
+       [788] = {
        .class_hid = BNXT_ULP_CLASS_HID_5b64,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13481,7 +17049,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT }
        },
-       [645] = {
+       [789] = {
        .class_hid = BNXT_ULP_CLASS_HID_2c14,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13500,7 +17068,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT }
        },
-       [646] = {
+       [790] = {
        .class_hid = BNXT_ULP_CLASS_HID_2778,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13520,7 +17088,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT }
        },
-       [647] = {
+       [791] = {
        .class_hid = BNXT_ULP_CLASS_HID_18f8,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13539,7 +17107,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT }
        },
-       [648] = {
+       [792] = {
        .class_hid = BNXT_ULP_CLASS_HID_13dc,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13559,7 +17127,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT }
        },
-       [649] = {
+       [793] = {
        .class_hid = BNXT_ULP_CLASS_HID_4c18,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13579,7 +17147,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT }
        },
-       [650] = {
+       [794] = {
        .class_hid = BNXT_ULP_CLASS_HID_477c,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13600,7 +17168,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT }
        },
-       [651] = {
+       [795] = {
        .class_hid = BNXT_ULP_CLASS_HID_1a88,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13619,7 +17187,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT }
        },
-       [652] = {
+       [796] = {
        .class_hid = BNXT_ULP_CLASS_HID_15ec,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13639,7 +17207,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT }
        },
-       [653] = {
+       [797] = {
        .class_hid = BNXT_ULP_CLASS_HID_4e28,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13659,7 +17227,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT }
        },
-       [654] = {
+       [798] = {
        .class_hid = BNXT_ULP_CLASS_HID_490c,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13680,7 +17248,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT }
        },
-       [655] = {
+       [799] = {
        .class_hid = BNXT_ULP_CLASS_HID_3a8c,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13700,7 +17268,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT }
        },
-       [656] = {
+       [800] = {
        .class_hid = BNXT_ULP_CLASS_HID_35f0,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13721,7 +17289,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT }
        },
-       [657] = {
+       [801] = {
        .class_hid = BNXT_ULP_CLASS_HID_06e0,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13742,7 +17310,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT }
        },
-       [658] = {
+       [802] = {
        .class_hid = BNXT_ULP_CLASS_HID_01c4,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -13764,7 +17332,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT }
        },
-       [659] = {
+       [803] = {
        .class_hid = BNXT_ULP_CLASS_HID_1a08,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -13781,7 +17349,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_ETH_SMAC |
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR }
        },
-       [660] = {
+       [804] = {
        .class_hid = BNXT_ULP_CLASS_HID_12ec,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -13799,7 +17367,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_ETH_SMAC |
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR }
        },
-       [661] = {
+       [805] = {
        .class_hid = BNXT_ULP_CLASS_HID_4ea8,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -13817,7 +17385,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_OO_VLAN_VID |
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR }
        },
-       [662] = {
+       [806] = {
        .class_hid = BNXT_ULP_CLASS_HID_478c,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -13836,7 +17404,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_OO_VLAN_VID |
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR }
        },
-       [663] = {
+       [807] = {
        .class_hid = BNXT_ULP_CLASS_HID_0d4c,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -13854,7 +17422,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_SRC_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR }
        },
-       [664] = {
+       [808] = {
        .class_hid = BNXT_ULP_CLASS_HID_0a20,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -13873,7 +17441,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_SRC_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR }
        },
-       [665] = {
+       [809] = {
        .class_hid = BNXT_ULP_CLASS_HID_1930,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -13892,7 +17460,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_SRC_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR }
        },
-       [666] = {
+       [810] = {
        .class_hid = BNXT_ULP_CLASS_HID_1614,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -13912,7 +17480,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_SRC_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR }
        },
-       [667] = {
+       [811] = {
        .class_hid = BNXT_ULP_CLASS_HID_3a0c,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -13930,7 +17498,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT }
        },
-       [668] = {
+       [812] = {
        .class_hid = BNXT_ULP_CLASS_HID_32e0,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -13949,7 +17517,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT }
        },
-       [669] = {
+       [813] = {
        .class_hid = BNXT_ULP_CLASS_HID_01f0,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -13968,7 +17536,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT }
        },
-       [670] = {
+       [814] = {
        .class_hid = BNXT_ULP_CLASS_HID_1ed4,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -13988,7 +17556,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT }
        },
-       [671] = {
+       [815] = {
        .class_hid = BNXT_ULP_CLASS_HID_2d40,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -14007,7 +17575,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT }
        },
-       [672] = {
+       [816] = {
        .class_hid = BNXT_ULP_CLASS_HID_2a24,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -14027,7 +17595,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT }
        },
-       [673] = {
+       [817] = {
        .class_hid = BNXT_ULP_CLASS_HID_3934,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -14047,7 +17615,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT }
        },
-       [674] = {
+       [818] = {
        .class_hid = BNXT_ULP_CLASS_HID_3608,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -14068,7 +17636,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT }
        },
-       [675] = {
+       [819] = {
        .class_hid = BNXT_ULP_CLASS_HID_5e60,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -14086,7 +17654,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT }
        },
-       [676] = {
+       [820] = {
        .class_hid = BNXT_ULP_CLASS_HID_5744,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -14105,7 +17673,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT }
        },
-       [677] = {
+       [821] = {
        .class_hid = BNXT_ULP_CLASS_HID_2a54,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -14124,7 +17692,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT }
        },
-       [678] = {
+       [822] = {
        .class_hid = BNXT_ULP_CLASS_HID_2328,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -14144,7 +17712,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT }
        },
-       [679] = {
+       [823] = {
        .class_hid = BNXT_ULP_CLASS_HID_71a4,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -14163,7 +17731,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT }
        },
-       [680] = {
+       [824] = {
        .class_hid = BNXT_ULP_CLASS_HID_4e78,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -14183,7 +17751,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT }
        },
-       [681] = {
+       [825] = {
        .class_hid = BNXT_ULP_CLASS_HID_5d88,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -14203,7 +17771,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT }
        },
-       [682] = {
+       [826] = {
        .class_hid = BNXT_ULP_CLASS_HID_5a6c,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -14224,7 +17792,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT }
        },
-       [683] = {
+       [827] = {
        .class_hid = BNXT_ULP_CLASS_HID_11a8,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -14243,7 +17811,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT }
        },
-       [684] = {
+       [828] = {
        .class_hid = BNXT_ULP_CLASS_HID_7738,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -14263,7 +17831,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT }
        },
-       [685] = {
+       [829] = {
        .class_hid = BNXT_ULP_CLASS_HID_4a48,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -14283,7 +17851,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT }
        },
-       [686] = {
+       [830] = {
        .class_hid = BNXT_ULP_CLASS_HID_432c,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -14304,7 +17872,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT }
        },
-       [687] = {
+       [831] = {
        .class_hid = BNXT_ULP_CLASS_HID_08ec,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -14324,7 +17892,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT }
        },
-       [688] = {
+       [832] = {
        .class_hid = BNXT_ULP_CLASS_HID_01c0,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -14345,7 +17913,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT }
        },
-       [689] = {
+       [833] = {
        .class_hid = BNXT_ULP_CLASS_HID_14d0,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -14366,7 +17934,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT }
        },
-       [690] = {
+       [834] = {
        .class_hid = BNXT_ULP_CLASS_HID_7a60,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -14388,7 +17956,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT }
        },
-       [691] = {
+       [835] = {
        .class_hid = BNXT_ULP_CLASS_HID_1d90,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14405,7 +17973,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_ETH_SMAC |
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR }
        },
-       [692] = {
+       [836] = {
        .class_hid = BNXT_ULP_CLASS_HID_14b4,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14423,7 +17991,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_ETH_SMAC |
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR }
        },
-       [693] = {
+       [837] = {
        .class_hid = BNXT_ULP_CLASS_HID_70f0,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14441,7 +18009,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_OO_VLAN_VID |
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR }
        },
-       [694] = {
+       [838] = {
        .class_hid = BNXT_ULP_CLASS_HID_4814,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14460,7 +18028,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_OO_VLAN_VID |
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR }
        },
-       [695] = {
+       [839] = {
        .class_hid = BNXT_ULP_CLASS_HID_3d94,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14478,7 +18046,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR }
        },
-       [696] = {
+       [840] = {
        .class_hid = BNXT_ULP_CLASS_HID_34b8,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14497,7 +18065,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR }
        },
-       [697] = {
+       [841] = {
        .class_hid = BNXT_ULP_CLASS_HID_09a8,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14516,7 +18084,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR }
        },
-       [698] = {
+       [842] = {
        .class_hid = BNXT_ULP_CLASS_HID_00cc,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14536,7 +18104,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR }
        },
-       [699] = {
+       [843] = {
        .class_hid = BNXT_ULP_CLASS_HID_3f64,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14554,7 +18122,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT }
        },
-       [700] = {
+       [844] = {
        .class_hid = BNXT_ULP_CLASS_HID_3688,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14573,7 +18141,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT }
        },
-       [701] = {
+       [845] = {
        .class_hid = BNXT_ULP_CLASS_HID_0b78,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14592,7 +18160,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT }
        },
-       [702] = {
+       [846] = {
        .class_hid = BNXT_ULP_CLASS_HID_029c,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14612,7 +18180,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT }
        },
-       [703] = {
+       [847] = {
        .class_hid = BNXT_ULP_CLASS_HID_5f68,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14631,7 +18199,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT }
        },
-       [704] = {
+       [848] = {
        .class_hid = BNXT_ULP_CLASS_HID_568c,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14651,7 +18219,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT }
        },
-       [705] = {
+       [849] = {
        .class_hid = BNXT_ULP_CLASS_HID_2b7c,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14671,7 +18239,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT }
        },
-       [706] = {
+       [850] = {
        .class_hid = BNXT_ULP_CLASS_HID_22a0,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14692,7 +18260,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT }
        },
-       [707] = {
+       [851] = {
        .class_hid = BNXT_ULP_CLASS_HID_4020,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14710,7 +18278,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT }
        },
-       [708] = {
+       [852] = {
        .class_hid = BNXT_ULP_CLASS_HID_5b44,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14729,7 +18297,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT }
        },
-       [709] = {
+       [853] = {
        .class_hid = BNXT_ULP_CLASS_HID_2c34,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14748,7 +18316,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT }
        },
-       [710] = {
+       [854] = {
        .class_hid = BNXT_ULP_CLASS_HID_2758,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14768,7 +18336,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT }
        },
-       [711] = {
+       [855] = {
        .class_hid = BNXT_ULP_CLASS_HID_18d8,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14787,7 +18355,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT }
        },
-       [712] = {
+       [856] = {
        .class_hid = BNXT_ULP_CLASS_HID_13fc,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14807,7 +18375,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT }
        },
-       [713] = {
+       [857] = {
        .class_hid = BNXT_ULP_CLASS_HID_4c38,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14827,7 +18395,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT }
        },
-       [714] = {
+       [858] = {
        .class_hid = BNXT_ULP_CLASS_HID_475c,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14848,7 +18416,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT }
        },
-       [715] = {
+       [859] = {
        .class_hid = BNXT_ULP_CLASS_HID_1aa8,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14867,7 +18435,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT }
        },
-       [716] = {
+       [860] = {
        .class_hid = BNXT_ULP_CLASS_HID_15cc,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14887,7 +18455,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT }
        },
-       [717] = {
+       [861] = {
        .class_hid = BNXT_ULP_CLASS_HID_4e08,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14907,7 +18475,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT }
        },
-       [718] = {
+       [862] = {
        .class_hid = BNXT_ULP_CLASS_HID_492c,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14928,7 +18496,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT }
        },
-       [719] = {
+       [863] = {
        .class_hid = BNXT_ULP_CLASS_HID_3aac,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14948,7 +18516,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT }
        },
-       [720] = {
+       [864] = {
        .class_hid = BNXT_ULP_CLASS_HID_35d0,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14969,7 +18537,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT }
        },
-       [721] = {
+       [865] = {
        .class_hid = BNXT_ULP_CLASS_HID_06c0,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -14990,7 +18558,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT }
        },
-       [722] = {
+       [866] = {
        .class_hid = BNXT_ULP_CLASS_HID_01e4,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -15012,7 +18580,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT }
        },
-       [723] = {
+       [867] = {
        .class_hid = BNXT_ULP_CLASS_HID_4d32,
        .class_tid = 3,
        .hdr_sig_id = 0,
@@ -15026,7 +18594,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
        .field_sig = { .bits =
                BNXT_ULP_HF_0_3_0_BITMASK_O_IPV6_DST_ADDR }
        },
-       [724] = {
+       [868] = {
        .class_hid = BNXT_ULP_CLASS_HID_54aa,
        .class_tid = 3,
        .hdr_sig_id = 0,
@@ -15041,7 +18609,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_0_BITMASK_O_IPV6_SRC_ADDR |
                BNXT_ULP_HF_0_3_0_BITMASK_O_IPV6_DST_ADDR }
        },
-       [725] = {
+       [869] = {
        .class_hid = BNXT_ULP_CLASS_HID_0686,
        .class_tid = 3,
        .hdr_sig_id = 1,
@@ -15055,7 +18623,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
        .field_sig = { .bits =
                BNXT_ULP_HF_0_3_1_BITMASK_O_IPV4_DST_ADDR }
        },
-       [726] = {
+       [870] = {
        .class_hid = BNXT_ULP_CLASS_HID_540e,
        .class_tid = 3,
        .hdr_sig_id = 1,
@@ -15070,7 +18638,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_1_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_3_1_BITMASK_O_IPV4_DST_ADDR }
        },
-       [727] = {
+       [871] = {
        .class_hid = BNXT_ULP_CLASS_HID_2e3c,
        .class_tid = 3,
        .hdr_sig_id = 2,
@@ -15085,7 +18653,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
        .field_sig = { .bits =
                BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_DST_ADDR }
        },
-       [728] = {
+       [872] = {
        .class_hid = BNXT_ULP_CLASS_HID_3a20,
        .class_tid = 3,
        .hdr_sig_id = 2,
@@ -15101,7 +18669,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_2_BITMASK_OO_VLAN_VID |
                BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_DST_ADDR }
        },
-       [729] = {
+       [873] = {
        .class_hid = BNXT_ULP_CLASS_HID_46f0,
        .class_tid = 3,
        .hdr_sig_id = 2,
@@ -15117,7 +18685,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_SRC_ADDR |
                BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_DST_ADDR }
        },
-       [730] = {
+       [874] = {
        .class_hid = BNXT_ULP_CLASS_HID_52e4,
        .class_tid = 3,
        .hdr_sig_id = 2,
@@ -15134,7 +18702,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_SRC_ADDR |
                BNXT_ULP_HF_0_3_2_BITMASK_O_IPV6_DST_ADDR }
        },
-       [731] = {
+       [875] = {
        .class_hid = BNXT_ULP_CLASS_HID_55e4,
        .class_tid = 3,
        .hdr_sig_id = 3,
@@ -15149,7 +18717,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
        .field_sig = { .bits =
                BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_DST_ADDR }
        },
-       [732] = {
+       [876] = {
        .class_hid = BNXT_ULP_CLASS_HID_21f8,
        .class_tid = 3,
        .hdr_sig_id = 3,
@@ -15165,7 +18733,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_3_BITMASK_OO_VLAN_VID |
                BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_DST_ADDR }
        },
-       [733] = {
+       [877] = {
        .class_hid = BNXT_ULP_CLASS_HID_75e8,
        .class_tid = 3,
        .hdr_sig_id = 3,
@@ -15181,7 +18749,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_DST_ADDR }
        },
-       [734] = {
+       [878] = {
        .class_hid = BNXT_ULP_CLASS_HID_41fc,
        .class_tid = 3,
        .hdr_sig_id = 3,
@@ -15198,7 +18766,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_3_3_BITMASK_O_IPV4_DST_ADDR }
        },
-       [735] = {
+       [879] = {
        .class_hid = BNXT_ULP_CLASS_HID_4d12,
        .class_tid = 3,
        .hdr_sig_id = 4,
@@ -15213,7 +18781,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
        .field_sig = { .bits =
                BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR }
        },
-       [736] = {
+       [880] = {
        .class_hid = BNXT_ULP_CLASS_HID_548a,
        .class_tid = 3,
        .hdr_sig_id = 4,
@@ -15229,7 +18797,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_SRC_ADDR |
                BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR }
        },
-       [737] = {
+       [881] = {
        .class_hid = BNXT_ULP_CLASS_HID_3356,
        .class_tid = 3,
        .hdr_sig_id = 4,
@@ -15245,7 +18813,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_SRC_PORT }
        },
-       [738] = {
+       [882] = {
        .class_hid = BNXT_ULP_CLASS_HID_1ace,
        .class_tid = 3,
        .hdr_sig_id = 4,
@@ -15262,7 +18830,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_SRC_PORT }
        },
-       [739] = {
+       [883] = {
        .class_hid = BNXT_ULP_CLASS_HID_1a9a,
        .class_tid = 3,
        .hdr_sig_id = 4,
@@ -15278,7 +18846,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_DST_PORT }
        },
-       [740] = {
+       [884] = {
        .class_hid = BNXT_ULP_CLASS_HID_4d46,
        .class_tid = 3,
        .hdr_sig_id = 4,
@@ -15295,7 +18863,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_4_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_DST_PORT }
        },
-       [741] = {
+       [885] = {
        .class_hid = BNXT_ULP_CLASS_HID_2812,
        .class_tid = 3,
        .hdr_sig_id = 4,
@@ -15312,7 +18880,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_DST_PORT }
        },
-       [742] = {
+       [886] = {
        .class_hid = BNXT_ULP_CLASS_HID_338a,
        .class_tid = 3,
        .hdr_sig_id = 4,
@@ -15330,7 +18898,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_4_BITMASK_O_TCP_DST_PORT }
        },
-       [743] = {
+       [887] = {
        .class_hid = BNXT_ULP_CLASS_HID_06e6,
        .class_tid = 3,
        .hdr_sig_id = 5,
@@ -15345,7 +18913,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
        .field_sig = { .bits =
                BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR }
        },
-       [744] = {
+       [888] = {
        .class_hid = BNXT_ULP_CLASS_HID_546e,
        .class_tid = 3,
        .hdr_sig_id = 5,
@@ -15361,7 +18929,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR }
        },
-       [745] = {
+       [889] = {
        .class_hid = BNXT_ULP_CLASS_HID_46ee,
        .class_tid = 3,
        .hdr_sig_id = 5,
@@ -15377,7 +18945,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_SRC_PORT }
        },
-       [746] = {
+       [890] = {
        .class_hid = BNXT_ULP_CLASS_HID_0d22,
        .class_tid = 3,
        .hdr_sig_id = 5,
@@ -15394,7 +18962,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_SRC_PORT }
        },
-       [747] = {
+       [891] = {
        .class_hid = BNXT_ULP_CLASS_HID_26e2,
        .class_tid = 3,
        .hdr_sig_id = 5,
@@ -15410,7 +18978,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_DST_PORT }
        },
-       [748] = {
+       [892] = {
        .class_hid = BNXT_ULP_CLASS_HID_746a,
        .class_tid = 3,
        .hdr_sig_id = 5,
@@ -15427,7 +18995,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_5_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_DST_PORT }
        },
-       [749] = {
+       [893] = {
        .class_hid = BNXT_ULP_CLASS_HID_1fa6,
        .class_tid = 3,
        .hdr_sig_id = 5,
@@ -15444,7 +19012,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_DST_PORT }
        },
-       [750] = {
+       [894] = {
        .class_hid = BNXT_ULP_CLASS_HID_2d2e,
        .class_tid = 3,
        .hdr_sig_id = 5,
@@ -15462,7 +19030,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_5_BITMASK_O_TCP_DST_PORT }
        },
-       [751] = {
+       [895] = {
        .class_hid = BNXT_ULP_CLASS_HID_4ef2,
        .class_tid = 3,
        .hdr_sig_id = 6,
@@ -15477,7 +19045,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
        .field_sig = { .bits =
                BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR }
        },
-       [752] = {
+       [896] = {
        .class_hid = BNXT_ULP_CLASS_HID_576a,
        .class_tid = 3,
        .hdr_sig_id = 6,
@@ -15493,7 +19061,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_SRC_ADDR |
                BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR }
        },
-       [753] = {
+       [897] = {
        .class_hid = BNXT_ULP_CLASS_HID_30b6,
        .class_tid = 3,
        .hdr_sig_id = 6,
@@ -15509,7 +19077,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_SRC_PORT }
        },
-       [754] = {
+       [898] = {
        .class_hid = BNXT_ULP_CLASS_HID_192e,
        .class_tid = 3,
        .hdr_sig_id = 6,
@@ -15526,7 +19094,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_SRC_PORT }
        },
-       [755] = {
+       [899] = {
        .class_hid = BNXT_ULP_CLASS_HID_197a,
        .class_tid = 3,
        .hdr_sig_id = 6,
@@ -15542,7 +19110,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_DST_PORT }
        },
-       [756] = {
+       [900] = {
        .class_hid = BNXT_ULP_CLASS_HID_4ea6,
        .class_tid = 3,
        .hdr_sig_id = 6,
@@ -15559,7 +19127,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_6_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_DST_PORT }
        },
-       [757] = {
+       [901] = {
        .class_hid = BNXT_ULP_CLASS_HID_2bf2,
        .class_tid = 3,
        .hdr_sig_id = 6,
@@ -15576,7 +19144,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_DST_PORT }
        },
-       [758] = {
+       [902] = {
        .class_hid = BNXT_ULP_CLASS_HID_306a,
        .class_tid = 3,
        .hdr_sig_id = 6,
@@ -15594,7 +19162,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_6_BITMASK_O_UDP_DST_PORT }
        },
-       [759] = {
+       [903] = {
        .class_hid = BNXT_ULP_CLASS_HID_06c6,
        .class_tid = 3,
        .hdr_sig_id = 7,
@@ -15609,7 +19177,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
        .field_sig = { .bits =
                BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR }
        },
-       [760] = {
+       [904] = {
        .class_hid = BNXT_ULP_CLASS_HID_544e,
        .class_tid = 3,
        .hdr_sig_id = 7,
@@ -15625,7 +19193,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR }
        },
-       [761] = {
+       [905] = {
        .class_hid = BNXT_ULP_CLASS_HID_46ce,
        .class_tid = 3,
        .hdr_sig_id = 7,
@@ -15641,7 +19209,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_SRC_PORT }
        },
-       [762] = {
+       [906] = {
        .class_hid = BNXT_ULP_CLASS_HID_0d02,
        .class_tid = 3,
        .hdr_sig_id = 7,
@@ -15658,7 +19226,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_SRC_PORT }
        },
-       [763] = {
+       [907] = {
        .class_hid = BNXT_ULP_CLASS_HID_26c2,
        .class_tid = 3,
        .hdr_sig_id = 7,
@@ -15674,7 +19242,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_DST_PORT }
        },
-       [764] = {
+       [908] = {
        .class_hid = BNXT_ULP_CLASS_HID_744a,
        .class_tid = 3,
        .hdr_sig_id = 7,
@@ -15691,7 +19259,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_7_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_DST_PORT }
        },
-       [765] = {
+       [909] = {
        .class_hid = BNXT_ULP_CLASS_HID_1f86,
        .class_tid = 3,
        .hdr_sig_id = 7,
@@ -15708,7 +19276,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_DST_PORT }
        },
-       [766] = {
+       [910] = {
        .class_hid = BNXT_ULP_CLASS_HID_2d0e,
        .class_tid = 3,
        .hdr_sig_id = 7,
@@ -15726,7 +19294,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_7_BITMASK_O_UDP_DST_PORT }
        },
-       [767] = {
+       [911] = {
        .class_hid = BNXT_ULP_CLASS_HID_2e1c,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -15742,7 +19310,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
        .field_sig = { .bits =
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR }
        },
-       [768] = {
+       [912] = {
        .class_hid = BNXT_ULP_CLASS_HID_3a00,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -15759,7 +19327,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_OO_VLAN_VID |
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR }
        },
-       [769] = {
+       [913] = {
        .class_hid = BNXT_ULP_CLASS_HID_46d0,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -15776,7 +19344,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_SRC_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR }
        },
-       [770] = {
+       [914] = {
        .class_hid = BNXT_ULP_CLASS_HID_52c4,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -15794,7 +19362,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_SRC_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR }
        },
-       [771] = {
+       [915] = {
        .class_hid = BNXT_ULP_CLASS_HID_4e10,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -15811,7 +19379,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT }
        },
-       [772] = {
+       [916] = {
        .class_hid = BNXT_ULP_CLASS_HID_5a04,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -15829,7 +19397,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT }
        },
-       [773] = {
+       [917] = {
        .class_hid = BNXT_ULP_CLASS_HID_1f98,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -15847,7 +19415,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT }
        },
-       [774] = {
+       [918] = {
        .class_hid = BNXT_ULP_CLASS_HID_72f8,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -15866,7 +19434,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT }
        },
-       [775] = {
+       [919] = {
        .class_hid = BNXT_ULP_CLASS_HID_0a78,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -15883,7 +19451,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT }
        },
-       [776] = {
+       [920] = {
        .class_hid = BNXT_ULP_CLASS_HID_166c,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -15901,7 +19469,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT }
        },
-       [777] = {
+       [921] = {
        .class_hid = BNXT_ULP_CLASS_HID_233c,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -15919,7 +19487,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT }
        },
-       [778] = {
+       [922] = {
        .class_hid = BNXT_ULP_CLASS_HID_0f20,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -15938,7 +19506,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT }
        },
-       [779] = {
+       [923] = {
        .class_hid = BNXT_ULP_CLASS_HID_2a7c,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -15956,7 +19524,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT }
        },
-       [780] = {
+       [924] = {
        .class_hid = BNXT_ULP_CLASS_HID_3660,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -15975,7 +19543,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT }
        },
-       [781] = {
+       [925] = {
        .class_hid = BNXT_ULP_CLASS_HID_4330,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -15994,7 +19562,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT }
        },
-       [782] = {
+       [926] = {
        .class_hid = BNXT_ULP_CLASS_HID_2f24,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -16014,7 +19582,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_8_BITMASK_O_TCP_DST_PORT }
        },
-       [783] = {
+       [927] = {
        .class_hid = BNXT_ULP_CLASS_HID_5584,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -16030,7 +19598,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
        .field_sig = { .bits =
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR }
        },
-       [784] = {
+       [928] = {
        .class_hid = BNXT_ULP_CLASS_HID_2198,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -16047,7 +19615,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_OO_VLAN_VID |
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR }
        },
-       [785] = {
+       [929] = {
        .class_hid = BNXT_ULP_CLASS_HID_7588,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -16064,7 +19632,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR }
        },
-       [786] = {
+       [930] = {
        .class_hid = BNXT_ULP_CLASS_HID_419c,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -16082,7 +19650,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR }
        },
-       [787] = {
+       [931] = {
        .class_hid = BNXT_ULP_CLASS_HID_7758,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -16099,7 +19667,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT }
        },
-       [788] = {
+       [932] = {
        .class_hid = BNXT_ULP_CLASS_HID_43ac,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -16117,7 +19685,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT }
        },
-       [789] = {
+       [933] = {
        .class_hid = BNXT_ULP_CLASS_HID_0c10,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -16135,7 +19703,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT }
        },
-       [790] = {
+       [934] = {
        .class_hid = BNXT_ULP_CLASS_HID_1864,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -16154,7 +19722,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT }
        },
-       [791] = {
+       [935] = {
        .class_hid = BNXT_ULP_CLASS_HID_30c8,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -16171,7 +19739,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT }
        },
-       [792] = {
+       [936] = {
        .class_hid = BNXT_ULP_CLASS_HID_1cdc,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -16189,7 +19757,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT }
        },
-       [793] = {
+       [937] = {
        .class_hid = BNXT_ULP_CLASS_HID_50cc,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -16207,7 +19775,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT }
        },
-       [794] = {
+       [938] = {
        .class_hid = BNXT_ULP_CLASS_HID_3d20,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -16226,7 +19794,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT }
        },
-       [795] = {
+       [939] = {
        .class_hid = BNXT_ULP_CLASS_HID_529c,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -16244,7 +19812,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT }
        },
-       [796] = {
+       [940] = {
        .class_hid = BNXT_ULP_CLASS_HID_3ef0,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -16263,7 +19831,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT }
        },
-       [797] = {
+       [941] = {
        .class_hid = BNXT_ULP_CLASS_HID_72e0,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -16282,7 +19850,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT }
        },
-       [798] = {
+       [942] = {
        .class_hid = BNXT_ULP_CLASS_HID_5ef4,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -16302,7 +19870,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_SRC_PORT |
                BNXT_ULP_HF_0_3_9_BITMASK_O_TCP_DST_PORT }
        },
-       [799] = {
+       [943] = {
        .class_hid = BNXT_ULP_CLASS_HID_2dfc,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -16318,7 +19886,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
        .field_sig = { .bits =
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR }
        },
-       [800] = {
+       [944] = {
        .class_hid = BNXT_ULP_CLASS_HID_39e0,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -16335,7 +19903,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_OO_VLAN_VID |
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR }
        },
-       [801] = {
+       [945] = {
        .class_hid = BNXT_ULP_CLASS_HID_4530,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -16352,7 +19920,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_SRC_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR }
        },
-       [802] = {
+       [946] = {
        .class_hid = BNXT_ULP_CLASS_HID_5124,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -16370,7 +19938,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_SRC_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR }
        },
-       [803] = {
+       [947] = {
        .class_hid = BNXT_ULP_CLASS_HID_4df0,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -16387,7 +19955,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT }
        },
-       [804] = {
+       [948] = {
        .class_hid = BNXT_ULP_CLASS_HID_59e4,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -16405,7 +19973,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT }
        },
-       [805] = {
+       [949] = {
        .class_hid = BNXT_ULP_CLASS_HID_1c78,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -16423,7 +19991,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT }
        },
-       [806] = {
+       [950] = {
        .class_hid = BNXT_ULP_CLASS_HID_7118,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -16442,7 +20010,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT }
        },
-       [807] = {
+       [951] = {
        .class_hid = BNXT_ULP_CLASS_HID_0998,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -16459,7 +20027,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT }
        },
-       [808] = {
+       [952] = {
        .class_hid = BNXT_ULP_CLASS_HID_158c,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -16477,7 +20045,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT }
        },
-       [809] = {
+       [953] = {
        .class_hid = BNXT_ULP_CLASS_HID_20dc,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -16495,7 +20063,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT }
        },
-       [810] = {
+       [954] = {
        .class_hid = BNXT_ULP_CLASS_HID_0cc0,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -16514,7 +20082,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_IPV6_DST_ADDR |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT }
        },
-       [811] = {
+       [955] = {
        .class_hid = BNXT_ULP_CLASS_HID_299c,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -16532,7 +20100,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT }
        },
-       [812] = {
+       [956] = {
        .class_hid = BNXT_ULP_CLASS_HID_3580,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -16551,7 +20119,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT }
        },
-       [813] = {
+       [957] = {
        .class_hid = BNXT_ULP_CLASS_HID_40d0,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -16570,7 +20138,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT }
        },
-       [814] = {
+       [958] = {
        .class_hid = BNXT_ULP_CLASS_HID_2cc4,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -16590,7 +20158,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_10_BITMASK_O_UDP_DST_PORT }
        },
-       [815] = {
+       [959] = {
        .class_hid = BNXT_ULP_CLASS_HID_55a4,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -16606,7 +20174,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
        .field_sig = { .bits =
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR }
        },
-       [816] = {
+       [960] = {
        .class_hid = BNXT_ULP_CLASS_HID_21b8,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -16623,7 +20191,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_OO_VLAN_VID |
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR }
        },
-       [817] = {
+       [961] = {
        .class_hid = BNXT_ULP_CLASS_HID_75a8,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -16640,7 +20208,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR }
        },
-       [818] = {
+       [962] = {
        .class_hid = BNXT_ULP_CLASS_HID_41bc,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -16658,7 +20226,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_SRC_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR }
        },
-       [819] = {
+       [963] = {
        .class_hid = BNXT_ULP_CLASS_HID_7778,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -16675,7 +20243,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT }
        },
-       [820] = {
+       [964] = {
        .class_hid = BNXT_ULP_CLASS_HID_438c,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -16693,7 +20261,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT }
        },
-       [821] = {
+       [965] = {
        .class_hid = BNXT_ULP_CLASS_HID_0c30,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -16711,7 +20279,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT }
        },
-       [822] = {
+       [966] = {
        .class_hid = BNXT_ULP_CLASS_HID_1844,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -16730,7 +20298,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT }
        },
-       [823] = {
+       [967] = {
        .class_hid = BNXT_ULP_CLASS_HID_30e8,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -16747,7 +20315,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT }
        },
-       [824] = {
+       [968] = {
        .class_hid = BNXT_ULP_CLASS_HID_1cfc,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -16765,7 +20333,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT }
        },
-       [825] = {
+       [969] = {
        .class_hid = BNXT_ULP_CLASS_HID_50ec,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -16783,7 +20351,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT }
        },
-       [826] = {
+       [970] = {
        .class_hid = BNXT_ULP_CLASS_HID_3d00,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -16802,7 +20370,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_IPV4_DST_ADDR |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT }
        },
-       [827] = {
+       [971] = {
        .class_hid = BNXT_ULP_CLASS_HID_52bc,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -16820,7 +20388,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT }
        },
-       [828] = {
+       [972] = {
        .class_hid = BNXT_ULP_CLASS_HID_3ed0,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -16839,7 +20407,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT }
        },
-       [829] = {
+       [973] = {
        .class_hid = BNXT_ULP_CLASS_HID_72c0,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -16858,7 +20426,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT }
        },
-       [830] = {
+       [974] = {
        .class_hid = BNXT_ULP_CLASS_HID_5ed4,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -16878,7 +20446,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_SRC_PORT |
                BNXT_ULP_HF_0_3_11_BITMASK_O_UDP_DST_PORT }
        },
-       [831] = {
+       [975] = {
        .class_hid = BNXT_ULP_CLASS_HID_3866,
        .class_tid = 3,
        .hdr_sig_id = 0,
@@ -16893,7 +20461,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_0_BITMASK_O_ETH_DMAC |
                BNXT_ULP_HF_0_3_0_BITMASK_O_ETH_SMAC }
        },
-       [832] = {
+       [976] = {
        .class_hid = BNXT_ULP_CLASS_HID_381e,
        .class_tid = 3,
        .hdr_sig_id = 1,
@@ -16908,7 +20476,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_1_BITMASK_O_ETH_DMAC |
                BNXT_ULP_HF_0_3_1_BITMASK_O_ETH_SMAC }
        },
-       [833] = {
+       [977] = {
        .class_hid = BNXT_ULP_CLASS_HID_3860,
        .class_tid = 3,
        .hdr_sig_id = 2,
@@ -16924,7 +20492,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_2_BITMASK_O_ETH_DMAC |
                BNXT_ULP_HF_0_3_2_BITMASK_O_ETH_SMAC }
        },
-       [834] = {
+       [978] = {
        .class_hid = BNXT_ULP_CLASS_HID_0454,
        .class_tid = 3,
        .hdr_sig_id = 2,
@@ -16941,7 +20509,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_2_BITMASK_O_ETH_SMAC |
                BNXT_ULP_HF_0_3_2_BITMASK_OO_VLAN_VID }
        },
-       [835] = {
+       [979] = {
        .class_hid = BNXT_ULP_CLASS_HID_3818,
        .class_tid = 3,
        .hdr_sig_id = 3,
@@ -16957,7 +20525,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_3_BITMASK_O_ETH_DMAC |
                BNXT_ULP_HF_0_3_3_BITMASK_O_ETH_SMAC }
        },
-       [836] = {
+       [980] = {
        .class_hid = BNXT_ULP_CLASS_HID_042c,
        .class_tid = 3,
        .hdr_sig_id = 3,
@@ -16974,7 +20542,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_3_BITMASK_O_ETH_SMAC |
                BNXT_ULP_HF_0_3_3_BITMASK_OO_VLAN_VID }
        },
-       [837] = {
+       [981] = {
        .class_hid = BNXT_ULP_CLASS_HID_3846,
        .class_tid = 3,
        .hdr_sig_id = 4,
@@ -16990,7 +20558,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_4_BITMASK_O_ETH_DMAC |
                BNXT_ULP_HF_0_3_4_BITMASK_O_ETH_SMAC }
        },
-       [838] = {
+       [982] = {
        .class_hid = BNXT_ULP_CLASS_HID_387e,
        .class_tid = 3,
        .hdr_sig_id = 5,
@@ -17006,7 +20574,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_5_BITMASK_O_ETH_DMAC |
                BNXT_ULP_HF_0_3_5_BITMASK_O_ETH_SMAC }
        },
-       [839] = {
+       [983] = {
        .class_hid = BNXT_ULP_CLASS_HID_3ba6,
        .class_tid = 3,
        .hdr_sig_id = 6,
@@ -17022,7 +20590,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_6_BITMASK_O_ETH_DMAC |
                BNXT_ULP_HF_0_3_6_BITMASK_O_ETH_SMAC }
        },
-       [840] = {
+       [984] = {
        .class_hid = BNXT_ULP_CLASS_HID_385e,
        .class_tid = 3,
        .hdr_sig_id = 7,
@@ -17038,7 +20606,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_7_BITMASK_O_ETH_DMAC |
                BNXT_ULP_HF_0_3_7_BITMASK_O_ETH_SMAC }
        },
-       [841] = {
+       [985] = {
        .class_hid = BNXT_ULP_CLASS_HID_3840,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -17055,7 +20623,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_ETH_DMAC |
                BNXT_ULP_HF_0_3_8_BITMASK_O_ETH_SMAC }
        },
-       [842] = {
+       [986] = {
        .class_hid = BNXT_ULP_CLASS_HID_0474,
        .class_tid = 3,
        .hdr_sig_id = 8,
@@ -17073,7 +20641,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_8_BITMASK_O_ETH_SMAC |
                BNXT_ULP_HF_0_3_8_BITMASK_OO_VLAN_VID }
        },
-       [843] = {
+       [987] = {
        .class_hid = BNXT_ULP_CLASS_HID_3878,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -17090,7 +20658,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_ETH_DMAC |
                BNXT_ULP_HF_0_3_9_BITMASK_O_ETH_SMAC }
        },
-       [844] = {
+       [988] = {
        .class_hid = BNXT_ULP_CLASS_HID_044c,
        .class_tid = 3,
        .hdr_sig_id = 9,
@@ -17108,7 +20676,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_9_BITMASK_O_ETH_SMAC |
                BNXT_ULP_HF_0_3_9_BITMASK_OO_VLAN_VID }
        },
-       [845] = {
+       [989] = {
        .class_hid = BNXT_ULP_CLASS_HID_3ba0,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -17125,7 +20693,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_ETH_DMAC |
                BNXT_ULP_HF_0_3_10_BITMASK_O_ETH_SMAC }
        },
-       [846] = {
+       [990] = {
        .class_hid = BNXT_ULP_CLASS_HID_0794,
        .class_tid = 3,
        .hdr_sig_id = 10,
@@ -17143,7 +20711,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_10_BITMASK_O_ETH_SMAC |
                BNXT_ULP_HF_0_3_10_BITMASK_OO_VLAN_VID }
        },
-       [847] = {
+       [991] = {
        .class_hid = BNXT_ULP_CLASS_HID_3858,
        .class_tid = 3,
        .hdr_sig_id = 11,
@@ -17160,7 +20728,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
                BNXT_ULP_HF_0_3_11_BITMASK_O_ETH_DMAC |
                BNXT_ULP_HF_0_3_11_BITMASK_O_ETH_SMAC }
        },
-       [848] = {
+       [992] = {
        .class_hid = BNXT_ULP_CLASS_HID_046c,
        .class_tid = 3,
        .hdr_sig_id = 11,

diff --git a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_enum.h b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_enum.h
index 84e3d92..c016e19 100644 (file)
--- a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_enum.h
+++ b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_enum.h
@@ -3,7 +3,7 @@
  * All rights reserved.
  */
 
-/* date: Tue Jul 13 12:36:40 2021 */
+/* date: Fri Aug 20 17:59:14 2021 */
 
 #ifndef ULP_TEMPLATE_DB_H_
 #define ULP_TEMPLATE_DB_H_
@@ -11,14 +11,14 @@
 #define BNXT_ULP_REGFILE_MAX_SZ 42
 #define BNXT_ULP_MAX_NUM_DEVICES 4
 #define BNXT_ULP_LOG2_MAX_NUM_DEV 2
-#define BNXT_ULP_GEN_TBL_MAX_SZ 12
-#define BNXT_ULP_CLASS_SIG_TBL_MAX_SZ 32768
-#define BNXT_ULP_CLASS_MATCH_LIST_MAX_SZ 849
+#define BNXT_ULP_GEN_TBL_MAX_SZ 16
+#define BNXT_ULP_CLASS_SIG_TBL_MAX_SZ 65536
+#define BNXT_ULP_CLASS_MATCH_LIST_MAX_SZ 993
 #define BNXT_ULP_CLASS_HID_LOW_PRIME 6701
 #define BNXT_ULP_CLASS_HID_HIGH_PRIME 7907
-#define BNXT_ULP_CLASS_HID_SHFTR 24
-#define BNXT_ULP_CLASS_HID_SHFTL 24
-#define BNXT_ULP_CLASS_HID_MASK 32767
+#define BNXT_ULP_CLASS_HID_SHFTR 28
+#define BNXT_ULP_CLASS_HID_SHFTL 28
+#define BNXT_ULP_CLASS_HID_MASK 65535
 #define BNXT_ULP_ACT_SIG_TBL_MAX_SZ 2048
 #define BNXT_ULP_ACT_MATCH_LIST_MAX_SZ 86
 #define BNXT_ULP_ACT_HID_LOW_PRIME 7919
@@ -27,10 +27,10 @@
 #define BNXT_ULP_ACT_HID_SHFTL 26
 #define BNXT_ULP_ACT_HID_MASK 2047
 #define BNXT_ULP_APP_RESOURCE_RESV_LIST_MAX_SZ 8
-#define BNXT_ULP_GLB_RESOURCE_TBL_MAX_SZ 62
+#define BNXT_ULP_GLB_RESOURCE_TBL_MAX_SZ 110
 #define BNXT_ULP_APP_GLB_RESOURCE_TBL_MAX_SZ 50
-#define BNXT_ULP_RESOURCE_RESV_LIST_MAX_SZ 206
-#define BNXT_ULP_APP_CAP_TBL_MAX_SZ 6
+#define BNXT_ULP_RESOURCE_RESV_LIST_MAX_SZ 278
+#define BNXT_ULP_APP_CAP_TBL_MAX_SZ 8
 #define BNXT_ULP_COND_GOTO_REJECT 1023
 #define BNXT_ULP_COND_GOTO_RF 0x10000
 #define BNXT_ULP_GLB_FIELD_TBL_SHIFT 7
@@ -44,10 +44,10 @@
 #define ULP_WH_PLUS_CLASS_RESULT_FIELD_LIST_SIZE 618
 #define ULP_WH_PLUS_CLASS_COND_LIST_SIZE 49
 #define ULP_THOR_CLASS_TMPL_LIST_SIZE 6
-#define ULP_THOR_CLASS_TBL_LIST_SIZE 114
-#define ULP_THOR_CLASS_KEY_INFO_LIST_SIZE 2305
-#define ULP_THOR_CLASS_IDENT_LIST_SIZE 39
-#define ULP_THOR_CLASS_RESULT_FIELD_LIST_SIZE 1192
+#define ULP_THOR_CLASS_TBL_LIST_SIZE 116
+#define ULP_THOR_CLASS_KEY_INFO_LIST_SIZE 2323
+#define ULP_THOR_CLASS_IDENT_LIST_SIZE 38
+#define ULP_THOR_CLASS_RESULT_FIELD_LIST_SIZE 1313
 #define ULP_THOR_CLASS_COND_LIST_SIZE 55
 #define ULP_WH_PLUS_ACT_TMPL_LIST_SIZE 7
 #define ULP_WH_PLUS_ACT_TBL_LIST_SIZE 35
@@ -56,11 +56,11 @@
 #define ULP_WH_PLUS_ACT_RESULT_FIELD_LIST_SIZE 536
 #define ULP_WH_PLUS_ACT_COND_LIST_SIZE 39
 #define ULP_THOR_ACT_TMPL_LIST_SIZE 7
-#define ULP_THOR_ACT_TBL_LIST_SIZE 28
-#define ULP_THOR_ACT_KEY_INFO_LIST_SIZE 2
-#define ULP_THOR_ACT_IDENT_LIST_SIZE 1
-#define ULP_THOR_ACT_RESULT_FIELD_LIST_SIZE 479
-#define ULP_THOR_ACT_COND_LIST_SIZE 20
+#define ULP_THOR_ACT_TBL_LIST_SIZE 36
+#define ULP_THOR_ACT_KEY_INFO_LIST_SIZE 16
+#define ULP_THOR_ACT_IDENT_LIST_SIZE 3
+#define ULP_THOR_ACT_RESULT_FIELD_LIST_SIZE 505
+#define ULP_THOR_ACT_COND_LIST_SIZE 27
 
 enum bnxt_ulp_act_bit {
        BNXT_ULP_ACT_BIT_MARK                = 0x0000000000000001,
@@ -158,56 +158,60 @@ enum bnxt_ulp_cf_idx {
        BNXT_ULP_CF_IDX_O_L4_DST_PORT = 18,
        BNXT_ULP_CF_IDX_I_L4_SRC_PORT = 19,
        BNXT_ULP_CF_IDX_I_L4_DST_PORT = 20,
-       BNXT_ULP_CF_IDX_O_L4_FB_SRC_PORT = 21,
-       BNXT_ULP_CF_IDX_O_L4_FB_DST_PORT = 22,
-       BNXT_ULP_CF_IDX_I_L4_FB_SRC_PORT = 23,
-       BNXT_ULP_CF_IDX_I_L4_FB_DST_PORT = 24,
-       BNXT_ULP_CF_IDX_O_L3_FB_PROTO_ID = 25,
-       BNXT_ULP_CF_IDX_I_L3_FB_PROTO_ID = 26,
-       BNXT_ULP_CF_IDX_O_L3_PROTO_ID = 27,
-       BNXT_ULP_CF_IDX_I_L3_PROTO_ID = 28,
-       BNXT_ULP_CF_IDX_DEV_PORT_ID = 29,
-       BNXT_ULP_CF_IDX_DRV_FUNC_SVIF = 30,
-       BNXT_ULP_CF_IDX_DRV_FUNC_SPIF = 31,
-       BNXT_ULP_CF_IDX_DRV_FUNC_PARIF = 32,
-       BNXT_ULP_CF_IDX_DRV_FUNC_VNIC = 33,
-       BNXT_ULP_CF_IDX_DRV_FUNC_PHY_PORT = 34,
-       BNXT_ULP_CF_IDX_VF_FUNC_SVIF = 35,
-       BNXT_ULP_CF_IDX_VF_FUNC_SPIF = 36,
-       BNXT_ULP_CF_IDX_VF_FUNC_PARIF = 37,
-       BNXT_ULP_CF_IDX_VF_FUNC_VNIC = 38,
-       BNXT_ULP_CF_IDX_PHY_PORT_SVIF = 39,
-       BNXT_ULP_CF_IDX_PHY_PORT_SPIF = 40,
-       BNXT_ULP_CF_IDX_PHY_PORT_PARIF = 41,
-       BNXT_ULP_CF_IDX_PHY_PORT_VPORT = 42,
-       BNXT_ULP_CF_IDX_ACT_ENCAP_IPV4_FLAG = 43,
-       BNXT_ULP_CF_IDX_ACT_ENCAP_IPV6_FLAG = 44,
-       BNXT_ULP_CF_IDX_ACT_DEC_TTL = 45,
-       BNXT_ULP_CF_IDX_ACT_T_DEC_TTL = 46,
-       BNXT_ULP_CF_IDX_ACT_PORT_IS_SET = 47,
-       BNXT_ULP_CF_IDX_ACT_PORT_TYPE = 48,
-       BNXT_ULP_CF_IDX_MATCH_PORT_TYPE = 49,
-       BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP = 50,
-       BNXT_ULP_CF_IDX_MATCH_PORT_IS_PF = 51,
-       BNXT_ULP_CF_IDX_VF_TO_VF = 52,
-       BNXT_ULP_CF_IDX_L3_HDR_CNT = 53,
-       BNXT_ULP_CF_IDX_L4_HDR_CNT = 54,
-       BNXT_ULP_CF_IDX_VFR_MODE = 55,
-       BNXT_ULP_CF_IDX_L3_TUN = 56,
-       BNXT_ULP_CF_IDX_L3_TUN_DECAP = 57,
-       BNXT_ULP_CF_IDX_FID = 58,
-       BNXT_ULP_CF_IDX_HDR_SIG_ID = 59,
-       BNXT_ULP_CF_IDX_FLOW_SIG_ID = 60,
-       BNXT_ULP_CF_IDX_WC_MATCH = 61,
-       BNXT_ULP_CF_IDX_WC_IS_HA_HIGH_REG = 62,
-       BNXT_ULP_CF_IDX_TUNNEL_ID = 63,
-       BNXT_ULP_CF_IDX_TUN_OFF_DIP_ID = 64,
-       BNXT_ULP_CF_IDX_TUN_OFF_DMAC_ID = 65,
-       BNXT_ULP_CF_IDX_OO_VLAN_FB_VID = 66,
-       BNXT_ULP_CF_IDX_OI_VLAN_FB_VID = 67,
-       BNXT_ULP_CF_IDX_IO_VLAN_FB_VID = 68,
-       BNXT_ULP_CF_IDX_II_VLAN_FB_VID = 69,
-       BNXT_ULP_CF_IDX_LAST = 70
+       BNXT_ULP_CF_IDX_O_L4_SRC_PORT_MASK = 21,
+       BNXT_ULP_CF_IDX_O_L4_DST_PORT_MASK = 22,
+       BNXT_ULP_CF_IDX_I_L4_SRC_PORT_MASK = 23,
+       BNXT_ULP_CF_IDX_I_L4_DST_PORT_MASK = 24,
+       BNXT_ULP_CF_IDX_O_L4_FB_SRC_PORT = 25,
+       BNXT_ULP_CF_IDX_O_L4_FB_DST_PORT = 26,
+       BNXT_ULP_CF_IDX_I_L4_FB_SRC_PORT = 27,
+       BNXT_ULP_CF_IDX_I_L4_FB_DST_PORT = 28,
+       BNXT_ULP_CF_IDX_O_L3_FB_PROTO_ID = 29,
+       BNXT_ULP_CF_IDX_I_L3_FB_PROTO_ID = 30,
+       BNXT_ULP_CF_IDX_O_L3_PROTO_ID = 31,
+       BNXT_ULP_CF_IDX_I_L3_PROTO_ID = 32,
+       BNXT_ULP_CF_IDX_DEV_PORT_ID = 33,
+       BNXT_ULP_CF_IDX_DRV_FUNC_SVIF = 34,
+       BNXT_ULP_CF_IDX_DRV_FUNC_SPIF = 35,
+       BNXT_ULP_CF_IDX_DRV_FUNC_PARIF = 36,
+       BNXT_ULP_CF_IDX_DRV_FUNC_VNIC = 37,
+       BNXT_ULP_CF_IDX_DRV_FUNC_PHY_PORT = 38,
+       BNXT_ULP_CF_IDX_VF_FUNC_SVIF = 39,
+       BNXT_ULP_CF_IDX_VF_FUNC_SPIF = 40,
+       BNXT_ULP_CF_IDX_VF_FUNC_PARIF = 41,
+       BNXT_ULP_CF_IDX_VF_FUNC_VNIC = 42,
+       BNXT_ULP_CF_IDX_PHY_PORT_SVIF = 43,
+       BNXT_ULP_CF_IDX_PHY_PORT_SPIF = 44,
+       BNXT_ULP_CF_IDX_PHY_PORT_PARIF = 45,
+       BNXT_ULP_CF_IDX_PHY_PORT_VPORT = 46,
+       BNXT_ULP_CF_IDX_ACT_ENCAP_IPV4_FLAG = 47,
+       BNXT_ULP_CF_IDX_ACT_ENCAP_IPV6_FLAG = 48,
+       BNXT_ULP_CF_IDX_ACT_DEC_TTL = 49,
+       BNXT_ULP_CF_IDX_ACT_T_DEC_TTL = 50,
+       BNXT_ULP_CF_IDX_ACT_PORT_IS_SET = 51,
+       BNXT_ULP_CF_IDX_ACT_PORT_TYPE = 52,
+       BNXT_ULP_CF_IDX_MATCH_PORT_TYPE = 53,
+       BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP = 54,
+       BNXT_ULP_CF_IDX_MATCH_PORT_IS_PF = 55,
+       BNXT_ULP_CF_IDX_VF_TO_VF = 56,
+       BNXT_ULP_CF_IDX_L3_HDR_CNT = 57,
+       BNXT_ULP_CF_IDX_L4_HDR_CNT = 58,
+       BNXT_ULP_CF_IDX_VFR_MODE = 59,
+       BNXT_ULP_CF_IDX_L3_TUN = 60,
+       BNXT_ULP_CF_IDX_L3_TUN_DECAP = 61,
+       BNXT_ULP_CF_IDX_FID = 62,
+       BNXT_ULP_CF_IDX_HDR_SIG_ID = 63,
+       BNXT_ULP_CF_IDX_FLOW_SIG_ID = 64,
+       BNXT_ULP_CF_IDX_WC_MATCH = 65,
+       BNXT_ULP_CF_IDX_WC_IS_HA_HIGH_REG = 66,
+       BNXT_ULP_CF_IDX_TUNNEL_ID = 67,
+       BNXT_ULP_CF_IDX_TUN_OFF_DIP_ID = 68,
+       BNXT_ULP_CF_IDX_TUN_OFF_DMAC_ID = 69,
+       BNXT_ULP_CF_IDX_OO_VLAN_FB_VID = 70,
+       BNXT_ULP_CF_IDX_OI_VLAN_FB_VID = 71,
+       BNXT_ULP_CF_IDX_IO_VLAN_FB_VID = 72,
+       BNXT_ULP_CF_IDX_II_VLAN_FB_VID = 73,
+       BNXT_ULP_CF_IDX_LAST = 74
 };
 
 enum bnxt_ulp_cond_list_opc {
@@ -394,38 +398,49 @@ enum bnxt_ulp_glb_rf_idx {
        BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3 = 9,
        BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_4 = 10,
        BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_5 = 11,
-       BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0 = 12,
-       BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_1 = 13,
+       BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_6 = 12,
+       BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_7 = 13,
        BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0 = 14,
        BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1 = 15,
        BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_2 = 16,
        BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_3 = 17,
        BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_4 = 18,
-       BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_0 = 19,
-       BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_1 = 20,
-       BNXT_ULP_GLB_RF_IDX_GLB_METADATA_PROF_0 = 21,
-       BNXT_ULP_GLB_RF_IDX_GLB_METADATA_PROF_1 = 22,
-       BNXT_ULP_GLB_RF_IDX_GLB_VFR_PROF_FUNC_0 = 23,
-       BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_KEY_ID_0 = 24,
-       BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_PROF_ID_0 = 25,
-       BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_0 = 26,
-       BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_1 = 27,
-       BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_2 = 28,
-       BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_0 = 29,
-       BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_1 = 30,
-       BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_PROFILE_ID_0 = 31,
-       BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_PROFILE_ID_1 = 32,
-       BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_0 = 33,
-       BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_1 = 34,
-       BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_2 = 35,
-       BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_KEY_ID_0 = 36,
-       BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_KEY_ID_1 = 37,
-       BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_0 = 38,
-       BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_1 = 39,
-       BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_0 = 40,
-       BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_1 = 41,
-       BNXT_ULP_GLB_RF_IDX_GRE_PROF_FUNC_ID = 42,
-       BNXT_ULP_GLB_RF_IDX_LAST = 43
+       BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0 = 19,
+       BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_1 = 20,
+       BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_2 = 21,
+       BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_3 = 22,
+       BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_4 = 23,
+       BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_5 = 24,
+       BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_6 = 25,
+       BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_7 = 26,
+       BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_0 = 27,
+       BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_1 = 28,
+       BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_2 = 29,
+       BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_3 = 30,
+       BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_4 = 31,
+       BNXT_ULP_GLB_RF_IDX_GLB_METADATA_PROF_0 = 32,
+       BNXT_ULP_GLB_RF_IDX_GLB_METADATA_PROF_1 = 33,
+       BNXT_ULP_GLB_RF_IDX_GLB_VFR_PROF_FUNC_0 = 34,
+       BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_KEY_ID_0 = 35,
+       BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_PROF_ID_0 = 36,
+       BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_0 = 37,
+       BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_1 = 38,
+       BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_2 = 39,
+       BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_0 = 40,
+       BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_1 = 41,
+       BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_PROFILE_ID_0 = 42,
+       BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_PROFILE_ID_1 = 43,
+       BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_0 = 44,
+       BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_1 = 45,
+       BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_2 = 46,
+       BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_KEY_ID_0 = 47,
+       BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_KEY_ID_1 = 48,
+       BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_0 = 49,
+       BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_1 = 50,
+       BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_0 = 51,
+       BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_1 = 52,
+       BNXT_ULP_GLB_RF_IDX_GRE_PROF_FUNC_ID = 53,
+       BNXT_ULP_GLB_RF_IDX_LAST = 54
 };
 
 enum bnxt_ulp_hdr_type {
@@ -608,7 +623,9 @@ enum bnxt_ulp_resource_sub_type {
        BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SHARED_MIRROR = 2,
        BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_MAC_ADDR_CACHE = 3,
        BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PORT_TABLE = 4,
-       BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_TUNNEL_CACHE = 5
+       BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_TUNNEL_CACHE = 5,
+       BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SOURCE_PROPERTY_CACHE = 6,
+       BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_VXLAN_ENCAP_REC_CACHE = 7
 };
 
 enum bnxt_ulp_act_prop_sz {
@@ -1526,166 +1543,310 @@ enum bnxt_ulp_class_hid {
        BNXT_ULP_CLASS_HID_315d = 0x315d,
        BNXT_ULP_CLASS_HID_3612 = 0x3612,
        BNXT_ULP_CLASS_HID_66da = 0x66da,
-       BNXT_ULP_CLASS_HID_6165 = 0x6165,
-       BNXT_ULP_CLASS_HID_2aa1 = 0x2aa1,
-       BNXT_ULP_CLASS_HID_09cd = 0x09cd,
-       BNXT_ULP_CLASS_HID_3845 = 0x3845,
-       BNXT_ULP_CLASS_HID_11e9 = 0x11e9,
-       BNXT_ULP_CLASS_HID_4361 = 0x4361,
-       BNXT_ULP_CLASS_HID_218d = 0x218d,
-       BNXT_ULP_CLASS_HID_5105 = 0x5105,
-       BNXT_ULP_CLASS_HID_0c89 = 0x0c89,
-       BNXT_ULP_CLASS_HID_3e81 = 0x3e81,
-       BNXT_ULP_CLASS_HID_1dad = 0x1dad,
-       BNXT_ULP_CLASS_HID_4ca5 = 0x4ca5,
-       BNXT_ULP_CLASS_HID_25c9 = 0x25c9,
-       BNXT_ULP_CLASS_HID_57c1 = 0x57c1,
-       BNXT_ULP_CLASS_HID_33ed = 0x33ed,
-       BNXT_ULP_CLASS_HID_65e5 = 0x65e5,
-       BNXT_ULP_CLASS_HID_6dd9 = 0x6dd9,
-       BNXT_ULP_CLASS_HID_261d = 0x261d,
-       BNXT_ULP_CLASS_HID_0571 = 0x0571,
-       BNXT_ULP_CLASS_HID_34f9 = 0x34f9,
-       BNXT_ULP_CLASS_HID_1d55 = 0x1d55,
-       BNXT_ULP_CLASS_HID_4fdd = 0x4fdd,
-       BNXT_ULP_CLASS_HID_2d31 = 0x2d31,
-       BNXT_ULP_CLASS_HID_5db9 = 0x5db9,
-       BNXT_ULP_CLASS_HID_0035 = 0x0035,
-       BNXT_ULP_CLASS_HID_323d = 0x323d,
-       BNXT_ULP_CLASS_HID_1111 = 0x1111,
-       BNXT_ULP_CLASS_HID_4019 = 0x4019,
-       BNXT_ULP_CLASS_HID_2975 = 0x2975,
-       BNXT_ULP_CLASS_HID_5b7d = 0x5b7d,
-       BNXT_ULP_CLASS_HID_3f51 = 0x3f51,
-       BNXT_ULP_CLASS_HID_6959 = 0x6959,
-       BNXT_ULP_CLASS_HID_0e85 = 0x0e85,
-       BNXT_ULP_CLASS_HID_380d = 0x380d,
-       BNXT_ULP_CLASS_HID_1f21 = 0x1f21,
-       BNXT_ULP_CLASS_HID_4ea9 = 0x4ea9,
-       BNXT_ULP_CLASS_HID_1705 = 0x1705,
-       BNXT_ULP_CLASS_HID_418d = 0x418d,
-       BNXT_ULP_CLASS_HID_2721 = 0x2721,
-       BNXT_ULP_CLASS_HID_57a9 = 0x57a9,
-       BNXT_ULP_CLASS_HID_1a25 = 0x1a25,
-       BNXT_ULP_CLASS_HID_342d = 0x342d,
-       BNXT_ULP_CLASS_HID_2b01 = 0x2b01,
-       BNXT_ULP_CLASS_HID_5a09 = 0x5a09,
-       BNXT_ULP_CLASS_HID_2325 = 0x2325,
-       BNXT_ULP_CLASS_HID_5d2d = 0x5d2d,
-       BNXT_ULP_CLASS_HID_3101 = 0x3101,
-       BNXT_ULP_CLASS_HID_6309 = 0x6309,
-       BNXT_ULP_CLASS_HID_0bad = 0x0bad,
-       BNXT_ULP_CLASS_HID_2535 = 0x2535,
-       BNXT_ULP_CLASS_HID_1869 = 0x1869,
-       BNXT_ULP_CLASS_HID_4bf1 = 0x4bf1,
-       BNXT_ULP_CLASS_HID_136d = 0x136d,
-       BNXT_ULP_CLASS_HID_43f5 = 0x43f5,
-       BNXT_ULP_CLASS_HID_2129 = 0x2129,
-       BNXT_ULP_CLASS_HID_53b1 = 0x53b1,
-       BNXT_ULP_CLASS_HID_072d = 0x072d,
-       BNXT_ULP_CLASS_HID_3135 = 0x3135,
-       BNXT_ULP_CLASS_HID_1429 = 0x1429,
-       BNXT_ULP_CLASS_HID_4731 = 0x4731,
-       BNXT_ULP_CLASS_HID_2f6d = 0x2f6d,
-       BNXT_ULP_CLASS_HID_5f75 = 0x5f75,
-       BNXT_ULP_CLASS_HID_3d69 = 0x3d69,
-       BNXT_ULP_CLASS_HID_6f71 = 0x6f71,
-       BNXT_ULP_CLASS_HID_0dbd = 0x0dbd,
-       BNXT_ULP_CLASS_HID_3f25 = 0x3f25,
-       BNXT_ULP_CLASS_HID_1239 = 0x1239,
-       BNXT_ULP_CLASS_HID_4da1 = 0x4da1,
-       BNXT_ULP_CLASS_HID_153d = 0x153d,
-       BNXT_ULP_CLASS_HID_45a5 = 0x45a5,
-       BNXT_ULP_CLASS_HID_3bb9 = 0x3bb9,
-       BNXT_ULP_CLASS_HID_55a1 = 0x55a1,
-       BNXT_ULP_CLASS_HID_193d = 0x193d,
-       BNXT_ULP_CLASS_HID_4b25 = 0x4b25,
-       BNXT_ULP_CLASS_HID_2e39 = 0x2e39,
-       BNXT_ULP_CLASS_HID_5921 = 0x5921,
-       BNXT_ULP_CLASS_HID_213d = 0x213d,
-       BNXT_ULP_CLASS_HID_5125 = 0x5125,
-       BNXT_ULP_CLASS_HID_3739 = 0x3739,
-       BNXT_ULP_CLASS_HID_093d = 0x093d,
-       BNXT_ULP_CLASS_HID_684d = 0x684d,
-       BNXT_ULP_CLASS_HID_2389 = 0x2389,
-       BNXT_ULP_CLASS_HID_00e5 = 0x00e5,
-       BNXT_ULP_CLASS_HID_316d = 0x316d,
-       BNXT_ULP_CLASS_HID_18c1 = 0x18c1,
-       BNXT_ULP_CLASS_HID_4a49 = 0x4a49,
-       BNXT_ULP_CLASS_HID_28a5 = 0x28a5,
-       BNXT_ULP_CLASS_HID_582d = 0x582d,
-       BNXT_ULP_CLASS_HID_05a1 = 0x05a1,
-       BNXT_ULP_CLASS_HID_37a9 = 0x37a9,
-       BNXT_ULP_CLASS_HID_1485 = 0x1485,
-       BNXT_ULP_CLASS_HID_458d = 0x458d,
-       BNXT_ULP_CLASS_HID_2ce1 = 0x2ce1,
-       BNXT_ULP_CLASS_HID_5ee9 = 0x5ee9,
-       BNXT_ULP_CLASS_HID_3ac5 = 0x3ac5,
-       BNXT_ULP_CLASS_HID_6ccd = 0x6ccd,
-       BNXT_ULP_CLASS_HID_0b11 = 0x0b11,
-       BNXT_ULP_CLASS_HID_3d99 = 0x3d99,
-       BNXT_ULP_CLASS_HID_1ab5 = 0x1ab5,
-       BNXT_ULP_CLASS_HID_4b3d = 0x4b3d,
-       BNXT_ULP_CLASS_HID_1291 = 0x1291,
-       BNXT_ULP_CLASS_HID_4419 = 0x4419,
-       BNXT_ULP_CLASS_HID_22b5 = 0x22b5,
-       BNXT_ULP_CLASS_HID_523d = 0x523d,
-       BNXT_ULP_CLASS_HID_1fb1 = 0x1fb1,
-       BNXT_ULP_CLASS_HID_31b9 = 0x31b9,
-       BNXT_ULP_CLASS_HID_2e95 = 0x2e95,
-       BNXT_ULP_CLASS_HID_5f9d = 0x5f9d,
-       BNXT_ULP_CLASS_HID_26b1 = 0x26b1,
-       BNXT_ULP_CLASS_HID_58b9 = 0x58b9,
-       BNXT_ULP_CLASS_HID_3495 = 0x3495,
-       BNXT_ULP_CLASS_HID_669d = 0x669d,
-       BNXT_ULP_CLASS_HID_0e39 = 0x0e39,
-       BNXT_ULP_CLASS_HID_20a1 = 0x20a1,
-       BNXT_ULP_CLASS_HID_1dfd = 0x1dfd,
-       BNXT_ULP_CLASS_HID_4e65 = 0x4e65,
-       BNXT_ULP_CLASS_HID_16f9 = 0x16f9,
-       BNXT_ULP_CLASS_HID_4661 = 0x4661,
-       BNXT_ULP_CLASS_HID_24bd = 0x24bd,
-       BNXT_ULP_CLASS_HID_5625 = 0x5625,
-       BNXT_ULP_CLASS_HID_02b9 = 0x02b9,
-       BNXT_ULP_CLASS_HID_34a1 = 0x34a1,
-       BNXT_ULP_CLASS_HID_11bd = 0x11bd,
-       BNXT_ULP_CLASS_HID_42a5 = 0x42a5,
-       BNXT_ULP_CLASS_HID_2af9 = 0x2af9,
-       BNXT_ULP_CLASS_HID_5ae1 = 0x5ae1,
-       BNXT_ULP_CLASS_HID_38fd = 0x38fd,
-       BNXT_ULP_CLASS_HID_6ae5 = 0x6ae5,
-       BNXT_ULP_CLASS_HID_0829 = 0x0829,
-       BNXT_ULP_CLASS_HID_3ab1 = 0x3ab1,
-       BNXT_ULP_CLASS_HID_17ad = 0x17ad,
-       BNXT_ULP_CLASS_HID_4835 = 0x4835,
-       BNXT_ULP_CLASS_HID_10a9 = 0x10a9,
-       BNXT_ULP_CLASS_HID_4031 = 0x4031,
-       BNXT_ULP_CLASS_HID_3e2d = 0x3e2d,
-       BNXT_ULP_CLASS_HID_5035 = 0x5035,
-       BNXT_ULP_CLASS_HID_1ca9 = 0x1ca9,
-       BNXT_ULP_CLASS_HID_4eb1 = 0x4eb1,
-       BNXT_ULP_CLASS_HID_2bad = 0x2bad,
-       BNXT_ULP_CLASS_HID_5cb5 = 0x5cb5,
-       BNXT_ULP_CLASS_HID_24a9 = 0x24a9,
-       BNXT_ULP_CLASS_HID_54b1 = 0x54b1,
-       BNXT_ULP_CLASS_HID_32ad = 0x32ad,
-       BNXT_ULP_CLASS_HID_0ca9 = 0x0ca9,
-       BNXT_ULP_CLASS_HID_7f35 = 0x7f35,
-       BNXT_ULP_CLASS_HID_34f1 = 0x34f1,
-       BNXT_ULP_CLASS_HID_179d = 0x179d,
-       BNXT_ULP_CLASS_HID_2615 = 0x2615,
-       BNXT_ULP_CLASS_HID_0fb9 = 0x0fb9,
-       BNXT_ULP_CLASS_HID_5d31 = 0x5d31,
-       BNXT_ULP_CLASS_HID_3fdd = 0x3fdd,
-       BNXT_ULP_CLASS_HID_4f55 = 0x4f55,
-       BNXT_ULP_CLASS_HID_12d9 = 0x12d9,
-       BNXT_ULP_CLASS_HID_20d1 = 0x20d1,
-       BNXT_ULP_CLASS_HID_03fd = 0x03fd,
-       BNXT_ULP_CLASS_HID_52f5 = 0x52f5,
-       BNXT_ULP_CLASS_HID_3b99 = 0x3b99,
-       BNXT_ULP_CLASS_HID_4991 = 0x4991,
-       BNXT_ULP_CLASS_HID_2dbd = 0x2dbd,
-       BNXT_ULP_CLASS_HID_7bb5 = 0x7bb5,
+       BNXT_ULP_CLASS_HID_e082 = 0xe082,
+       BNXT_ULP_CLASS_HID_ab46 = 0xab46,
+       BNXT_ULP_CLASS_HID_c82a = 0xc82a,
+       BNXT_ULP_CLASS_HID_f9a2 = 0xf9a2,
+       BNXT_ULP_CLASS_HID_d8ce = 0xd8ce,
+       BNXT_ULP_CLASS_HID_a2d2 = 0xa2d2,
+       BNXT_ULP_CLASS_HID_c076 = 0xc076,
+       BNXT_ULP_CLASS_HID_f1ee = 0xf1ee,
+       BNXT_ULP_CLASS_HID_a96e = 0xa96e,
+       BNXT_ULP_CLASS_HID_dae6 = 0xdae6,
+       BNXT_ULP_CLASS_HID_c7aa = 0xc7aa,
+       BNXT_ULP_CLASS_HID_c26e = 0xc26e,
+       BNXT_ULP_CLASS_HID_a0fa = 0xa0fa,
+       BNXT_ULP_CLASS_HID_d272 = 0xd272,
+       BNXT_ULP_CLASS_HID_fff6 = 0xfff6,
+       BNXT_ULP_CLASS_HID_e16e = 0xe16e,
+       BNXT_ULP_CLASS_HID_e165 = 0xe165,
+       BNXT_ULP_CLASS_HID_aaa1 = 0xaaa1,
+       BNXT_ULP_CLASS_HID_c9cd = 0xc9cd,
+       BNXT_ULP_CLASS_HID_f845 = 0xf845,
+       BNXT_ULP_CLASS_HID_90f9 = 0x90f9,
+       BNXT_ULP_CLASS_HID_c371 = 0xc371,
+       BNXT_ULP_CLASS_HID_e19d = 0xe19d,
+       BNXT_ULP_CLASS_HID_d015 = 0xd015,
+       BNXT_ULP_CLASS_HID_8c09 = 0x8c09,
+       BNXT_ULP_CLASS_HID_be89 = 0xbe89,
+       BNXT_ULP_CLASS_HID_ddad = 0xddad,
+       BNXT_ULP_CLASS_HID_cc2d = 0xcc2d,
+       BNXT_ULP_CLASS_HID_a4d9 = 0xa4d9,
+       BNXT_ULP_CLASS_HID_d759 = 0xd759,
+       BNXT_ULP_CLASS_HID_f27d = 0xf27d,
+       BNXT_ULP_CLASS_HID_e4fd = 0xe4fd,
+       BNXT_ULP_CLASS_HID_ecf6 = 0xecf6,
+       BNXT_ULP_CLASS_HID_a732 = 0xa732,
+       BNXT_ULP_CLASS_HID_c45e = 0xc45e,
+       BNXT_ULP_CLASS_HID_f5d6 = 0xf5d6,
+       BNXT_ULP_CLASS_HID_d4ba = 0xd4ba,
+       BNXT_ULP_CLASS_HID_aea6 = 0xaea6,
+       BNXT_ULP_CLASS_HID_cc02 = 0xcc02,
+       BNXT_ULP_CLASS_HID_fd9a = 0xfd9a,
+       BNXT_ULP_CLASS_HID_a51a = 0xa51a,
+       BNXT_ULP_CLASS_HID_d692 = 0xd692,
+       BNXT_ULP_CLASS_HID_cbde = 0xcbde,
+       BNXT_ULP_CLASS_HID_ce1a = 0xce1a,
+       BNXT_ULP_CLASS_HID_ac8e = 0xac8e,
+       BNXT_ULP_CLASS_HID_de06 = 0xde06,
+       BNXT_ULP_CLASS_HID_f382 = 0xf382,
+       BNXT_ULP_CLASS_HID_ed1a = 0xed1a,
+       BNXT_ULP_CLASS_HID_9d6a = 0x9d6a,
+       BNXT_ULP_CLASS_HID_cee2 = 0xcee2,
+       BNXT_ULP_CLASS_HID_ec0e = 0xec0e,
+       BNXT_ULP_CLASS_HID_dd86 = 0xdd86,
+       BNXT_ULP_CLASS_HID_852e = 0x852e,
+       BNXT_ULP_CLASS_HID_b6a6 = 0xb6a6,
+       BNXT_ULP_CLASS_HID_eb82 = 0xeb82,
+       BNXT_ULP_CLASS_HID_c50a = 0xc50a,
+       BNXT_ULP_CLASS_HID_ccca = 0xccca,
+       BNXT_ULP_CLASS_HID_8706 = 0x8706,
+       BNXT_ULP_CLASS_HID_d38e = 0xd38e,
+       BNXT_ULP_CLASS_HID_d5ca = 0xd5ca,
+       BNXT_ULP_CLASS_HID_b48e = 0xb48e,
+       BNXT_ULP_CLASS_HID_8e8a = 0x8e8a,
+       BNXT_ULP_CLASS_HID_db02 = 0xdb02,
+       BNXT_ULP_CLASS_HID_dd8e = 0xdd8e,
+       BNXT_ULP_CLASS_HID_819a = 0x819a,
+       BNXT_ULP_CLASS_HID_b31a = 0xb31a,
+       BNXT_ULP_CLASS_HID_d03e = 0xd03e,
+       BNXT_ULP_CLASS_HID_c1be = 0xc1be,
+       BNXT_ULP_CLASS_HID_890e = 0x890e,
+       BNXT_ULP_CLASS_HID_ba8e = 0xba8e,
+       BNXT_ULP_CLASS_HID_dfaa = 0xdfaa,
+       BNXT_ULP_CLASS_HID_c93a = 0xc93a,
+       BNXT_ULP_CLASS_HID_b11a = 0xb11a,
+       BNXT_ULP_CLASS_HID_8b4e = 0x8b4e,
+       BNXT_ULP_CLASS_HID_c79e = 0xc79e,
+       BNXT_ULP_CLASS_HID_d9da = 0xd9da,
+       BNXT_ULP_CLASS_HID_b88e = 0xb88e,
+       BNXT_ULP_CLASS_HID_ea0e = 0xea0e,
+       BNXT_ULP_CLASS_HID_cf0a = 0xcf0a,
+       BNXT_ULP_CLASS_HID_c18e = 0xc18e,
+       BNXT_ULP_CLASS_HID_a94a = 0xa94a,
+       BNXT_ULP_CLASS_HID_daca = 0xdaca,
+       BNXT_ULP_CLASS_HID_ffee = 0xffee,
+       BNXT_ULP_CLASS_HID_e96e = 0xe96e,
+       BNXT_ULP_CLASS_HID_910e = 0x910e,
+       BNXT_ULP_CLASS_HID_c28e = 0xc28e,
+       BNXT_ULP_CLASS_HID_e7aa = 0xe7aa,
+       BNXT_ULP_CLASS_HID_d12a = 0xd12a,
+       BNXT_ULP_CLASS_HID_d8ca = 0xd8ca,
+       BNXT_ULP_CLASS_HID_930e = 0x930e,
+       BNXT_ULP_CLASS_HID_ef4e = 0xef4e,
+       BNXT_ULP_CLASS_HID_e18a = 0xe18a,
+       BNXT_ULP_CLASS_HID_c08e = 0xc08e,
+       BNXT_ULP_CLASS_HID_9a8a = 0x9a8a,
+       BNXT_ULP_CLASS_HID_d70a = 0xd70a,
+       BNXT_ULP_CLASS_HID_e90e = 0xe90e,
+       BNXT_ULP_CLASS_HID_edd9 = 0xedd9,
+       BNXT_ULP_CLASS_HID_a61d = 0xa61d,
+       BNXT_ULP_CLASS_HID_c571 = 0xc571,
+       BNXT_ULP_CLASS_HID_f4f9 = 0xf4f9,
+       BNXT_ULP_CLASS_HID_9c45 = 0x9c45,
+       BNXT_ULP_CLASS_HID_cfcd = 0xcfcd,
+       BNXT_ULP_CLASS_HID_ed21 = 0xed21,
+       BNXT_ULP_CLASS_HID_dca9 = 0xdca9,
+       BNXT_ULP_CLASS_HID_80b5 = 0x80b5,
+       BNXT_ULP_CLASS_HID_b235 = 0xb235,
+       BNXT_ULP_CLASS_HID_d111 = 0xd111,
+       BNXT_ULP_CLASS_HID_c091 = 0xc091,
+       BNXT_ULP_CLASS_HID_a865 = 0xa865,
+       BNXT_ULP_CLASS_HID_dbe5 = 0xdbe5,
+       BNXT_ULP_CLASS_HID_fec1 = 0xfec1,
+       BNXT_ULP_CLASS_HID_e841 = 0xe841,
+       BNXT_ULP_CLASS_HID_8e85 = 0x8e85,
+       BNXT_ULP_CLASS_HID_b80d = 0xb80d,
+       BNXT_ULP_CLASS_HID_df65 = 0xdf65,
+       BNXT_ULP_CLASS_HID_ceed = 0xceed,
+       BNXT_ULP_CLASS_HID_9645 = 0x9645,
+       BNXT_ULP_CLASS_HID_c1cd = 0xc1cd,
+       BNXT_ULP_CLASS_HID_e725 = 0xe725,
+       BNXT_ULP_CLASS_HID_d6ad = 0xd6ad,
+       BNXT_ULP_CLASS_HID_9aa5 = 0x9aa5,
+       BNXT_ULP_CLASS_HID_b425 = 0xb425,
+       BNXT_ULP_CLASS_HID_eb05 = 0xeb05,
+       BNXT_ULP_CLASS_HID_da85 = 0xda85,
+       BNXT_ULP_CLASS_HID_a265 = 0xa265,
+       BNXT_ULP_CLASS_HID_dde5 = 0xdde5,
+       BNXT_ULP_CLASS_HID_f0c5 = 0xf0c5,
+       BNXT_ULP_CLASS_HID_e245 = 0xe245,
+       BNXT_ULP_CLASS_HID_8b8f = 0x8b8f,
+       BNXT_ULP_CLASS_HID_a517 = 0xa517,
+       BNXT_ULP_CLASS_HID_d86b = 0xd86b,
+       BNXT_ULP_CLASS_HID_cbf3 = 0xcbf3,
+       BNXT_ULP_CLASS_HID_934f = 0x934f,
+       BNXT_ULP_CLASS_HID_c2c7 = 0xc2c7,
+       BNXT_ULP_CLASS_HID_e02b = 0xe02b,
+       BNXT_ULP_CLASS_HID_d3a3 = 0xd3a3,
+       BNXT_ULP_CLASS_HID_87a7 = 0x87a7,
+       BNXT_ULP_CLASS_HID_b137 = 0xb137,
+       BNXT_ULP_CLASS_HID_d403 = 0xd403,
+       BNXT_ULP_CLASS_HID_c793 = 0xc793,
+       BNXT_ULP_CLASS_HID_af67 = 0xaf67,
+       BNXT_ULP_CLASS_HID_dee7 = 0xdee7,
+       BNXT_ULP_CLASS_HID_fdc3 = 0xfdc3,
+       BNXT_ULP_CLASS_HID_ef43 = 0xef43,
+       BNXT_ULP_CLASS_HID_8dbf = 0x8dbf,
+       BNXT_ULP_CLASS_HID_bf07 = 0xbf07,
+       BNXT_ULP_CLASS_HID_d21f = 0xd21f,
+       BNXT_ULP_CLASS_HID_cde7 = 0xcde7,
+       BNXT_ULP_CLASS_HID_956f = 0x956f,
+       BNXT_ULP_CLASS_HID_c4c7 = 0xc4c7,
+       BNXT_ULP_CLASS_HID_fbcf = 0xfbcf,
+       BNXT_ULP_CLASS_HID_d5a7 = 0xd5a7,
+       BNXT_ULP_CLASS_HID_9957 = 0x9957,
+       BNXT_ULP_CLASS_HID_cb27 = 0xcb27,
+       BNXT_ULP_CLASS_HID_ee37 = 0xee37,
+       BNXT_ULP_CLASS_HID_d987 = 0xd987,
+       BNXT_ULP_CLASS_HID_a107 = 0xa107,
+       BNXT_ULP_CLASS_HID_d0e7 = 0xd0e7,
+       BNXT_ULP_CLASS_HID_f7e7 = 0xf7e7,
+       BNXT_ULP_CLASS_HID_c827 = 0xc827,
+       BNXT_ULP_CLASS_HID_f76a = 0xf76a,
+       BNXT_ULP_CLASS_HID_bcae = 0xbcae,
+       BNXT_ULP_CLASS_HID_dfc2 = 0xdfc2,
+       BNXT_ULP_CLASS_HID_ee4a = 0xee4a,
+       BNXT_ULP_CLASS_HID_cf26 = 0xcf26,
+       BNXT_ULP_CLASS_HID_b53a = 0xb53a,
+       BNXT_ULP_CLASS_HID_d79e = 0xd79e,
+       BNXT_ULP_CLASS_HID_e606 = 0xe606,
+       BNXT_ULP_CLASS_HID_be86 = 0xbe86,
+       BNXT_ULP_CLASS_HID_cd0e = 0xcd0e,
+       BNXT_ULP_CLASS_HID_d042 = 0xd042,
+       BNXT_ULP_CLASS_HID_d586 = 0xd586,
+       BNXT_ULP_CLASS_HID_b712 = 0xb712,
+       BNXT_ULP_CLASS_HID_c59a = 0xc59a,
+       BNXT_ULP_CLASS_HID_e81e = 0xe81e,
+       BNXT_ULP_CLASS_HID_f686 = 0xf686,
+       BNXT_ULP_CLASS_HID_86f6 = 0x86f6,
+       BNXT_ULP_CLASS_HID_d57e = 0xd57e,
+       BNXT_ULP_CLASS_HID_f792 = 0xf792,
+       BNXT_ULP_CLASS_HID_c61a = 0xc61a,
+       BNXT_ULP_CLASS_HID_9eb2 = 0x9eb2,
+       BNXT_ULP_CLASS_HID_ad3a = 0xad3a,
+       BNXT_ULP_CLASS_HID_f01e = 0xf01e,
+       BNXT_ULP_CLASS_HID_de96 = 0xde96,
+       BNXT_ULP_CLASS_HID_d756 = 0xd756,
+       BNXT_ULP_CLASS_HID_9c9a = 0x9c9a,
+       BNXT_ULP_CLASS_HID_c812 = 0xc812,
+       BNXT_ULP_CLASS_HID_ce56 = 0xce56,
+       BNXT_ULP_CLASS_HID_af12 = 0xaf12,
+       BNXT_ULP_CLASS_HID_9516 = 0x9516,
+       BNXT_ULP_CLASS_HID_c09e = 0xc09e,
+       BNXT_ULP_CLASS_HID_c612 = 0xc612,
+       BNXT_ULP_CLASS_HID_9a06 = 0x9a06,
+       BNXT_ULP_CLASS_HID_a886 = 0xa886,
+       BNXT_ULP_CLASS_HID_cba2 = 0xcba2,
+       BNXT_ULP_CLASS_HID_da22 = 0xda22,
+       BNXT_ULP_CLASS_HID_9292 = 0x9292,
+       BNXT_ULP_CLASS_HID_a112 = 0xa112,
+       BNXT_ULP_CLASS_HID_c436 = 0xc436,
+       BNXT_ULP_CLASS_HID_d2a6 = 0xd2a6,
+       BNXT_ULP_CLASS_HID_aa86 = 0xaa86,
+       BNXT_ULP_CLASS_HID_90d2 = 0x90d2,
+       BNXT_ULP_CLASS_HID_dc02 = 0xdc02,
+       BNXT_ULP_CLASS_HID_c246 = 0xc246,
+       BNXT_ULP_CLASS_HID_a312 = 0xa312,
+       BNXT_ULP_CLASS_HID_f192 = 0xf192,
+       BNXT_ULP_CLASS_HID_d496 = 0xd496,
+       BNXT_ULP_CLASS_HID_da12 = 0xda12,
+       BNXT_ULP_CLASS_HID_b2d6 = 0xb2d6,
+       BNXT_ULP_CLASS_HID_c156 = 0xc156,
+       BNXT_ULP_CLASS_HID_e472 = 0xe472,
+       BNXT_ULP_CLASS_HID_f2f2 = 0xf2f2,
+       BNXT_ULP_CLASS_HID_8a92 = 0x8a92,
+       BNXT_ULP_CLASS_HID_d912 = 0xd912,
+       BNXT_ULP_CLASS_HID_fc36 = 0xfc36,
+       BNXT_ULP_CLASS_HID_cab6 = 0xcab6,
+       BNXT_ULP_CLASS_HID_c356 = 0xc356,
+       BNXT_ULP_CLASS_HID_8892 = 0x8892,
+       BNXT_ULP_CLASS_HID_f4d2 = 0xf4d2,
+       BNXT_ULP_CLASS_HID_fa16 = 0xfa16,
+       BNXT_ULP_CLASS_HID_db12 = 0xdb12,
+       BNXT_ULP_CLASS_HID_8116 = 0x8116,
+       BNXT_ULP_CLASS_HID_cc96 = 0xcc96,
+       BNXT_ULP_CLASS_HID_f292 = 0xf292,
+       BNXT_ULP_CLASS_HID_e84d = 0xe84d,
+       BNXT_ULP_CLASS_HID_a389 = 0xa389,
+       BNXT_ULP_CLASS_HID_c0e5 = 0xc0e5,
+       BNXT_ULP_CLASS_HID_f16d = 0xf16d,
+       BNXT_ULP_CLASS_HID_99d1 = 0x99d1,
+       BNXT_ULP_CLASS_HID_ca59 = 0xca59,
+       BNXT_ULP_CLASS_HID_e8b5 = 0xe8b5,
+       BNXT_ULP_CLASS_HID_d93d = 0xd93d,
+       BNXT_ULP_CLASS_HID_8521 = 0x8521,
+       BNXT_ULP_CLASS_HID_b7a1 = 0xb7a1,
+       BNXT_ULP_CLASS_HID_d485 = 0xd485,
+       BNXT_ULP_CLASS_HID_c505 = 0xc505,
+       BNXT_ULP_CLASS_HID_adf1 = 0xadf1,
+       BNXT_ULP_CLASS_HID_de71 = 0xde71,
+       BNXT_ULP_CLASS_HID_fb55 = 0xfb55,
+       BNXT_ULP_CLASS_HID_edd5 = 0xedd5,
+       BNXT_ULP_CLASS_HID_8b11 = 0x8b11,
+       BNXT_ULP_CLASS_HID_bd99 = 0xbd99,
+       BNXT_ULP_CLASS_HID_daf1 = 0xdaf1,
+       BNXT_ULP_CLASS_HID_cb79 = 0xcb79,
+       BNXT_ULP_CLASS_HID_93d1 = 0x93d1,
+       BNXT_ULP_CLASS_HID_c459 = 0xc459,
+       BNXT_ULP_CLASS_HID_e2b1 = 0xe2b1,
+       BNXT_ULP_CLASS_HID_d339 = 0xd339,
+       BNXT_ULP_CLASS_HID_9f31 = 0x9f31,
+       BNXT_ULP_CLASS_HID_b1b1 = 0xb1b1,
+       BNXT_ULP_CLASS_HID_ee91 = 0xee91,
+       BNXT_ULP_CLASS_HID_df11 = 0xdf11,
+       BNXT_ULP_CLASS_HID_a7f1 = 0xa7f1,
+       BNXT_ULP_CLASS_HID_d871 = 0xd871,
+       BNXT_ULP_CLASS_HID_f551 = 0xf551,
+       BNXT_ULP_CLASS_HID_e7d1 = 0xe7d1,
+       BNXT_ULP_CLASS_HID_8e1b = 0x8e1b,
+       BNXT_ULP_CLASS_HID_a083 = 0xa083,
+       BNXT_ULP_CLASS_HID_ddff = 0xddff,
+       BNXT_ULP_CLASS_HID_ce67 = 0xce67,
+       BNXT_ULP_CLASS_HID_96db = 0x96db,
+       BNXT_ULP_CLASS_HID_c753 = 0xc753,
+       BNXT_ULP_CLASS_HID_e5bf = 0xe5bf,
+       BNXT_ULP_CLASS_HID_d637 = 0xd637,
+       BNXT_ULP_CLASS_HID_8233 = 0x8233,
+       BNXT_ULP_CLASS_HID_b4a3 = 0xb4a3,
+       BNXT_ULP_CLASS_HID_d197 = 0xd197,
+       BNXT_ULP_CLASS_HID_c207 = 0xc207,
+       BNXT_ULP_CLASS_HID_aaf3 = 0xaaf3,
+       BNXT_ULP_CLASS_HID_db73 = 0xdb73,
+       BNXT_ULP_CLASS_HID_f857 = 0xf857,
+       BNXT_ULP_CLASS_HID_ead7 = 0xead7,
+       BNXT_ULP_CLASS_HID_882b = 0x882b,
+       BNXT_ULP_CLASS_HID_ba93 = 0xba93,
+       BNXT_ULP_CLASS_HID_d78b = 0xd78b,
+       BNXT_ULP_CLASS_HID_c873 = 0xc873,
+       BNXT_ULP_CLASS_HID_90fb = 0x90fb,
+       BNXT_ULP_CLASS_HID_c153 = 0xc153,
+       BNXT_ULP_CLASS_HID_fe5b = 0xfe5b,
+       BNXT_ULP_CLASS_HID_d033 = 0xd033,
+       BNXT_ULP_CLASS_HID_9cc3 = 0x9cc3,
+       BNXT_ULP_CLASS_HID_ceb3 = 0xceb3,
+       BNXT_ULP_CLASS_HID_eba3 = 0xeba3,
+       BNXT_ULP_CLASS_HID_dc13 = 0xdc13,
+       BNXT_ULP_CLASS_HID_a493 = 0xa493,
+       BNXT_ULP_CLASS_HID_d573 = 0xd573,
+       BNXT_ULP_CLASS_HID_f273 = 0xf273,
+       BNXT_ULP_CLASS_HID_cdb3 = 0xcdb3,
+       BNXT_ULP_CLASS_HID_ff35 = 0xff35,
+       BNXT_ULP_CLASS_HID_b4f1 = 0xb4f1,
+       BNXT_ULP_CLASS_HID_d79d = 0xd79d,
+       BNXT_ULP_CLASS_HID_e615 = 0xe615,
+       BNXT_ULP_CLASS_HID_8ea9 = 0x8ea9,
+       BNXT_ULP_CLASS_HID_dd21 = 0xdd21,
+       BNXT_ULP_CLASS_HID_ffcd = 0xffcd,
+       BNXT_ULP_CLASS_HID_ce45 = 0xce45,
+       BNXT_ULP_CLASS_HID_9259 = 0x9259,
+       BNXT_ULP_CLASS_HID_a0d9 = 0xa0d9,
+       BNXT_ULP_CLASS_HID_c3fd = 0xc3fd,
+       BNXT_ULP_CLASS_HID_d27d = 0xd27d,
+       BNXT_ULP_CLASS_HID_ba89 = 0xba89,
+       BNXT_ULP_CLASS_HID_c909 = 0xc909,
+       BNXT_ULP_CLASS_HID_ec2d = 0xec2d,
+       BNXT_ULP_CLASS_HID_faad = 0xfaad,
        BNXT_ULP_CLASS_HID_34c6 = 0x34c6,
        BNXT_ULP_CLASS_HID_0c22 = 0x0c22,
        BNXT_ULP_CLASS_HID_1cbe = 0x1cbe,

diff --git a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_field.h b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_field.h
index 1d7bbfe..0a5c7e3 100644 (file)
--- a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_field.h
+++ b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_field.h
@@ -3,7 +3,7 @@
  * All rights reserved.
  */
 
-/* date: Thu May 20 11:56:39 2021 */
+/* date: Fri Aug  6 11:15:47 2021 */
 
 #ifndef ULP_HDR_FIELD_ENUMS_H_
 #define ULP_HDR_FIELD_ENUMS_H_
@@ -459,16 +459,14 @@ enum bnxt_ulp_hf_0_2_1_bitmask {
        BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_DMAC          = 0x0000080000000000,
        BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_SMAC          = 0x0000040000000000,
        BNXT_ULP_HF_0_2_1_BITMASK_I_ETH_TYPE          = 0x0000020000000000,
-       BNXT_ULP_HF_0_2_1_BITMASK_I_IPV4_VER          = 0x0000010000000000,
-       BNXT_ULP_HF_0_2_1_BITMASK_I_IPV4_TOS          = 0x0000008000000000,
-       BNXT_ULP_HF_0_2_1_BITMASK_I_IPV4_LEN          = 0x0000004000000000,
-       BNXT_ULP_HF_0_2_1_BITMASK_I_IPV4_FRAG_ID      = 0x0000002000000000,
-       BNXT_ULP_HF_0_2_1_BITMASK_I_IPV4_FRAG_OFF     = 0x0000001000000000,
-       BNXT_ULP_HF_0_2_1_BITMASK_I_IPV4_TTL          = 0x0000000800000000,
-       BNXT_ULP_HF_0_2_1_BITMASK_I_IPV4_PROTO_ID     = 0x0000000400000000,
-       BNXT_ULP_HF_0_2_1_BITMASK_I_IPV4_CSUM         = 0x0000000200000000,
-       BNXT_ULP_HF_0_2_1_BITMASK_I_IPV4_SRC_ADDR     = 0x0000000100000000,
-       BNXT_ULP_HF_0_2_1_BITMASK_I_IPV4_DST_ADDR     = 0x0000000080000000
+       BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_VER          = 0x0000010000000000,
+       BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_TC           = 0x0000008000000000,
+       BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_FLOW_LABEL   = 0x0000004000000000,
+       BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_PAYLOAD_LEN  = 0x0000002000000000,
+       BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_PROTO_ID     = 0x0000001000000000,
+       BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_TTL          = 0x0000000800000000,
+       BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_SRC_ADDR     = 0x0000000400000000,
+       BNXT_ULP_HF_0_2_1_BITMASK_I_IPV6_DST_ADDR     = 0x0000000200000000
 };
 
 enum bnxt_ulp_hf_0_2_2_bitmask {
@@ -504,16 +502,7 @@ enum bnxt_ulp_hf_0_2_2_bitmask {
        BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_PROTO_ID     = 0x0000000400000000,
        BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_CSUM         = 0x0000000200000000,
        BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_SRC_ADDR     = 0x0000000100000000,
-       BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR     = 0x0000000080000000,
-       BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SRC_PORT      = 0x0000000040000000,
-       BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DST_PORT      = 0x0000000020000000,
-       BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_SENT_SEQ      = 0x0000000010000000,
-       BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_RECV_ACK      = 0x0000000008000000,
-       BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_DATA_OFF      = 0x0000000004000000,
-       BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_TCP_FLAGS     = 0x0000000002000000,
-       BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_RX_WIN        = 0x0000000001000000,
-       BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_CSUM          = 0x0000000000800000,
-       BNXT_ULP_HF_0_2_2_BITMASK_I_TCP_URP           = 0x0000000000400000
+       BNXT_ULP_HF_0_2_2_BITMASK_I_IPV4_DST_ADDR     = 0x0000000080000000
 };
 
 enum bnxt_ulp_hf_0_2_3_bitmask {
@@ -540,20 +529,23 @@ enum bnxt_ulp_hf_0_2_3_bitmask {
        BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC          = 0x0000080000000000,
        BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC          = 0x0000040000000000,
        BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_TYPE          = 0x0000020000000000,
-       BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_VER          = 0x0000010000000000,
-       BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_TOS          = 0x0000008000000000,
-       BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_LEN          = 0x0000004000000000,
-       BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_FRAG_ID      = 0x0000002000000000,
-       BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_FRAG_OFF     = 0x0000001000000000,
-       BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_TTL          = 0x0000000800000000,
-       BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_PROTO_ID     = 0x0000000400000000,
-       BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_CSUM         = 0x0000000200000000,
-       BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_SRC_ADDR     = 0x0000000100000000,
-       BNXT_ULP_HF_0_2_3_BITMASK_I_IPV4_DST_ADDR     = 0x0000000080000000,
-       BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_SRC_PORT      = 0x0000000040000000,
-       BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_DST_PORT      = 0x0000000020000000,
-       BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_LENGTH        = 0x0000000010000000,
-       BNXT_ULP_HF_0_2_3_BITMASK_I_UDP_CSUM          = 0x0000000008000000
+       BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_VER          = 0x0000010000000000,
+       BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_TC           = 0x0000008000000000,
+       BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_FLOW_LABEL   = 0x0000004000000000,
+       BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_PAYLOAD_LEN  = 0x0000002000000000,
+       BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_PROTO_ID     = 0x0000001000000000,
+       BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_TTL          = 0x0000000800000000,
+       BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR     = 0x0000000400000000,
+       BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR     = 0x0000000200000000,
+       BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SRC_PORT      = 0x0000000100000000,
+       BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DST_PORT      = 0x0000000080000000,
+       BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_SENT_SEQ      = 0x0000000040000000,
+       BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_RECV_ACK      = 0x0000000020000000,
+       BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_DATA_OFF      = 0x0000000010000000,
+       BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_TCP_FLAGS     = 0x0000000008000000,
+       BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_RX_WIN        = 0x0000000004000000,
+       BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_CSUM          = 0x0000000002000000,
+       BNXT_ULP_HF_0_2_3_BITMASK_I_TCP_URP           = 0x0000000001000000
 };
 
 enum bnxt_ulp_hf_0_2_4_bitmask {
@@ -590,11 +582,134 @@ enum bnxt_ulp_hf_0_2_4_bitmask {
        BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_CSUM         = 0x0000000200000000,
        BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR     = 0x0000000100000000,
        BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR     = 0x0000000080000000,
-       BNXT_ULP_HF_0_2_4_BITMASK_I_ICMP_TYPE         = 0x0000000040000000,
-       BNXT_ULP_HF_0_2_4_BITMASK_I_ICMP_CODE         = 0x0000000020000000,
-       BNXT_ULP_HF_0_2_4_BITMASK_I_ICMP_CSUM         = 0x0000000010000000,
-       BNXT_ULP_HF_0_2_4_BITMASK_I_ICMP_IDENT        = 0x0000000008000000,
-       BNXT_ULP_HF_0_2_4_BITMASK_I_ICMP_SEQ_NUM      = 0x0000000004000000
+       BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SRC_PORT      = 0x0000000040000000,
+       BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DST_PORT      = 0x0000000020000000,
+       BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_SENT_SEQ      = 0x0000000010000000,
+       BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_RECV_ACK      = 0x0000000008000000,
+       BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_DATA_OFF      = 0x0000000004000000,
+       BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_TCP_FLAGS     = 0x0000000002000000,
+       BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_RX_WIN        = 0x0000000001000000,
+       BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_CSUM          = 0x0000000000800000,
+       BNXT_ULP_HF_0_2_4_BITMASK_I_TCP_URP           = 0x0000000000400000
+};
+
+enum bnxt_ulp_hf_0_2_5_bitmask {
+       BNXT_ULP_HF_0_2_5_BITMASK_WM                  = 0x8000000000000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_SVIF_INDEX          = 0x4000000000000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_VER          = 0x2000000000000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_TOS          = 0x1000000000000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_LEN          = 0x0800000000000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_FRAG_ID      = 0x0400000000000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_FRAG_OFF     = 0x0200000000000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_TTL          = 0x0100000000000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_PROTO_ID     = 0x0080000000000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_CSUM         = 0x0040000000000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR     = 0x0020000000000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR     = 0x0010000000000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_SRC_PORT      = 0x0008000000000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT      = 0x0004000000000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_LENGTH        = 0x0002000000000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_CSUM          = 0x0001000000000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_FLAGS       = 0x0000800000000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_RSVD0       = 0x0000400000000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI         = 0x0000200000000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_RSVD1       = 0x0000100000000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC          = 0x0000080000000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC          = 0x0000040000000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_TYPE          = 0x0000020000000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_VER          = 0x0000010000000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_TC           = 0x0000008000000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_FLOW_LABEL   = 0x0000004000000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_PAYLOAD_LEN  = 0x0000002000000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_PROTO_ID     = 0x0000001000000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_TTL          = 0x0000000800000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_SRC_ADDR     = 0x0000000400000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_I_IPV6_DST_ADDR     = 0x0000000200000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_SRC_PORT      = 0x0000000100000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_DST_PORT      = 0x0000000080000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_LENGTH        = 0x0000000040000000,
+       BNXT_ULP_HF_0_2_5_BITMASK_I_UDP_CSUM          = 0x0000000020000000
+};
+
+enum bnxt_ulp_hf_0_2_6_bitmask {
+       BNXT_ULP_HF_0_2_6_BITMASK_WM                  = 0x8000000000000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_SVIF_INDEX          = 0x4000000000000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_VER          = 0x2000000000000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_TOS          = 0x1000000000000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_LEN          = 0x0800000000000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_FRAG_ID      = 0x0400000000000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_FRAG_OFF     = 0x0200000000000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_TTL          = 0x0100000000000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_PROTO_ID     = 0x0080000000000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_CSUM         = 0x0040000000000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_SRC_ADDR     = 0x0020000000000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_O_IPV4_DST_ADDR     = 0x0010000000000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_SRC_PORT      = 0x0008000000000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT      = 0x0004000000000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_LENGTH        = 0x0002000000000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_CSUM          = 0x0001000000000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_FLAGS       = 0x0000800000000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_RSVD0       = 0x0000400000000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI         = 0x0000200000000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_RSVD1       = 0x0000100000000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC          = 0x0000080000000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC          = 0x0000040000000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_TYPE          = 0x0000020000000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_VER          = 0x0000010000000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_TOS          = 0x0000008000000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_LEN          = 0x0000004000000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_FRAG_ID      = 0x0000002000000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_FRAG_OFF     = 0x0000001000000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_TTL          = 0x0000000800000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_PROTO_ID     = 0x0000000400000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_CSUM         = 0x0000000200000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_SRC_ADDR     = 0x0000000100000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_I_IPV4_DST_ADDR     = 0x0000000080000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_SRC_PORT      = 0x0000000040000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_DST_PORT      = 0x0000000020000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_LENGTH        = 0x0000000010000000,
+       BNXT_ULP_HF_0_2_6_BITMASK_I_UDP_CSUM          = 0x0000000008000000
+};
+
+enum bnxt_ulp_hf_0_2_7_bitmask {
+       BNXT_ULP_HF_0_2_7_BITMASK_WM                  = 0x8000000000000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_SVIF_INDEX          = 0x4000000000000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_VER          = 0x2000000000000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_TOS          = 0x1000000000000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_LEN          = 0x0800000000000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_FRAG_ID      = 0x0400000000000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_FRAG_OFF     = 0x0200000000000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_TTL          = 0x0100000000000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_PROTO_ID     = 0x0080000000000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_CSUM         = 0x0040000000000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR     = 0x0020000000000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR     = 0x0010000000000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_SRC_PORT      = 0x0008000000000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT      = 0x0004000000000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_LENGTH        = 0x0002000000000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_CSUM          = 0x0001000000000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_FLAGS       = 0x0000800000000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_RSVD0       = 0x0000400000000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI         = 0x0000200000000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_RSVD1       = 0x0000100000000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC          = 0x0000080000000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC          = 0x0000040000000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_TYPE          = 0x0000020000000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_VER          = 0x0000010000000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_TOS          = 0x0000008000000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_LEN          = 0x0000004000000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_FRAG_ID      = 0x0000002000000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_FRAG_OFF     = 0x0000001000000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_TTL          = 0x0000000800000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_PROTO_ID     = 0x0000000400000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_CSUM         = 0x0000000200000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_SRC_ADDR     = 0x0000000100000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_I_IPV4_DST_ADDR     = 0x0000000080000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_I_ICMP_TYPE         = 0x0000000040000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_I_ICMP_CODE         = 0x0000000020000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_I_ICMP_CSUM         = 0x0000000010000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_I_ICMP_IDENT        = 0x0000000008000000,
+       BNXT_ULP_HF_0_2_7_BITMASK_I_ICMP_SEQ_NUM      = 0x0000000004000000
 };
 
 enum bnxt_ulp_hf_0_3_0_bitmask {

diff --git a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_tbl.c b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_tbl.c
index 3d1e95d..684fa66 100644 (file)
--- a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_tbl.c
+++ b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_tbl.c
@@ -3,7 +3,7 @@
  * All rights reserved.
  */
 
-/* date: Thu Jul  8 08:44:00 2021 */
+/* date: Tue Aug 17 12:16:42 2021 */
 
 #include "ulp_template_db_enum.h"
 #include "ulp_template_db_field.h"
@@ -131,6 +131,46 @@ struct bnxt_ulp_generic_tbl_params ulp_generic_tbl_params[] = {
        .num_buckets             = 8,
        .hash_tbl_entries        = 1024,
        .result_byte_order       = BNXT_ULP_BYTE_ORDER_LE
+       },
+       [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SOURCE_PROPERTY_CACHE << 1 |
+               BNXT_ULP_DIRECTION_INGRESS] = {
+       .name                    = "INGRESS GEN_TABLE_SOURCE_PROPERTY_CACHE",
+       .result_num_entries      = 0,
+       .result_num_bytes        = 6,
+       .key_num_bytes           = 10,
+       .num_buckets             = 4,
+       .hash_tbl_entries        = 0,
+       .result_byte_order       = BNXT_ULP_BYTE_ORDER_LE
+       },
+       [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SOURCE_PROPERTY_CACHE << 1 |
+                               BNXT_ULP_DIRECTION_EGRESS] = {
+       .name                    = "INGRESS GEN_TABLE_SOURCE_PROPERTY_CACHE",
+       .result_num_entries      = 128,
+       .result_num_bytes        = 6,
+       .key_num_bytes           = 10,
+       .num_buckets             = 4,
+       .hash_tbl_entries        = 512,
+       .result_byte_order       = BNXT_ULP_BYTE_ORDER_LE
+       },
+       [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_VXLAN_ENCAP_REC_CACHE << 1 |
+               BNXT_ULP_DIRECTION_INGRESS] = {
+       .name                    = "INGRESS GEN_TABLE_VXLAN_ENCAP_REC_CACHE",
+       .result_num_entries      = 0,
+       .result_num_bytes        = 6,
+       .key_num_bytes           = 17,
+       .num_buckets             = 8,
+       .hash_tbl_entries        = 0,
+       .result_byte_order       = BNXT_ULP_BYTE_ORDER_LE
+       },
+       [BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_VXLAN_ENCAP_REC_CACHE << 1 |
+               BNXT_ULP_DIRECTION_EGRESS] = {
+       .name                    = "INGRESS GEN_TABLE_VXLAN_ENCAP_REC_CACHE",
+       .result_num_entries      = 256,
+       .result_num_bytes        = 6,
+       .key_num_bytes           = 17,
+       .num_buckets             = 8,
+       .hash_tbl_entries        = 1024,
+       .result_byte_order       = BNXT_ULP_BYTE_ORDER_LE
        }
 };
 
@@ -222,6 +262,7 @@ struct bnxt_ulp_device_params ulp_device_params[BNXT_ULP_DEVICE_ID_LAST] = {
        .byte_count_shift        = 0,
        .packet_count_shift      = 36,
        .dynamic_pad_en          = 0,
+       .dynamic_sram_en         = 0,
        .dev_tbls                = ulp_template_wh_plus_tbls
        },
        [BNXT_ULP_DEVICE_ID_THOR] = {
@@ -246,12 +287,24 @@ struct bnxt_ulp_device_params ulp_device_params[BNXT_ULP_DEVICE_ID_LAST] = {
        .byte_count_shift        = 0,
        .packet_count_shift      = 35,
        .dynamic_pad_en          = 1,
+       .dynamic_sram_en         = 1,
+       .dyn_encap_list_size     = 4,
+       .dyn_encap_sizes         = {{64, TF_TBL_TYPE_ACT_ENCAP_8B},
+                                       {128, TF_TBL_TYPE_ACT_ENCAP_16B},
+                                       {256, TF_TBL_TYPE_ACT_ENCAP_32B},
+                                       {512, TF_TBL_TYPE_ACT_ENCAP_64B}},
+       .dyn_modify_list_size    = 4,
+       .dyn_modify_sizes        = {{64, TF_TBL_TYPE_ACT_MODIFY_8B},
+                                       {128, TF_TBL_TYPE_ACT_MODIFY_16B},
+                                       {256, TF_TBL_TYPE_ACT_MODIFY_32B},
+                                       {512, TF_TBL_TYPE_ACT_MODIFY_64B}},
        .em_blk_size_bits        = 100,
        .em_blk_align_bits       = 128,
        .em_key_align_bytes      = 80,
        .wc_slice_width          = 160,
        .wc_max_slices           = 4,
-       .wc_mode_list            = {0x0000000c, 0x0000000e, 0x0000000f, 0x0000000f},
+       .wc_mode_list            = {0x0000000c, 0x0000000e,
+                                       0x0000000f, 0x0000000f},
        .wc_mod_list_max_size    = 4,
        .wc_ctl_size_bits        = 32,
        .dev_tbls                = ulp_template_thor_tbls
@@ -307,6 +360,16 @@ struct bnxt_ulp_app_capabilities_info ulp_app_cap_info_list[] = {
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .flags                   = BNXT_ULP_APP_CAP_SHARED_EN |
                                   BNXT_ULP_APP_CAP_UNICAST_ONLY
+       },
+       {
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .flags                   = BNXT_ULP_APP_CAP_UNICAST_ONLY
+       },
+       {
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .flags                   = BNXT_ULP_APP_CAP_UNICAST_ONLY
        }
 };
 
@@ -1279,333 +1342,1261 @@ struct bnxt_ulp_glb_resource_info ulp_glb_resource_tbl[] = {
        .resource_type           = TF_TBL_TYPE_FULL_ACT_RECORD,
        .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR,
        .direction               = TF_DIR_TX
-       }
-};
-
-/* List of tf resources required to be reserved per app/device */
-struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
+       },
        {
-       .app_id                  = 0,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
-       .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
-       .resource_type           = TF_IDENT_TYPE_L2_CTXT_HIGH,
-       .count                   = 422
+       .resource_type           = TF_IDENT_TYPE_PROF_FUNC,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID,
+       .direction               = TF_DIR_RX
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
-       .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
-       .resource_type           = TF_IDENT_TYPE_L2_CTXT_LOW,
-       .count                   = 6
+       .resource_type           = TF_IDENT_TYPE_PROF_FUNC,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID,
+       .direction               = TF_DIR_TX
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
-       .direction               = TF_DIR_RX,
-       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
-       .resource_type           = TF_IDENT_TYPE_WC_PROF,
-       .count                   = 191
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_FULL_ACT_RECORD,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR,
+       .direction               = TF_DIR_TX
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
-       .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_PROF_FUNC,
-       .count                   = 63
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID,
+       .direction               = TF_DIR_RX
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
-       .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
-       .resource_type           = TF_IDENT_TYPE_EM_PROF,
-       .count                   = 192
+       .resource_type           = TF_IDENT_TYPE_PROF_FUNC,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID,
+       .direction               = TF_DIR_TX
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
-       .direction               = TF_DIR_RX,
-       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-       .resource_type           = TF_TBL_TYPE_FULL_ACT_RECORD,
-       .count                   = 8192
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_PROF_FUNC,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID,
+       .direction               = TF_DIR_RX
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
-       .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-       .resource_type           = TF_TBL_TYPE_ACT_STATS_64,
-       .count                   = 6912
+       .resource_type           = TF_TBL_TYPE_ACT_ENCAP_16B,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR,
+       .direction               = TF_DIR_RX
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
-       .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-       .resource_type           = TF_TBL_TYPE_ACT_MODIFY_IPV4,
-       .count                   = 1023
+       .resource_type           = TF_TBL_TYPE_ACT_ENCAP_16B,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR,
+       .direction               = TF_DIR_TX
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
-       .direction               = TF_DIR_RX,
-       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-       .resource_type           = TF_TBL_TYPE_ACT_ENCAP_8B,
-       .count                   = 511
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_EM_PROF,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0,
+       .direction               = TF_DIR_RX
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
-       .direction               = TF_DIR_RX,
-       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-       .resource_type           = TF_TBL_TYPE_ACT_ENCAP_16B,
-       .count                   = 15
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_WC_PROF,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0,
+       .direction               = TF_DIR_RX
        },
        {
-       .app_id                  = 0,
-       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
-       .direction               = TF_DIR_RX,
-       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-       .resource_type           = TF_TBL_TYPE_ACT_SP_SMAC,
-       .count                   = 255
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_PROF_FUNC,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID,
+       .direction               = TF_DIR_RX
        },
        {
-       .app_id                  = 0,
-       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
-       .direction               = TF_DIR_RX,
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_PROF_FUNC,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID,
+       .direction               = TF_DIR_TX
+       },
+       {
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-       .resource_type           = TF_TBL_TYPE_MIRROR_CONFIG,
-       .count                   = 1
+       .resource_type           = TF_TBL_TYPE_FULL_ACT_RECORD,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR,
+       .direction               = TF_DIR_TX
        },
        {
-       .app_id                  = 0,
-       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
-       .direction               = TF_DIR_RX,
-       .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-       .resource_type           = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
-       .count                   = 422
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_PROF_FUNC,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID,
+       .direction               = TF_DIR_RX
        },
        {
-       .app_id                  = 0,
-       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
-       .direction               = TF_DIR_RX,
-       .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-       .resource_type           = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
-       .count                   = 6
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_PROF_FUNC,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID,
+       .direction               = TF_DIR_TX
        },
        {
-       .app_id                  = 0,
-       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
-       .direction               = TF_DIR_RX,
-       .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-       .resource_type           = TF_TCAM_TBL_TYPE_PROF_TCAM,
-       .count                   = 960
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_PROF_FUNC,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID,
+       .direction               = TF_DIR_RX
        },
        {
-       .app_id                  = 0,
-       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
-       .direction               = TF_DIR_RX,
-       .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-       .resource_type           = TF_TCAM_TBL_TYPE_WC_TCAM,
-       .count                   = 88
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_PROF_FUNC,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GRE_PROF_FUNC_ID,
+       .direction               = TF_DIR_RX
        },
        {
-       .app_id                  = 0,
-       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
-       .direction               = TF_DIR_RX,
-       .resource_func           = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,
-       .resource_type           = TF_EM_TBL_TYPE_EM_RECORD,
-       .count                   = 13168
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_ACT_ENCAP_16B,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR,
+       .direction               = TF_DIR_RX
        },
        {
-       .app_id                  = 0,
-       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
-       .direction               = TF_DIR_RX,
-       .resource_func           = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,
-       .resource_type           = TF_EM_TBL_TYPE_TBL_SCOPE,
-       .count                   = 1
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_ACT_ENCAP_16B,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR,
+       .direction               = TF_DIR_TX
        },
        {
-       .app_id                  = 0,
-       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
-       .direction               = TF_DIR_TX,
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
-       .resource_type           = TF_IDENT_TYPE_L2_CTXT_HIGH,
-       .count                   = 292
+       .resource_type           = TF_IDENT_TYPE_WC_PROF,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0,
+       .direction               = TF_DIR_RX
        },
        {
-       .app_id                  = 0,
-       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
-       .direction               = TF_DIR_TX,
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
-       .resource_type           = TF_IDENT_TYPE_L2_CTXT_LOW,
-       .count                   = 148
+       .resource_type           = TF_IDENT_TYPE_WC_PROF,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1,
+       .direction               = TF_DIR_RX
        },
        {
-       .app_id                  = 0,
-       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
-       .direction               = TF_DIR_TX,
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_WC_PROF,
-       .count                   = 191
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2,
+       .direction               = TF_DIR_RX
        },
        {
-       .app_id                  = 0,
-       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
-       .direction               = TF_DIR_TX,
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
-       .resource_type           = TF_IDENT_TYPE_PROF_FUNC,
-       .count                   = 63
+       .resource_type           = TF_IDENT_TYPE_WC_PROF,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3,
+       .direction               = TF_DIR_RX
        },
        {
-       .app_id                  = 0,
-       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
-       .direction               = TF_DIR_TX,
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
-       .resource_type           = TF_IDENT_TYPE_EM_PROF,
-       .count                   = 192
+       .resource_type           = TF_IDENT_TYPE_WC_PROF,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_4,
+       .direction               = TF_DIR_RX
        },
        {
-       .app_id                  = 0,
-       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
-       .direction               = TF_DIR_TX,
-       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-       .resource_type           = TF_TBL_TYPE_FULL_ACT_RECORD,
-       .count                   = 8192
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_WC_PROF,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_5,
+       .direction               = TF_DIR_RX
        },
        {
-       .app_id                  = 0,
-       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_WC_PROF,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_6,
+       .direction               = TF_DIR_RX
+       },
+       {
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_WC_PROF,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_7,
+       .direction               = TF_DIR_RX
+       },
+       {
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_WC_FKB,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0,
+       .direction               = TF_DIR_RX
+       },
+       {
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_WC_FKB,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1,
+       .direction               = TF_DIR_RX
+       },
+       {
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_WC_FKB,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_2,
+       .direction               = TF_DIR_RX
+       },
+       {
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_WC_FKB,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_3,
+       .direction               = TF_DIR_RX
+       },
+       {
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_WC_FKB,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_4,
+       .direction               = TF_DIR_RX
+       },
+       {
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_WC_FKB,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0,
+       .direction               = TF_DIR_TX
+       },
+       {
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_WC_FKB,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1,
+       .direction               = TF_DIR_TX
+       },
+       {
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_WC_PROF,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0,
+       .direction               = TF_DIR_TX
+       },
+       {
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_WC_PROF,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1,
+       .direction               = TF_DIR_TX
+       },
+       {
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_EM_PROF,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0,
+       .direction               = TF_DIR_RX
+       },
+       {
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_EM_PROF,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_1,
+       .direction               = TF_DIR_RX
+       },
+       {
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_EM_PROF,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_2,
+       .direction               = TF_DIR_RX
+       },
+       {
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_EM_PROF,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_3,
+       .direction               = TF_DIR_RX
+       },
+       {
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_EM_PROF,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_4,
+       .direction               = TF_DIR_RX
+       },
+       {
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_EM_PROF,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_5,
+       .direction               = TF_DIR_RX
+       },
+       {
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_EM_PROF,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_6,
+       .direction               = TF_DIR_RX
+       },
+       {
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_EM_PROF,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_7,
+       .direction               = TF_DIR_RX
+       },
+       {
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_EM_FKB,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_0,
+       .direction               = TF_DIR_RX
+       },
+       {
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_EM_FKB,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_1,
+       .direction               = TF_DIR_RX
+       },
+       {
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_EM_FKB,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_2,
+       .direction               = TF_DIR_RX
+       },
+       {
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_EM_FKB,
+       .glb_regfile_index       = BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_3,
+       .direction               = TF_DIR_RX
+       }
+};
+
+/* List of tf resources required to be reserved per app/device */
+struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_L2_CTXT_HIGH,
+       .count                   = 422
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_L2_CTXT_LOW,
+       .count                   = 6
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_WC_PROF,
+       .count                   = 191
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_PROF_FUNC,
+       .count                   = 63
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_EM_PROF,
+       .count                   = 192
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_FULL_ACT_RECORD,
+       .count                   = 8192
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_ACT_STATS_64,
+       .count                   = 6912
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_ACT_MODIFY_IPV4,
+       .count                   = 1023
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_ACT_ENCAP_8B,
+       .count                   = 511
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_ACT_ENCAP_16B,
+       .count                   = 15
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_ACT_SP_SMAC,
+       .count                   = 255
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_MIRROR_CONFIG,
+       .count                   = 1
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+       .resource_type           = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
+       .count                   = 422
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+       .resource_type           = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
+       .count                   = 6
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+       .resource_type           = TF_TCAM_TBL_TYPE_PROF_TCAM,
+       .count                   = 960
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+       .resource_type           = TF_TCAM_TBL_TYPE_WC_TCAM,
+       .count                   = 88
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,
+       .resource_type           = TF_EM_TBL_TYPE_EM_RECORD,
+       .count                   = 13168
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,
+       .resource_type           = TF_EM_TBL_TYPE_TBL_SCOPE,
+       .count                   = 1
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_L2_CTXT_HIGH,
+       .count                   = 292
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_L2_CTXT_LOW,
+       .count                   = 148
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_WC_PROF,
+       .count                   = 191
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_PROF_FUNC,
+       .count                   = 63
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_EM_PROF,
+       .count                   = 192
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_FULL_ACT_RECORD,
+       .count                   = 8192
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_ACT_STATS_64,
+       .count                   = 6912
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_ACT_MODIFY_IPV4,
+       .count                   = 1023
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_ACT_ENCAP_64B,
+       .count                   = 511
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_ACT_ENCAP_16B,
+       .count                   = 223
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_ACT_ENCAP_8B,
+       .count                   = 255
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_ACT_SP_SMAC_IPV4,
+       .count                   = 488
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_ACT_SP_SMAC_IPV6,
+       .count                   = 511
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_MIRROR_CONFIG,
+       .count                   = 1
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+       .resource_type           = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
+       .count                   = 292
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+       .resource_type           = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
+       .count                   = 144
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+       .resource_type           = TF_TCAM_TBL_TYPE_PROF_TCAM,
+       .count                   = 960
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+       .resource_type           = TF_TCAM_TBL_TYPE_WC_TCAM,
+       .count                   = 928
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,
+       .resource_type           = TF_EM_TBL_TYPE_EM_RECORD,
+       .count                   = 15232
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,
+       .resource_type           = TF_EM_TBL_TYPE_TBL_SCOPE,
+       .count                   = 1
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_L2_CTXT_HIGH,
+       .count                   = 272
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_L2_CTXT_LOW,
+       .count                   = 6
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_WC_PROF,
+       .count                   = 32
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_PROF_FUNC,
+       .count                   = 32
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_EM_PROF,
+       .count                   = 32
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_FULL_ACT_RECORD,
+       .count                   = 8192
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_ACT_STATS_64,
+       .count                   = 8192
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_MIRROR_CONFIG,
+       .count                   = 5
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_EM_FKB,
+       .count                   = 32
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_WC_FKB,
+       .count                   = 31
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_ACT_ENCAP_64B,
+       .count                   = 64
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_ACT_SP_SMAC_IPV4,
+       .count                   = 64
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+       .resource_type           = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
+       .count                   = 272
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+       .resource_type           = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
+       .count                   = 6
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+       .resource_type           = TF_TCAM_TBL_TYPE_PROF_TCAM,
+       .count                   = 128
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+       .resource_type           = TF_TCAM_TBL_TYPE_WC_TCAM,
+       .count                   = 4096
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,
+       .resource_type           = TF_EM_TBL_TYPE_EM_RECORD,
+       .count                   = 16384
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_L2_CTXT_LOW,
+       .count                   = 272
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_WC_PROF,
+       .count                   = 32
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_PROF_FUNC,
+       .count                   = 63
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_EM_PROF,
+       .count                   = 32
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_FULL_ACT_RECORD,
+       .count                   = 8192
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_ACT_STATS_64,
+       .count                   = 8192
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_MIRROR_CONFIG,
+       .count                   = 5
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_EM_FKB,
+       .count                   = 32
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_WC_FKB,
+       .count                   = 32
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_ACT_ENCAP_64B,
+       .count                   = 64
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_ACT_SP_SMAC_IPV4,
+       .count                   = 100
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_ACT_MODIFY_64B,
+       .count                   = 32
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+       .resource_type           = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
+       .count                   = 272
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+       .resource_type           = TF_TCAM_TBL_TYPE_PROF_TCAM,
+       .count                   = 128
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+       .resource_type           = TF_TCAM_TBL_TYPE_WC_TCAM,
+       .count                   = 4096
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,
+       .resource_type           = TF_EM_TBL_TYPE_EM_RECORD,
+       .count                   = 16384
+       },
+       {
+       .app_id                  = 0,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_METADATA,
+       .count                   = 1
+       },
+       {
+       .app_id                  = 1,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_L2_CTXT_HIGH,
+       .count                   = 32
+       },
+       {
+       .app_id                  = 1,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_L2_CTXT_LOW,
+       .count                   = 2
+       },
+       {
+       .app_id                  = 1,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_WC_PROF,
+       .count                   = 4
+       },
+       {
+       .app_id                  = 1,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_PROF_FUNC,
+       .count                   = 4
+       },
+       {
+       .app_id                  = 1,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_EM_PROF,
+       .count                   = 4
+       },
+       {
+       .app_id                  = 1,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_FULL_ACT_RECORD,
+       .count                   = 128
+       },
+       {
+       .app_id                  = 1,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_ACT_STATS_64,
+       .count                   = 128
+       },
+       {
+       .app_id                  = 1,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_ACT_MODIFY_IPV4,
+       .count                   = 4
+       },
+       {
+       .app_id                  = 1,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_ACT_ENCAP_8B,
+       .count                   = 4
+       },
+       {
+       .app_id                  = 1,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_ACT_ENCAP_16B,
+       .count                   = 4
+       },
+       {
+       .app_id                  = 1,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_ACT_SP_SMAC,
+       .count                   = 4
+       },
+       {
+       .app_id                  = 1,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+       .resource_type           = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
+       .count                   = 32
+       },
+       {
+       .app_id                  = 1,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+       .resource_type           = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
+       .count                   = 2
+       },
+       {
+       .app_id                  = 1,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+       .resource_type           = TF_TCAM_TBL_TYPE_PROF_TCAM,
+       .count                   = 32
+       },
+       {
+       .app_id                  = 1,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+       .resource_type           = TF_TCAM_TBL_TYPE_WC_TCAM,
+       .count                   = 4
+       },
+       {
+       .app_id                  = 1,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,
+       .resource_type           = TF_EM_TBL_TYPE_EM_RECORD,
+       .count                   = 1024
+       },
+       {
+       .app_id                  = 1,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_L2_CTXT_HIGH,
+       .count                   = 32
+       },
+       {
+       .app_id                  = 1,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_L2_CTXT_LOW,
+       .count                   = 2
+       },
+       {
+       .app_id                  = 1,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_WC_PROF,
+       .count                   = 4
+       },
+       {
+       .app_id                  = 1,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_PROF_FUNC,
+       .count                   = 4
+       },
+       {
+       .app_id                  = 1,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .resource_type           = TF_IDENT_TYPE_EM_PROF,
+       .count                   = 4
+       },
+       {
+       .app_id                  = 1,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_FULL_ACT_RECORD,
+       .count                   = 128
+       },
+       {
+       .app_id                  = 1,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_ACT_STATS_64,
-       .count                   = 6912
+       .count                   = 128
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_ACT_MODIFY_IPV4,
-       .count                   = 1023
+       .count                   = 4
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_ACT_ENCAP_64B,
-       .count                   = 511
+       .count                   = 4
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_ACT_ENCAP_16B,
-       .count                   = 223
+       .count                   = 4
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_ACT_ENCAP_8B,
-       .count                   = 255
+       .count                   = 4
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_ACT_SP_SMAC_IPV4,
-       .count                   = 488
+       .count                   = 4
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_ACT_SP_SMAC_IPV6,
-       .count                   = 511
-       },
-       {
-       .app_id                  = 0,
-       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
-       .direction               = TF_DIR_TX,
-       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-       .resource_type           = TF_TBL_TYPE_MIRROR_CONFIG,
-       .count                   = 1
+       .count                   = 4
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
-       .count                   = 292
+       .count                   = 32
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
-       .count                   = 144
+       .count                   = 2
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_PROF_TCAM,
-       .count                   = 960
+       .count                   = 32
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_WC_TCAM,
-       .count                   = 928
+       .count                   = 4
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,
        .resource_type           = TF_EM_TBL_TYPE_EM_RECORD,
-       .count                   = 15232
-       },
-       {
-       .app_id                  = 0,
-       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
-       .direction               = TF_DIR_TX,
-       .resource_func           = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,
-       .resource_type           = TF_EM_TBL_TYPE_TBL_SCOPE,
-       .count                   = 1
+       .count                   = 1024
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_L2_CTXT_HIGH,
-       .count                   = 422
+       .count                   = 32
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_L2_CTXT_LOW,
-       .count                   = 6
+       .count                   = 2
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
@@ -1613,15 +2604,15 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 32
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_PROF_FUNC,
-       .count                   = 32
+       .count                   = 16
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
@@ -1629,255 +2620,223 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 32
        },
        {
-       .app_id                  = 0,
-       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
-       .direction               = TF_DIR_RX,
-       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-       .resource_type           = TF_TBL_TYPE_FULL_ACT_RECORD,
-       .count                   = 2048
-       },
-       {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
-       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-       .resource_type           = TF_TBL_TYPE_ACT_STATS_64,
-       .count                   = 512
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_FULL_ACT_RECORD,
+       .count                   = 528
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-       .resource_type           = TF_TBL_TYPE_MIRROR_CONFIG,
-       .count                   = 5
+       .resource_type           = TF_TBL_TYPE_ACT_STATS_64,
+       .count                   = 256
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_EM_FKB,
-       .count                   = 32
+       .count                   = 4
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_WC_FKB,
-       .count                   = 31
+       .count                   = 4
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_ACT_ENCAP_64B,
-       .count                   = 64
+       .count                   = 4
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_ACT_SP_SMAC_IPV4,
-       .count                   = 64
+       .count                   = 4
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
-       .count                   = 300
+       .count                   = 32
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
-       .count                   = 6
+       .count                   = 2
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_PROF_TCAM,
-       .count                   = 128
+       .count                   = 32
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_WC_TCAM,
-       .count                   = 2048
+       .count                   = 4
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,
        .resource_type           = TF_EM_TBL_TYPE_EM_RECORD,
-       .count                   = 13200
+       .count                   = 1024
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_L2_CTXT_HIGH,
-       .count                   = 26
+       .count                   = 32
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_L2_CTXT_LOW,
-       .count                   = 26
+       .count                   = 2
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_WC_PROF,
-       .count                   = 32
+       .count                   = 4
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_PROF_FUNC,
-       .count                   = 63
+       .count                   = 4
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_EM_PROF,
-       .count                   = 32
+       .count                   = 4
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_FULL_ACT_RECORD,
-       .count                   = 1023
-       },
-       {
-       .app_id                  = 0,
-       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
-       .direction               = TF_DIR_TX,
-       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-       .resource_type           = TF_TBL_TYPE_ACT_STATS_64,
        .count                   = 512
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-       .resource_type           = TF_TBL_TYPE_MIRROR_CONFIG,
-       .count                   = 5
+       .resource_type           = TF_TBL_TYPE_ACT_STATS_64,
+       .count                   = 256
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_EM_FKB,
-       .count                   = 32
+       .count                   = 4
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_WC_FKB,
-       .count                   = 32
+       .count                   = 4
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_ACT_ENCAP_64B,
-       .count                   = 64
+       .count                   = 4
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_ACT_SP_SMAC_IPV4,
-       .count                   = 100
-       },
-       {
-       .app_id                  = 0,
-       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
-       .direction               = TF_DIR_TX,
-       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-       .resource_type           = TF_TBL_TYPE_ACT_MODIFY_64B,
-       .count                   = 32
+       .count                   = 4
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
-       .count                   = 200
+       .count                   = 32
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
-       .count                   = 110
+       .count                   = 2
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_PROF_TCAM,
-       .count                   = 128
+       .count                   = 32
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_WC_TCAM,
-       .count                   = 2048
+       .count                   = 4
        },
        {
-       .app_id                  = 0,
+       .app_id                  = 1,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,
        .resource_type           = TF_EM_TBL_TYPE_EM_RECORD,
-       .count                   = 15232
-       },
-       {
-       .app_id                  = 0,
-       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
-       .direction               = TF_DIR_TX,
-       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-       .resource_type           = TF_TBL_TYPE_METADATA,
-       .count                   = 1
+       .count                   = 1024
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
@@ -1885,7 +2844,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 32
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
@@ -1893,7 +2852,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 2
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
@@ -1901,7 +2860,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 4
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
@@ -1909,7 +2868,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 4
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
@@ -1917,7 +2876,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 4
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -1925,7 +2884,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 128
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -1933,7 +2892,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 128
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -1941,7 +2900,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 4
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -1949,7 +2908,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 4
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -1957,7 +2916,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 4
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -1965,7 +2924,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 4
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
@@ -1973,7 +2932,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 32
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
@@ -1981,7 +2940,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 2
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
@@ -1989,15 +2948,15 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 32
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_WC_TCAM,
-       .count                   = 4
+       .count                   = 64
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,
@@ -2005,7 +2964,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 1024
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
@@ -2013,7 +2972,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 32
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
@@ -2021,7 +2980,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 2
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
@@ -2029,7 +2988,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 4
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
@@ -2037,7 +2996,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 4
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
@@ -2045,7 +3004,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 4
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -2053,7 +3012,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 128
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -2061,7 +3020,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 128
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -2069,7 +3028,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 4
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -2077,7 +3036,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 4
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -2085,7 +3044,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 4
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -2093,7 +3052,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 4
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -2101,7 +3060,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 4
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -2109,7 +3068,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 4
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
@@ -2117,7 +3076,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 32
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
@@ -2125,7 +3084,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 2
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
@@ -2133,7 +3092,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 32
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
@@ -2141,7 +3100,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 4
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,
@@ -2149,7 +3108,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 1024
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
@@ -2157,7 +3116,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 32
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
@@ -2165,7 +3124,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 2
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
@@ -2173,7 +3132,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 32
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
@@ -2181,7 +3140,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 16
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
@@ -2189,7 +3148,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 32
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -2197,7 +3156,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 528
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -2205,7 +3164,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 256
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -2213,7 +3172,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 4
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -2221,7 +3180,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 4
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -2229,7 +3188,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 4
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -2237,7 +3196,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 4
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
@@ -2245,7 +3204,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 32
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
@@ -2253,7 +3212,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 2
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
@@ -2261,15 +3220,15 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 32
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_WC_TCAM,
-       .count                   = 4
+       .count                   = 512
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,
@@ -2277,7 +3236,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 1024
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
@@ -2285,7 +3244,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 32
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
@@ -2293,7 +3252,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 2
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
@@ -2301,7 +3260,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 4
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
@@ -2309,7 +3268,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 4
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
@@ -2317,7 +3276,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 4
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -2325,7 +3284,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 512
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -2333,7 +3292,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 256
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -2341,7 +3300,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 4
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -2349,7 +3308,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 4
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -2357,7 +3316,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 4
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -2365,7 +3324,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 4
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
@@ -2373,7 +3332,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 32
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
@@ -2381,7 +3340,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 2
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
@@ -2389,7 +3348,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 32
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
@@ -2397,7 +3356,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 4
        },
        {
-       .app_id                  = 1,
+       .app_id                  = 2,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,
@@ -2405,532 +3364,596 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
        .count                   = 1024
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_L2_CTXT_HIGH,
-       .count                   = 32
+       .count                   = 422
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_L2_CTXT_LOW,
-       .count                   = 2
+       .count                   = 6
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_WC_PROF,
-       .count                   = 4
+       .count                   = 191
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_PROF_FUNC,
-       .count                   = 4
+       .count                   = 63
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_EM_PROF,
-       .count                   = 4
+       .count                   = 192
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_FULL_ACT_RECORD,
-       .count                   = 128
+       .count                   = 8192
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_ACT_STATS_64,
-       .count                   = 128
+       .count                   = 7168
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_ACT_MODIFY_IPV4,
-       .count                   = 4
+       .count                   = 1023
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_ACT_ENCAP_8B,
-       .count                   = 4
+       .count                   = 511
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_ACT_ENCAP_16B,
-       .count                   = 4
+       .count                   = 15
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_ACT_SP_SMAC,
-       .count                   = 4
+       .count                   = 255
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_MIRROR_CONFIG,
+       .count                   = 1
+       },
+       {
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
-       .count                   = 32
+       .count                   = 422
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
-       .count                   = 2
+       .count                   = 6
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_PROF_TCAM,
-       .count                   = 32
+       .count                   = 960
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_WC_TCAM,
-       .count                   = 64
+       .count                   = 88
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,
        .resource_type           = TF_EM_TBL_TYPE_EM_RECORD,
-       .count                   = 1024
+       .count                   = 13168
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,
+       .resource_type           = TF_EM_TBL_TYPE_TBL_SCOPE,
+       .count                   = 1
+       },
+       {
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_L2_CTXT_HIGH,
-       .count                   = 32
+       .count                   = 292
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_L2_CTXT_LOW,
-       .count                   = 2
+       .count                   = 148
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_WC_PROF,
-       .count                   = 4
+       .count                   = 191
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_PROF_FUNC,
-       .count                   = 4
+       .count                   = 63
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_EM_PROF,
-       .count                   = 4
+       .count                   = 192
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_FULL_ACT_RECORD,
-       .count                   = 128
+       .count                   = 8192
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_ACT_STATS_64,
-       .count                   = 128
+       .count                   = 7168
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_ACT_MODIFY_IPV4,
-       .count                   = 4
+       .count                   = 1023
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_ACT_ENCAP_64B,
-       .count                   = 4
+       .count                   = 511
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_ACT_ENCAP_16B,
-       .count                   = 4
+       .count                   = 223
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_ACT_ENCAP_8B,
-       .count                   = 4
+       .count                   = 255
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_ACT_SP_SMAC_IPV4,
-       .count                   = 4
+       .count                   = 488
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_ACT_SP_SMAC_IPV6,
-       .count                   = 4
+       .count                   = 511
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_MIRROR_CONFIG,
+       .count                   = 1
+       },
+       {
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
-       .count                   = 32
+       .count                   = 292
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
-       .count                   = 2
+       .count                   = 144
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_PROF_TCAM,
-       .count                   = 32
+       .count                   = 960
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_WC_TCAM,
-       .count                   = 4
+       .count                   = 928
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,
        .resource_type           = TF_EM_TBL_TYPE_EM_RECORD,
-       .count                   = 1024
+       .count                   = 15232
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_WH_PLUS,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,
+       .resource_type           = TF_EM_TBL_TYPE_TBL_SCOPE,
+       .count                   = 1
+       },
+       {
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_L2_CTXT_HIGH,
-       .count                   = 32
+       .count                   = 128
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_L2_CTXT_LOW,
-       .count                   = 2
+       .count                   = 6
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_WC_PROF,
-       .count                   = 32
+       .count                   = 128
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_PROF_FUNC,
-       .count                   = 16
+       .count                   = 63
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_EM_PROF,
-       .count                   = 32
+       .count                   = 128
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_FULL_ACT_RECORD,
-       .count                   = 528
+       .count                   = 4096
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_ACT_STATS_64,
-       .count                   = 256
+       .count                   = 1024
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_MIRROR_CONFIG,
+       .count                   = 1
+       },
+       {
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_EM_FKB,
-       .count                   = 4
+       .count                   = 32
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_WC_FKB,
-       .count                   = 4
+       .count                   = 32
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_ACT_ENCAP_64B,
-       .count                   = 4
+       .count                   = 1024
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_ACT_SP_SMAC_IPV4,
-       .count                   = 4
+       .count                   = 1024
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_RX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_ACT_MODIFY_64B,
+       .count                   = 1024
+       },
+       {
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
-       .count                   = 32
+       .count                   = 128
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
-       .count                   = 2
+       .count                   = 6
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_PROF_TCAM,
-       .count                   = 32
+       .count                   = 128
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_WC_TCAM,
-       .count                   = 512
+       .count                   = 2048
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_RX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,
        .resource_type           = TF_EM_TBL_TYPE_EM_RECORD,
-       .count                   = 1024
+       .count                   = 6144
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_L2_CTXT_HIGH,
-       .count                   = 32
+       .count                   = 128
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_L2_CTXT_LOW,
-       .count                   = 2
+       .count                   = 6
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_WC_PROF,
-       .count                   = 4
+       .count                   = 128
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_PROF_FUNC,
-       .count                   = 4
+       .count                   = 63
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
        .resource_type           = TF_IDENT_TYPE_EM_PROF,
-       .count                   = 4
+       .count                   = 128
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_FULL_ACT_RECORD,
-       .count                   = 512
+       .count                   = 4096
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_ACT_STATS_64,
-       .count                   = 256
+       .count                   = 1024
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_MIRROR_CONFIG,
+       .count                   = 1
+       },
+       {
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_EM_FKB,
-       .count                   = 4
+       .count                   = 32
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_WC_FKB,
-       .count                   = 4
+       .count                   = 32
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_ACT_ENCAP_64B,
-       .count                   = 4
+       .count                   = 1024
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type           = TF_TBL_TYPE_ACT_SP_SMAC_IPV4,
-       .count                   = 4
+       .count                   = 1024
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
+       .device_id               = BNXT_ULP_DEVICE_ID_THOR,
+       .direction               = TF_DIR_TX,
+       .resource_func           = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type           = TF_TBL_TYPE_ACT_MODIFY_64B,
+       .count                   = 1024
+       },
+       {
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
-       .count                   = 32
+       .count                   = 128
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
-       .count                   = 2
+       .count                   = 6
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_PROF_TCAM,
-       .count                   = 32
+       .count                   = 128
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type           = TF_TCAM_TBL_TYPE_WC_TCAM,
-       .count                   = 4
+       .count                   = 2048
        },
        {
-       .app_id                  = 2,
+       .app_id                  = 3,
        .device_id               = BNXT_ULP_DEVICE_ID_THOR,
        .direction               = TF_DIR_TX,
        .resource_func           = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,
        .resource_type           = TF_EM_TBL_TYPE_EM_RECORD,
-       .count                   = 1024
+       .count                   = 6144
        }
 };
 
@@ -3322,25 +4345,23 @@ uint8_t ulp_glb_field_tbl[] = {
        [4229] = 21,
        [4231] = 22,
        [4244] = 2,
-       [4245] = 23,
        [4246] = 3,
-       [4247] = 24,
        [4248] = 4,
-       [4249] = 25,
        [4250] = 5,
-       [4251] = 26,
        [4252] = 6,
-       [4253] = 27,
        [4254] = 7,
-       [4255] = 28,
        [4256] = 8,
-       [4257] = 29,
        [4258] = 9,
-       [4259] = 30,
        [4260] = 10,
-       [4261] = 31,
        [4262] = 11,
-       [4263] = 32,
+       [4265] = 23,
+       [4267] = 24,
+       [4269] = 25,
+       [4271] = 26,
+       [4273] = 27,
+       [4275] = 28,
+       [4277] = 29,
+       [4279] = 30,
        [4298] = 12,
        [4300] = 13,
        [4302] = 14,
@@ -3374,15 +4395,6 @@ uint8_t ulp_glb_field_tbl[] = {
        [4389] = 31,
        [4390] = 11,
        [4391] = 32,
-       [4409] = 33,
-       [4411] = 34,
-       [4413] = 35,
-       [4415] = 36,
-       [4417] = 37,
-       [4419] = 38,
-       [4421] = 39,
-       [4423] = 40,
-       [4425] = 41,
        [4426] = 12,
        [4428] = 13,
        [4430] = 14,
@@ -3397,33 +4409,36 @@ uint8_t ulp_glb_field_tbl[] = {
        [4485] = 21,
        [4487] = 22,
        [4500] = 2,
-       [4501] = 23,
        [4502] = 3,
-       [4503] = 24,
        [4504] = 4,
-       [4505] = 25,
        [4506] = 5,
-       [4507] = 26,
        [4508] = 6,
-       [4509] = 27,
        [4510] = 7,
-       [4511] = 28,
        [4512] = 8,
-       [4513] = 29,
        [4514] = 9,
-       [4515] = 30,
        [4516] = 10,
-       [4517] = 31,
        [4518] = 11,
-       [4519] = 32,
+       [4521] = 23,
+       [4523] = 24,
+       [4525] = 25,
+       [4527] = 26,
+       [4529] = 27,
+       [4531] = 28,
+       [4533] = 29,
+       [4535] = 30,
+       [4537] = 31,
+       [4539] = 32,
+       [4541] = 33,
+       [4543] = 34,
+       [4545] = 35,
+       [4547] = 36,
+       [4549] = 37,
+       [4551] = 38,
+       [4553] = 39,
        [4554] = 12,
-       [4555] = 33,
        [4556] = 13,
-       [4557] = 34,
        [4558] = 14,
-       [4559] = 35,
        [4560] = 15,
-       [4561] = 36,
        [4574] = 16,
        [4575] = 17,
        [4576] = 18,
@@ -3433,11 +4448,6 @@ uint8_t ulp_glb_field_tbl[] = {
        [4611] = 20,
        [4613] = 21,
        [4615] = 22,
-       [4619] = 33,
-       [4621] = 34,
-       [4623] = 35,
-       [4625] = 36,
-       [4627] = 37,
        [4628] = 2,
        [4629] = 23,
        [4630] = 3,
@@ -3458,6 +4468,15 @@ uint8_t ulp_glb_field_tbl[] = {
        [4645] = 31,
        [4646] = 11,
        [4647] = 32,
+       [4665] = 33,
+       [4667] = 34,
+       [4669] = 35,
+       [4671] = 36,
+       [4673] = 37,
+       [4675] = 38,
+       [4677] = 39,
+       [4679] = 40,
+       [4681] = 41,
        [4682] = 12,
        [4684] = 13,
        [4686] = 14,
@@ -3466,6 +4485,116 @@ uint8_t ulp_glb_field_tbl[] = {
        [4703] = 17,
        [4704] = 18,
        [4705] = 19,
+       [4736] = 0,
+       [4737] = 1,
+       [4739] = 20,
+       [4741] = 21,
+       [4743] = 22,
+       [4756] = 2,
+       [4758] = 3,
+       [4760] = 4,
+       [4762] = 5,
+       [4764] = 6,
+       [4766] = 7,
+       [4768] = 8,
+       [4770] = 9,
+       [4772] = 10,
+       [4774] = 11,
+       [4777] = 23,
+       [4779] = 24,
+       [4781] = 25,
+       [4783] = 26,
+       [4785] = 27,
+       [4787] = 28,
+       [4789] = 29,
+       [4791] = 30,
+       [4810] = 12,
+       [4811] = 31,
+       [4812] = 13,
+       [4813] = 32,
+       [4814] = 14,
+       [4815] = 33,
+       [4816] = 15,
+       [4817] = 34,
+       [4830] = 16,
+       [4831] = 17,
+       [4832] = 18,
+       [4833] = 19,
+       [4864] = 0,
+       [4865] = 1,
+       [4867] = 20,
+       [4869] = 21,
+       [4871] = 22,
+       [4884] = 2,
+       [4885] = 23,
+       [4886] = 3,
+       [4887] = 24,
+       [4888] = 4,
+       [4889] = 25,
+       [4890] = 5,
+       [4891] = 26,
+       [4892] = 6,
+       [4893] = 27,
+       [4894] = 7,
+       [4895] = 28,
+       [4896] = 8,
+       [4897] = 29,
+       [4898] = 9,
+       [4899] = 30,
+       [4900] = 10,
+       [4901] = 31,
+       [4902] = 11,
+       [4903] = 32,
+       [4938] = 12,
+       [4939] = 33,
+       [4940] = 13,
+       [4941] = 34,
+       [4942] = 14,
+       [4943] = 35,
+       [4944] = 15,
+       [4945] = 36,
+       [4958] = 16,
+       [4959] = 17,
+       [4960] = 18,
+       [4961] = 19,
+       [4992] = 0,
+       [4993] = 1,
+       [4995] = 20,
+       [4997] = 21,
+       [4999] = 22,
+       [5003] = 33,
+       [5005] = 34,
+       [5007] = 35,
+       [5009] = 36,
+       [5011] = 37,
+       [5012] = 2,
+       [5013] = 23,
+       [5014] = 3,
+       [5015] = 24,
+       [5016] = 4,
+       [5017] = 25,
+       [5018] = 5,
+       [5019] = 26,
+       [5020] = 6,
+       [5021] = 27,
+       [5022] = 7,
+       [5023] = 28,
+       [5024] = 8,
+       [5025] = 29,
+       [5026] = 9,
+       [5027] = 30,
+       [5028] = 10,
+       [5029] = 31,
+       [5030] = 11,
+       [5031] = 32,
+       [5066] = 12,
+       [5068] = 13,
+       [5070] = 14,
+       [5072] = 15,
+       [5086] = 16,
+       [5087] = 17,
+       [5088] = 18,
+       [5089] = 19,
        [6144] = 0,
        [6145] = 1,
        [6146] = 2,
@@ -3705,4 +4834,3 @@ uint8_t ulp_glb_field_tbl[] = {
        [7638] = 6,
        [7642] = 7
 };
-

diff --git a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_act.c b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_act.c
index 223ecbf..e49c115 100644 (file)
--- a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_act.c
+++ b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_act.c
@@ -3,7 +3,7 @@
  * All rights reserved.
  */
 
-/* date: Thu Jul  8 08:44:00 2021 */
+/* date: Tue Aug 17 12:16:42 2021 */
 
 #include "ulp_template_db_enum.h"
 #include "ulp_template_db_field.h"
@@ -15,7 +15,7 @@ struct bnxt_ulp_mapper_tmpl_info ulp_thor_act_tmpl_list[] = {
        /* act_tid: 1, ingress */
        [1] = {
        .device_name = BNXT_ULP_DEVICE_ID_THOR,
-       .num_tbls = 4,
+       .num_tbls = 5,
        .start_tbl_idx = 0,
        .reject_info = {
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
@@ -26,7 +26,7 @@ struct bnxt_ulp_mapper_tmpl_info ulp_thor_act_tmpl_list[] = {
        [2] = {
        .device_name = BNXT_ULP_DEVICE_ID_THOR,
        .num_tbls = 6,
-       .start_tbl_idx = 4,
+       .start_tbl_idx = 5,
        .reject_info = {
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
                .cond_start_idx = 3,
@@ -36,7 +36,7 @@ struct bnxt_ulp_mapper_tmpl_info ulp_thor_act_tmpl_list[] = {
        [3] = {
        .device_name = BNXT_ULP_DEVICE_ID_THOR,
        .num_tbls = 4,
-       .start_tbl_idx = 10,
+       .start_tbl_idx = 11,
        .reject_info = {
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
                .cond_start_idx = 4,
@@ -45,8 +45,8 @@ struct bnxt_ulp_mapper_tmpl_info ulp_thor_act_tmpl_list[] = {
        /* act_tid: 4, egress */
        [4] = {
        .device_name = BNXT_ULP_DEVICE_ID_THOR,
-       .num_tbls = 4,
-       .start_tbl_idx = 14,
+       .num_tbls = 5,
+       .start_tbl_idx = 15,
        .reject_info = {
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
                .cond_start_idx = 7,
@@ -56,20 +56,20 @@ struct bnxt_ulp_mapper_tmpl_info ulp_thor_act_tmpl_list[] = {
        [5] = {
        .device_name = BNXT_ULP_DEVICE_ID_THOR,
        .num_tbls = 4,
-       .start_tbl_idx = 18,
+       .start_tbl_idx = 20,
        .reject_info = {
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
-               .cond_start_idx = 10,
+               .cond_start_idx = 12,
                .cond_nums = 0 }
        },
        /* act_tid: 6, egress */
        [6] = {
        .device_name = BNXT_ULP_DEVICE_ID_THOR,
-       .num_tbls = 6,
-       .start_tbl_idx = 22,
+       .num_tbls = 12,
+       .start_tbl_idx = 24,
        .reject_info = {
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
-               .cond_start_idx = 13,
+               .cond_start_idx = 15,
                .cond_nums = 0 }
        }
 };
@@ -125,14 +125,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {
        .direction = TF_DIR_RX,
        .execute_info = {
                .cond_true_goto  = 1,
-               .cond_false_goto = 1,
+               .cond_false_goto = 2,
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
                .cond_start_idx = 2,
                .cond_nums = 1 },
        .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
        .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_PTR,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .record_size = 64,
        .result_start_idx = 1,
        .result_bit_size = 0,
        .result_num_fields = 0,
@@ -146,7 +145,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {
        .direction = TF_DIR_RX,
        .execute_info = {
                .cond_true_goto  = 0,
-               .cond_false_goto = 0,
+               .cond_false_goto = 1,
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
                .cond_start_idx = 3,
                .cond_nums = 0 },
@@ -158,6 +157,26 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {
        .result_bit_size = 128,
        .result_num_fields = 17
        },
+       { /* act_tid: 1, , table: int_compact_act_record.0 */
+       .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type = TF_TBL_TYPE_COMPACT_ACT_RECORD,
+       .resource_sub_type =
+               BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
+       .direction = TF_DIR_RX,
+       .execute_info = {
+               .cond_true_goto  = 0,
+               .cond_false_goto = 0,
+               .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+               .cond_start_idx = 3,
+               .cond_nums = 0 },
+       .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
+       .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
+       .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
+       .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
+       .result_start_idx = 65,
+       .result_bit_size = 64,
+       .result_num_fields = 13
+       },
        { /* act_tid: 2, , table: control.0 */
        .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE,
        .direction = TF_DIR_RX,
@@ -187,7 +206,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE,
        .fdb_operand = BNXT_ULP_RF_IDX_RID,
        .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-       .result_start_idx = 65,
+       .result_start_idx = 78,
        .result_bit_size = 32,
        .result_num_fields = 5
        },
@@ -208,13 +227,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE,
        .fdb_operand = BNXT_ULP_RF_IDX_RID,
        .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-       .result_start_idx = 70,
+       .result_start_idx = 83,
        .result_bit_size = 64,
        .result_num_fields = 1
        },
-       { /* act_tid: 2, , table: int_full_act_record.0 */
+       { /* act_tid: 2, , table: int_compact_act_record.0 */
        .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-       .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD,
+       .resource_type = TF_TBL_TYPE_COMPACT_ACT_RECORD,
        .resource_sub_type =
                BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
        .direction = TF_DIR_RX,
@@ -229,9 +248,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE,
        .fdb_operand = BNXT_ULP_RF_IDX_RID,
        .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-       .result_start_idx = 71,
-       .result_bit_size = 128,
-       .result_num_fields = 17,
+       .result_start_idx = 84,
+       .result_bit_size = 64,
+       .result_num_fields = 13,
        .encap_num_fields = 0
        },
        { /* act_tid: 2, , table: mirror_tbl.wr */
@@ -250,7 +269,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {
        .tbl_operand = BNXT_ULP_RF_IDX_MIRROR_PTR_0,
        .fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
        .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-       .result_start_idx = 88,
+       .result_start_idx = 97,
        .result_bit_size = 32,
        .result_num_fields = 5
        },
@@ -273,7 +292,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {
        .blob_key_bit_size = 1,
        .key_bit_size = 1,
        .key_num_fields = 1,
-       .result_start_idx = 93,
+       .result_start_idx = 102,
        .result_bit_size = 36,
        .result_num_fields = 2
        },
@@ -292,7 +311,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE,
        .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .result_start_idx = 95,
+       .result_start_idx = 104,
        .result_bit_size = 64,
        .result_num_fields = 1
        },
@@ -311,8 +330,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
        .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_PTR,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .record_size = 64,
-       .result_start_idx = 96,
+       .result_start_idx = 105,
        .result_bit_size = 0,
        .result_num_fields = 0,
        .encap_num_fields = 47
@@ -332,8 +350,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
        .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_PTR,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .record_size = 64,
-       .result_start_idx = 143,
+       .result_start_idx = 152,
        .result_bit_size = 0,
        .result_num_fields = 0,
        .encap_num_fields = 47
@@ -353,7 +370,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
        .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .result_start_idx = 190,
+       .result_start_idx = 199,
        .result_bit_size = 128,
        .result_num_fields = 17
        },
@@ -372,7 +389,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE,
        .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .result_start_idx = 207,
+       .result_start_idx = 216,
        .result_bit_size = 64,
        .result_num_fields = 1
        },
@@ -391,8 +408,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
        .tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .record_size = 8,
-       .result_start_idx = 208,
+       .result_start_idx = 217,
        .result_bit_size = 0,
        .result_num_fields = 0,
        .encap_num_fields = 11
@@ -412,8 +428,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
        .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_PTR,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .record_size = 64,
-       .result_start_idx = 219,
+       .result_start_idx = 228,
        .result_bit_size = 0,
        .result_num_fields = 0,
        .encap_num_fields = 47
@@ -426,17 +441,36 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {
        .direction = TF_DIR_TX,
        .execute_info = {
                .cond_true_goto  = 0,
-               .cond_false_goto = 0,
-               .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+               .cond_false_goto = 1,
+               .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR,
                .cond_start_idx = 10,
-               .cond_nums = 0 },
+               .cond_nums = 2 },
        .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
        .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .result_start_idx = 266,
+       .result_start_idx = 275,
        .result_bit_size = 128,
        .result_num_fields = 17
        },
+       { /* act_tid: 4, , table: int_compact_act_record.0 */
+       .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type = TF_TBL_TYPE_COMPACT_ACT_RECORD,
+       .resource_sub_type =
+               BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
+       .direction = TF_DIR_TX,
+       .execute_info = {
+               .cond_true_goto  = 0,
+               .cond_false_goto = 0,
+               .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+               .cond_start_idx = 12,
+               .cond_nums = 0 },
+       .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
+       .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
+       .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
+       .result_start_idx = 292,
+       .result_bit_size = 64,
+       .result_num_fields = 13
+       },
        { /* act_tid: 5, , table: int_flow_counter_tbl.0 */
        .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type = TF_TBL_TYPE_ACT_STATS_64,
@@ -447,12 +481,12 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {
                .cond_true_goto  = 1,
                .cond_false_goto = 1,
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
-               .cond_start_idx = 10,
+               .cond_start_idx = 12,
                .cond_nums = 1 },
        .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE,
        .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .result_start_idx = 283,
+       .result_start_idx = 305,
        .result_bit_size = 64,
        .result_num_fields = 1
        },
@@ -466,13 +500,12 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {
                .cond_true_goto  = 2,
                .cond_false_goto = 1,
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
-               .cond_start_idx = 11,
+               .cond_start_idx = 13,
                .cond_nums = 1 },
        .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
        .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_PTR,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .record_size = 64,
-       .result_start_idx = 284,
+       .result_start_idx = 306,
        .result_bit_size = 0,
        .result_num_fields = 0,
        .encap_num_fields = 47
@@ -487,13 +520,12 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {
                .cond_true_goto  = 1,
                .cond_false_goto = 1,
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
-               .cond_start_idx = 12,
+               .cond_start_idx = 14,
                .cond_nums = 1 },
        .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
        .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_PTR,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .record_size = 64,
-       .result_start_idx = 331,
+       .result_start_idx = 353,
        .result_bit_size = 0,
        .result_num_fields = 0,
        .encap_num_fields = 47
@@ -508,12 +540,12 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {
                .cond_true_goto  = 0,
                .cond_false_goto = 0,
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
-               .cond_start_idx = 13,
+               .cond_start_idx = 15,
                .cond_nums = 0 },
        .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
        .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .result_start_idx = 378,
+       .result_start_idx = 400,
        .result_bit_size = 128,
        .result_num_fields = 17
        },
@@ -527,15 +559,48 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {
                .cond_true_goto  = 1,
                .cond_false_goto = 1,
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
-               .cond_start_idx = 13,
+               .cond_start_idx = 15,
                .cond_nums = 1 },
        .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE,
        .tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .result_start_idx = 395,
+       .result_start_idx = 417,
        .result_bit_size = 64,
        .result_num_fields = 1
        },
+       { /* act_tid: 6, , table: source_property_cache.rd */
+       .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE,
+       .resource_sub_type =
+               BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SOURCE_PROPERTY_CACHE,
+       .direction = TF_DIR_TX,
+       .execute_info = {
+               .cond_true_goto  = 1,
+               .cond_false_goto = 1,
+               .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
+               .cond_start_idx = 16,
+               .cond_nums = 1 },
+       .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
+       .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH,
+       .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
+       .key_start_idx = 2,
+       .blob_key_bit_size = 80,
+       .key_bit_size = 80,
+       .key_num_fields = 2,
+       .ident_start_idx = 1,
+       .ident_nums = 1
+       },
+       { /* act_tid: 6, , table: control.0 */
+       .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE,
+       .direction = TF_DIR_TX,
+       .execute_info = {
+               .cond_true_goto  = 1,
+               .cond_false_goto = 3,
+               .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
+               .cond_start_idx = 17,
+               .cond_nums = 1 },
+       .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,
+       .fdb_operand = BNXT_ULP_RF_IDX_RID
+       },
        { /* act_tid: 6, , table: sp_smac_ipv4.0 */
        .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV4,
@@ -546,17 +611,40 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {
                .cond_true_goto  = 1,
                .cond_false_goto = 1,
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
-               .cond_start_idx = 14,
+               .cond_start_idx = 18,
                .cond_nums = 1 },
        .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
        .tbl_operand = BNXT_ULP_RF_IDX_MAIN_SP_PTR,
-       .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
+       .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE,
+       .fdb_operand = BNXT_ULP_RF_IDX_RID,
        .record_size = 16,
-       .result_start_idx = 396,
+       .result_start_idx = 418,
        .result_bit_size = 0,
        .result_num_fields = 0,
        .encap_num_fields = 3
        },
+       { /* act_tid: 6, , table: source_property_cache.wr */
+       .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE,
+       .resource_sub_type =
+               BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_SOURCE_PROPERTY_CACHE,
+       .direction = TF_DIR_TX,
+       .execute_info = {
+               .cond_true_goto  = 1,
+               .cond_false_goto = 1,
+               .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+               .cond_start_idx = 19,
+               .cond_nums = 0 },
+       .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
+       .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH,
+       .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
+       .key_start_idx = 4,
+       .blob_key_bit_size = 80,
+       .key_bit_size = 80,
+       .key_num_fields = 2,
+       .result_start_idx = 421,
+       .result_bit_size = 48,
+       .result_num_fields = 2
+       },
        { /* act_tid: 6, , table: sp_smac_ipv6.0 */
        .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type = TF_TBL_TYPE_ACT_SP_SMAC_IPV6,
@@ -567,17 +655,50 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {
                .cond_true_goto  = 1,
                .cond_false_goto = 1,
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
-               .cond_start_idx = 15,
+               .cond_start_idx = 19,
                .cond_nums = 1 },
        .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
        .tbl_operand = BNXT_ULP_RF_IDX_MAIN_SP_PTR,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
        .record_size = 32,
-       .result_start_idx = 399,
+       .result_start_idx = 423,
        .result_bit_size = 0,
        .result_num_fields = 0,
        .encap_num_fields = 3
        },
+       { /* act_tid: 6, , table: vxlan_encap_rec_cache.rd */
+       .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE,
+       .resource_sub_type =
+               BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_VXLAN_ENCAP_REC_CACHE,
+       .direction = TF_DIR_TX,
+       .execute_info = {
+               .cond_true_goto  = 1,
+               .cond_false_goto = 1,
+               .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
+               .cond_start_idx = 20,
+               .cond_nums = 2 },
+       .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
+       .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH,
+       .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
+       .key_start_idx = 6,
+       .blob_key_bit_size = 136,
+       .key_bit_size = 136,
+       .key_num_fields = 5,
+       .ident_start_idx = 2,
+       .ident_nums = 1
+       },
+       { /* act_tid: 6, , table: control.0 */
+       .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE,
+       .direction = TF_DIR_TX,
+       .execute_info = {
+               .cond_true_goto  = 1,
+               .cond_false_goto = 3,
+               .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
+               .cond_start_idx = 22,
+               .cond_nums = 1 },
+       .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,
+       .fdb_operand = BNXT_ULP_RF_IDX_RID
+       },
        { /* act_tid: 6, , table: int_tun_encap_record.ipv4_vxlan */
        .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B,
@@ -588,17 +709,39 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {
                .cond_true_goto  = 1,
                .cond_false_goto = 1,
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
-               .cond_start_idx = 16,
+               .cond_start_idx = 23,
                .cond_nums = 2 },
        .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
        .tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0,
-       .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .record_size = 64,
-       .result_start_idx = 402,
+       .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE,
+       .fdb_operand = BNXT_ULP_RF_IDX_RID,
+       .result_start_idx = 426,
        .result_bit_size = 0,
        .result_num_fields = 0,
        .encap_num_fields = 30
        },
+       { /* act_tid: 6, , table: vxlan_encap_rec_cache.wr */
+       .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE,
+       .resource_sub_type =
+               BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_VXLAN_ENCAP_REC_CACHE,
+       .direction = TF_DIR_TX,
+       .execute_info = {
+               .cond_true_goto  = 1,
+               .cond_false_goto = 1,
+               .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+               .cond_start_idx = 25,
+               .cond_nums = 0 },
+       .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
+       .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH,
+       .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
+       .key_start_idx = 11,
+       .blob_key_bit_size = 136,
+       .key_bit_size = 136,
+       .key_num_fields = 5,
+       .result_start_idx = 456,
+       .result_bit_size = 48,
+       .result_num_fields = 2
+       },
        { /* act_tid: 6, , table: int_tun_encap_record.ipv6_vxlan */
        .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type = TF_TBL_TYPE_ACT_ENCAP_64B,
@@ -609,13 +752,12 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {
                .cond_true_goto  = 1,
                .cond_false_goto = 1,
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
-               .cond_start_idx = 18,
+               .cond_start_idx = 25,
                .cond_nums = 2 },
        .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
        .tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .record_size = 64,
-       .result_start_idx = 432,
+       .result_start_idx = 458,
        .result_bit_size = 0,
        .result_num_fields = 0,
        .encap_num_fields = 30
@@ -630,13 +772,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {
                .cond_true_goto  = 0,
                .cond_false_goto = 0,
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
-               .cond_start_idx = 20,
+               .cond_start_idx = 27,
                .cond_nums = 0 },
        .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
        .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
        .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-       .result_start_idx = 462,
+       .result_start_idx = 488,
        .result_bit_size = 128,
        .result_num_fields = 17
        }
@@ -693,6 +835,15 @@ struct bnxt_ulp_mapper_cond_info ulp_thor_act_cond_list[] = {
        .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
        .cond_operand = BNXT_ULP_ACT_BIT_DEC_TTL
        },
+       /* cond_execute: act_tid: 4, int_full_act_record.0 */
+       {
+       .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
+       .cond_operand = BNXT_ULP_ACT_BIT_DEC_TTL
+       },
+       {
+       .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
+       .cond_operand = BNXT_ULP_ACT_BIT_PUSH_VLAN
+       },
        /* cond_execute: act_tid: 5, int_flow_counter_tbl.0 */
        {
        .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
@@ -713,6 +864,16 @@ struct bnxt_ulp_mapper_cond_info ulp_thor_act_cond_list[] = {
        .cond_opcode = BNXT_ULP_COND_OPC_ACT_BIT_IS_SET,
        .cond_operand = BNXT_ULP_ACT_BIT_COUNT
        },
+       /* cond_execute: act_tid: 6, source_property_cache.rd */
+       {
+       .cond_opcode = BNXT_ULP_COND_OPC_CF_IS_SET,
+       .cond_operand = BNXT_ULP_CF_IDX_ACT_ENCAP_IPV4_FLAG
+       },
+       /* cond_execute: act_tid: 6, control.0 */
+       {
+       .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET,
+       .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS
+       },
        /* cond_execute: act_tid: 6, sp_smac_ipv4.0 */
        {
        .cond_opcode = BNXT_ULP_COND_OPC_CF_IS_SET,
@@ -723,6 +884,20 @@ struct bnxt_ulp_mapper_cond_info ulp_thor_act_cond_list[] = {
        .cond_opcode = BNXT_ULP_COND_OPC_CF_IS_SET,
        .cond_operand = BNXT_ULP_CF_IDX_ACT_ENCAP_IPV6_FLAG
        },
+       /* cond_execute: act_tid: 6, vxlan_encap_rec_cache.rd */
+       {
+       .cond_opcode = BNXT_ULP_COND_OPC_ENC_HDR_BIT_IS_SET,
+       .cond_operand = BNXT_ULP_HDR_BIT_O_IPV4
+       },
+       {
+       .cond_opcode = BNXT_ULP_COND_OPC_ENC_HDR_BIT_IS_SET,
+       .cond_operand = BNXT_ULP_HDR_BIT_T_VXLAN
+       },
+       /* cond_execute: act_tid: 6, control.0 */
+       {
+       .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET,
+       .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS
+       },
        /* cond_execute: act_tid: 6, int_tun_encap_record.ipv4_vxlan */
        {
        .cond_opcode = BNXT_ULP_COND_OPC_ENC_HDR_BIT_IS_SET,
@@ -783,6 +958,316 @@ struct bnxt_ulp_mapper_key_info ulp_thor_act_key_info_list[] = {
                (BNXT_ULP_RF_IDX_MIRROR_PTR_0 >> 8) & 0xff,
                BNXT_ULP_RF_IDX_MIRROR_PTR_0 & 0xff}
                }
+       },
+       /* act_tid: 6, , table: source_property_cache.rd */
+       {
+       .field_info_mask = {
+               .description = "smac",
+               .field_bit_size = 48,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff,
+                       0xff,
+                       0xff,
+                       0xff,
+                       0xff,
+                       0xff}
+               },
+       .field_info_spec = {
+               .description = "smac",
+               .field_bit_size = 48,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+               .field_opr1 = {
+               (BNXT_ULP_ENC_FIELD_ETH_SMAC >> 8) & 0xff,
+               BNXT_ULP_ENC_FIELD_ETH_SMAC & 0xff}
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "ipv4_src_addr",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff,
+                       0xff,
+                       0xff,
+                       0xff}
+               },
+       .field_info_spec = {
+               .description = "ipv4_src_addr",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+               .field_opr1 = {
+               (BNXT_ULP_ENC_FIELD_IPV4_SADDR >> 8) & 0xff,
+               BNXT_ULP_ENC_FIELD_IPV4_SADDR & 0xff}
+               }
+       },
+       /* act_tid: 6, , table: source_property_cache.wr */
+       {
+       .field_info_mask = {
+               .description = "smac",
+               .field_bit_size = 48,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff,
+                       0xff,
+                       0xff,
+                       0xff,
+                       0xff,
+                       0xff}
+               },
+       .field_info_spec = {
+               .description = "smac",
+               .field_bit_size = 48,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+               .field_opr1 = {
+               (BNXT_ULP_ENC_FIELD_ETH_SMAC >> 8) & 0xff,
+               BNXT_ULP_ENC_FIELD_ETH_SMAC & 0xff}
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "ipv4_src_addr",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff,
+                       0xff,
+                       0xff,
+                       0xff}
+               },
+       .field_info_spec = {
+               .description = "ipv4_src_addr",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+               .field_opr1 = {
+               (BNXT_ULP_ENC_FIELD_IPV4_SADDR >> 8) & 0xff,
+               BNXT_ULP_ENC_FIELD_IPV4_SADDR & 0xff}
+               }
+       },
+       /* act_tid: 6, , table: vxlan_encap_rec_cache.rd */
+       {
+       .field_info_mask = {
+               .description = "dmac",
+               .field_bit_size = 48,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff,
+                       0xff,
+                       0xff,
+                       0xff,
+                       0xff,
+                       0xff}
+               },
+       .field_info_spec = {
+               .description = "dmac",
+               .field_bit_size = 48,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+               .field_opr1 = {
+               (BNXT_ULP_ENC_FIELD_ETH_DMAC >> 8) & 0xff,
+               BNXT_ULP_ENC_FIELD_ETH_DMAC & 0xff}
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "ipv4_dst_addr",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff,
+                       0xff,
+                       0xff,
+                       0xff}
+               },
+       .field_info_spec = {
+               .description = "ipv4_dst_addr",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+               .field_opr1 = {
+               (BNXT_ULP_ENC_FIELD_IPV4_DADDR >> 8) & 0xff,
+               BNXT_ULP_ENC_FIELD_IPV4_DADDR & 0xff}
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "udp_sport",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff,
+                       0xff}
+               },
+       .field_info_spec = {
+               .description = "udp_sport",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+               .field_opr1 = {
+               (BNXT_ULP_ENC_FIELD_UDP_SPORT >> 8) & 0xff,
+               BNXT_ULP_ENC_FIELD_UDP_SPORT & 0xff}
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "udp_dport",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff,
+                       0xff}
+               },
+       .field_info_spec = {
+               .description = "udp_dport",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+               .field_opr1 = {
+               (BNXT_ULP_ENC_FIELD_UDP_DPORT >> 8) & 0xff,
+               BNXT_ULP_ENC_FIELD_UDP_DPORT & 0xff}
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "vni",
+               .field_bit_size = 24,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff,
+                       0xff,
+                       0xff}
+               },
+       .field_info_spec = {
+               .description = "vni",
+               .field_bit_size = 24,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+               .field_opr1 = {
+               (BNXT_ULP_ENC_FIELD_VXLAN_VNI >> 8) & 0xff,
+               BNXT_ULP_ENC_FIELD_VXLAN_VNI & 0xff}
+               }
+       },
+       /* act_tid: 6, , table: vxlan_encap_rec_cache.wr */
+       {
+       .field_info_mask = {
+               .description = "dmac",
+               .field_bit_size = 48,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff,
+                       0xff,
+                       0xff,
+                       0xff,
+                       0xff,
+                       0xff}
+               },
+       .field_info_spec = {
+               .description = "dmac",
+               .field_bit_size = 48,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+               .field_opr1 = {
+               (BNXT_ULP_ENC_FIELD_ETH_DMAC >> 8) & 0xff,
+               BNXT_ULP_ENC_FIELD_ETH_DMAC & 0xff}
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "ipv4_dst_addr",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff,
+                       0xff,
+                       0xff,
+                       0xff}
+               },
+       .field_info_spec = {
+               .description = "ipv4_dst_addr",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+               .field_opr1 = {
+               (BNXT_ULP_ENC_FIELD_IPV4_DADDR >> 8) & 0xff,
+               BNXT_ULP_ENC_FIELD_IPV4_DADDR & 0xff}
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "udp_sport",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff,
+                       0xff}
+               },
+       .field_info_spec = {
+               .description = "udp_sport",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+               .field_opr1 = {
+               (BNXT_ULP_ENC_FIELD_UDP_SPORT >> 8) & 0xff,
+               BNXT_ULP_ENC_FIELD_UDP_SPORT & 0xff}
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "udp_dport",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff,
+                       0xff}
+               },
+       .field_info_spec = {
+               .description = "udp_dport",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+               .field_opr1 = {
+               (BNXT_ULP_ENC_FIELD_UDP_DPORT >> 8) & 0xff,
+               BNXT_ULP_ENC_FIELD_UDP_DPORT & 0xff}
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "vni",
+               .field_bit_size = 24,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff,
+                       0xff,
+                       0xff}
+               },
+       .field_info_spec = {
+               .description = "vni",
+               .field_bit_size = 24,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+               .field_opr1 = {
+               (BNXT_ULP_ENC_FIELD_VXLAN_VNI >> 8) & 0xff,
+               BNXT_ULP_ENC_FIELD_VXLAN_VNI & 0xff}
+               }
        }
 };
 
@@ -1069,38 +1554,178 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = {
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "encap_ptr",
-       .field_bit_size = 16,
+       .description = "encap_ptr",
+       .field_bit_size = 16,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "mod_rec_ptr",
+       .field_bit_size = 16,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
+       .field_opr1 = {
+       ((uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL >> 56) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL >> 48) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL >> 40) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL >> 32) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL >> 24) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL >> 16) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL >> 8) & 0xff,
+       (uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL & 0xff},
+       .field_src2 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr2 = {
+               (BNXT_ULP_RF_IDX_MODIFY_PTR >> 8) & 0xff,
+               BNXT_ULP_RF_IDX_MODIFY_PTR & 0xff},
+       .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "rsvd1",
+       .field_bit_size = 16,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "rsvd0",
+       .field_bit_size = 8,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "decap_func",
+       .field_bit_size = 5,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
+       .field_opr1 = {
+       ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 56) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 48) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 40) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 32) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 24) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 16) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 8) & 0xff,
+       (uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP & 0xff},
+       .field_src2 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr2 = {
+               ULP_THOR_SYM_DECAP_FUNC_THRU_TUN},
+       .field_src3 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr3 = {
+       ULP_THOR_SYM_DECAP_FUNC_NONE}
+       },
+       {
+       .description = "meter",
+       .field_bit_size = 10,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "stats_op",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
+       },
+       {
+       .description = "stats_ptr",
+       .field_bit_size = 16,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff}
+       },
+       {
+       .description = "vnic_or_vport",
+       .field_bit_size = 11,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
+       .field_opr1 = {
+       (BNXT_ULP_ACT_PROP_IDX_VNIC >> 8) & 0xff,
+       BNXT_ULP_ACT_PROP_IDX_VNIC & 0xff}
+       },
+       {
+       .description = "use_default",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "mirror",
+       .field_bit_size = 4,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
+       .field_opr1 = {
+       ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 56) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 48) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 40) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 32) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 24) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 16) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 8) & 0xff,
+       (uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE & 0xff},
+       .field_src2 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr2 = {
+               (BNXT_ULP_RF_IDX_MIRROR_ID_0 >> 8) & 0xff,
+               BNXT_ULP_RF_IDX_MIRROR_ID_0 & 0xff},
+       .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "cond_copy",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "mod_rec_ptr",
-       .field_bit_size = 16,
+       .description = "vlan_del_rpt",
+       .field_bit_size = 2,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
        .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
        .field_opr1 = {
-       ((uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL >> 56) & 0xff,
-       ((uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL >> 48) & 0xff,
-       ((uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL >> 40) & 0xff,
-       ((uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL >> 32) & 0xff,
-       ((uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL >> 24) & 0xff,
-       ((uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL >> 16) & 0xff,
-       ((uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL >> 8) & 0xff,
-       (uint64_t)BNXT_ULP_ACT_BIT_DEC_TTL & 0xff},
-       .field_src2 = BNXT_ULP_FIELD_SRC_RF,
+       ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 56) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 48) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 40) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 32) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 24) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 16) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN >> 8) & 0xff,
+       (uint64_t)BNXT_ULP_ACT_BIT_POP_VLAN & 0xff},
+       .field_src2 = BNXT_ULP_FIELD_SRC_CONST,
        .field_opr2 = {
-               (BNXT_ULP_RF_IDX_MODIFY_PTR >> 8) & 0xff,
-               BNXT_ULP_RF_IDX_MODIFY_PTR & 0xff},
+               ULP_THOR_SYM_VLAN_DEL_RPT_STRIP_OUTER},
        .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "rsvd1",
-       .field_bit_size = 16,
+       .description = "drop",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
+       .field_opr1 = {
+       ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 56) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 48) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 40) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 32) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 24) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 16) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 8) & 0xff,
+       (uint64_t)BNXT_ULP_ACT_BIT_DROP & 0xff}
+       },
+       {
+       .description = "hit",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
+       .description = "type",
+       .field_bit_size = 3,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
+       },
+       /* act_tid: 1, , table: int_compact_act_record.0 */
+       {
        .description = "rsvd0",
        .field_bit_size = 8,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
@@ -1137,7 +1762,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = {
        .description = "stats_op",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
        },
        {
        .description = "stats_ptr",
@@ -1233,9 +1860,7 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = {
        .description = "type",
        .field_bit_size = 3,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-       .field_opr1 = {
-       1}
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        /* act_tid: 2, , table: mirror_tbl.alloc */
        {
@@ -1277,31 +1902,7 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = {
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
-       /* act_tid: 2, , table: int_full_act_record.0 */
-       {
-       .description = "sp_rec_ptr",
-       .field_bit_size = 16,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-       },
-       {
-       .description = "encap_ptr",
-       .field_bit_size = 16,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-       },
-       {
-       .description = "mod_rec_ptr",
-       .field_bit_size = 16,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-       },
-       {
-       .description = "rsvd1",
-       .field_bit_size = 16,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-       },
+       /* act_tid: 2, , table: int_compact_act_record.0 */
        {
        .description = "rsvd0",
        .field_bit_size = 8,
@@ -1324,7 +1925,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = {
        .description = "stats_op",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
        },
        {
        .description = "stats_ptr",
@@ -1387,9 +1990,7 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = {
        .description = "type",
        .field_bit_size = 3,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-       .field_opr1 = {
-       1}
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        /* act_tid: 2, , table: mirror_tbl.wr */
        {
@@ -2250,7 +2851,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = {
        .description = "stats_op",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
        },
        {
        .description = "stats_ptr",
@@ -2721,16 +3324,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = {
        .description = "stats_op",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
        .field_opr1 = {
-       ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 56) & 0xff,
-       ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 48) & 0xff,
-       ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 40) & 0xff,
-       ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 32) & 0xff,
-       ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 24) & 0xff,
-       ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 16) & 0xff,
-       ((uint64_t)BNXT_ULP_ACT_BIT_COUNT >> 8) & 0xff,
-       (uint64_t)BNXT_ULP_ACT_BIT_COUNT & 0xff}
+       1}
        },
        {
        .description = "stats_ptr",
@@ -2803,6 +3399,102 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = {
        .field_opr1 = {
        1}
        },
+       /* act_tid: 4, , table: int_compact_act_record.0 */
+       {
+       .description = "rsvd0",
+       .field_bit_size = 8,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "decap_func",
+       .field_bit_size = 5,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "meter",
+       .field_bit_size = 10,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "stats_op",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
+       },
+       {
+       .description = "stats_ptr",
+       .field_bit_size = 16,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0 & 0xff}
+       },
+       {
+       .description = "vnic_or_vport",
+       .field_bit_size = 11,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
+       .field_opr1 = {
+       (BNXT_ULP_ACT_PROP_IDX_VPORT >> 8) & 0xff,
+       BNXT_ULP_ACT_PROP_IDX_VPORT & 0xff}
+       },
+       {
+       .description = "use_default",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "mirror",
+       .field_bit_size = 4,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "cond_copy",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "vlan_del_rpt",
+       .field_bit_size = 2,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "drop",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT,
+       .field_opr1 = {
+       ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 56) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 48) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 40) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 32) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 24) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 16) & 0xff,
+       ((uint64_t)BNXT_ULP_ACT_BIT_DROP >> 8) & 0xff,
+       (uint64_t)BNXT_ULP_ACT_BIT_DROP & 0xff}
+       },
+       {
+       .description = "hit",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "type",
+       .field_bit_size = 3,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
        /* act_tid: 5, , table: int_flow_counter_tbl.0 */
        {
        .description = "count",
@@ -3708,6 +4400,25 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = {
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
+       /* act_tid: 6, , table: source_property_cache.wr */
+       {
+       .description = "rid",
+       .field_bit_size = 32,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_RID >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_RID & 0xff}
+       },
+       {
+       .description = "sp_rec_ptr",
+       .field_bit_size = 16,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_MAIN_SP_PTR >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_MAIN_SP_PTR & 0xff}
+       },
        /* act_tid: 6, , table: sp_smac_ipv6.0 */
        {
        .description = "smac",
@@ -4021,6 +4732,25 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = {
        (BNXT_ULP_ENC_FIELD_VXLAN_RSVD1 >> 8) & 0xff,
        BNXT_ULP_ENC_FIELD_VXLAN_RSVD1 & 0xff}
        },
+       /* act_tid: 6, , table: vxlan_encap_rec_cache.wr */
+       {
+       .description = "rid",
+       .field_bit_size = 32,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_RID >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_RID & 0xff}
+       },
+       {
+       .description = "enc_rec_ptr",
+       .field_bit_size = 16,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_ENCAP_PTR_0 >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_ENCAP_PTR_0 & 0xff}
+       },
        /* act_tid: 6, , table: int_tun_encap_record.ipv6_vxlan */
        {
        .description = "ecv_valid",
@@ -4351,7 +5081,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_act_result_field_list[] = {
        .description = "stats_op",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
        },
        {
        .description = "stats_ptr",
@@ -4424,5 +5156,19 @@ struct bnxt_ulp_mapper_ident_info ulp_thor_act_ident_list[] = {
        .regfile_idx = BNXT_ULP_RF_IDX_MIRROR_ID_0,
        .ident_bit_size = 4,
        .ident_bit_pos = 32
+       },
+       /* act_tid: 6, , table: source_property_cache.rd */
+       {
+       .description = "sp_rec_ptr",
+       .regfile_idx = BNXT_ULP_RF_IDX_MAIN_SP_PTR,
+       .ident_bit_size = 16,
+       .ident_bit_pos = 32
+       },
+       /* act_tid: 6, , table: vxlan_encap_rec_cache.rd */
+       {
+       .description = "enc_rec_ptr",
+       .regfile_idx = BNXT_ULP_RF_IDX_ENCAP_PTR_0,
+       .ident_bit_size = 16,
+       .ident_bit_pos = 32
        }
 };

diff --git a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_class.c b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_class.c
index bcb204a..68c1e29 100644 (file)
--- a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_class.c
+++ b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_class.c
@@ -3,7 +3,7 @@
  * All rights reserved.
  */
 
-/* date: Fri Jul 30 09:57:44 2021 */
+/* date: Fri Aug 20 18:05:25 2021 */
 
 #include "ulp_template_db_enum.h"
 #include "ulp_template_db_field.h"
@@ -25,7 +25,7 @@ struct bnxt_ulp_mapper_tmpl_info ulp_thor_class_tmpl_list[] = {
        /* class_tid: 2, ingress */
        [2] = {
        .device_name = BNXT_ULP_DEVICE_ID_THOR,
-       .num_tbls = 17,
+       .num_tbls = 24,
        .start_tbl_idx = 28,
        .reject_info = {
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
@@ -35,18 +35,18 @@ struct bnxt_ulp_mapper_tmpl_info ulp_thor_class_tmpl_list[] = {
        /* class_tid: 3, egress */
        [3] = {
        .device_name = BNXT_ULP_DEVICE_ID_THOR,
-       .num_tbls = 24,
-       .start_tbl_idx = 45,
+       .num_tbls = 18,
+       .start_tbl_idx = 52,
        .reject_info = {
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
-               .cond_start_idx = 36,
+               .cond_start_idx = 39,
                .cond_nums = 0 }
        },
        /* class_tid: 4, ingress */
        [4] = {
        .device_name = BNXT_ULP_DEVICE_ID_THOR,
        .num_tbls = 21,
-       .start_tbl_idx = 69,
+       .start_tbl_idx = 70,
        .reject_info = {
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
                .cond_start_idx = 48,
@@ -55,8 +55,8 @@ struct bnxt_ulp_mapper_tmpl_info ulp_thor_class_tmpl_list[] = {
        /* class_tid: 5, egress */
        [5] = {
        .device_name = BNXT_ULP_DEVICE_ID_THOR,
-       .num_tbls = 24,
-       .start_tbl_idx = 90,
+       .num_tbls = 25,
+       .start_tbl_idx = 91,
        .reject_info = {
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE,
                .cond_start_idx = 52,
@@ -855,18 +855,28 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .result_bit_size = 62,
        .result_num_fields = 4
        },
-       { /* class_tid: 2, , table: profile_tcam_cache.f2_rd */
+       { /* class_tid: 2, , table: control.ipv6_check */
+       .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE,
+       .direction = TF_DIR_RX,
+       .execute_info = {
+               .cond_true_goto  = 1,
+               .cond_false_goto = 8,
+               .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
+               .cond_start_idx = 32,
+               .cond_nums = 1 },
+       .fdb_opcode = BNXT_ULP_FDB_OPC_NOP
+       },
+       { /* class_tid: 2, , table: profile_tcam_cache.f2_ipv6_rd */
        .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE,
-       .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
        .resource_sub_type =
                BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM,
        .direction = TF_DIR_RX,
        .execute_info = {
                .cond_true_goto  = 1,
-               .cond_false_goto = 1,
-               .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
-               .cond_start_idx = 32,
-               .cond_nums = 0 },
+               .cond_false_goto = 1023,
+               .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
+               .cond_start_idx = 33,
+               .cond_nums = 1 },
        .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
        .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
@@ -875,38 +885,57 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .key_bit_size = 14,
        .key_num_fields = 3,
        .ident_start_idx = 19,
-       .ident_nums = 3
+       .ident_nums = 4
        },
-       { /* class_tid: 2, , table: control.profile_tcam_cache.f2_check */
+       { /* class_tid: 2, , table: control.f2_ipv6_prof_cache_check */
        .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE,
        .direction = TF_DIR_RX,
        .execute_info = {
-               .cond_true_goto  = 1,
-               .cond_false_goto = 4,
+               .cond_true_goto  = 2,
+               .cond_false_goto = 1,
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
-               .cond_start_idx = 32,
+               .cond_start_idx = 34,
                .cond_nums = 1 },
        .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,
        .fdb_operand = BNXT_ULP_RF_IDX_RID
        },
-       { /* class_tid: 2, , table: fkb_select.f2_wm */
-       .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
-       .resource_type = TF_TBL_TYPE_WC_FKB,
+       { /* class_tid: 2, , table: control.f2_v6_conflict_check */
+       .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE,
        .direction = TF_DIR_RX,
        .execute_info = {
-               .cond_true_goto  = 1,
-               .cond_false_goto = 1,
+               .cond_true_goto  = 4,
+               .cond_false_goto = 1023,
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
-               .cond_start_idx = 33,
+               .cond_start_idx = 35,
                .cond_nums = 1 },
-       .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE,
-       .tbl_operand = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_4,
        .fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
+       .func_info = {
+               .func_opc = BNXT_ULP_FUNC_OPC_EQ,
+               .func_src1 = BNXT_ULP_FUNC_SRC_REGFILE,
+               .func_opr1 = BNXT_ULP_RF_IDX_FLOW_SIG_ID,
+               .func_src2 = BNXT_ULP_FUNC_SRC_COMP_FIELD,
+               .func_opr2 = BNXT_ULP_CF_IDX_FLOW_SIG_ID,
+               .func_dst_opr = BNXT_ULP_RF_IDX_CC }
+       },
+       { /* class_tid: 2, , table: fkb_select.f2_l2_l3_l4_v6_em */
+       .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type = TF_TBL_TYPE_EM_FKB,
+       .direction = TF_DIR_RX,
+       .execute_info = {
+               .cond_true_goto  = 1,
+               .cond_false_goto = 1,
+               .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+               .cond_start_idx = 36,
+               .cond_nums = 0 },
+       .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
+       .tbl_operand = BNXT_ULP_RF_IDX_EM_KEY_ID_0,
+       .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE,
+       .fdb_operand = BNXT_ULP_RF_IDX_RID,
        .result_start_idx = 426,
        .result_bit_size = 106,
        .result_num_fields = 106
        },
-       { /* class_tid: 2, , table: profile_tcam.f2 */
+       { /* class_tid: 2, , table: profile_tcam.f2_l2_l3_l4_v6_em */
        .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
        .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
        .direction = TF_DIR_RX,
@@ -914,14 +943,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
                .cond_true_goto  = 1,
                .cond_false_goto = 1,
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
-               .cond_start_idx = 34,
+               .cond_start_idx = 36,
                .cond_nums = 0 },
        .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE,
        .tbl_operand = BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE,
        .fdb_operand = BNXT_ULP_RF_IDX_RID,
        .pri_opcode  = BNXT_ULP_PRI_OPC_CONST,
-       .pri_operand = 1,
+       .pri_operand = 0,
        .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
        .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
        .key_start_idx = 1146,
@@ -930,9 +959,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .key_num_fields = 43,
        .result_start_idx = 532,
        .result_bit_size = 33,
-       .result_num_fields = 8
+       .result_num_fields = 8,
+       .ident_start_idx = 23,
+       .ident_nums = 1
        },
-       { /* class_tid: 2, , table: profile_tcam_cache.f2_wr */
+       { /* class_tid: 2, , table: profile_tcam_cache.f2_l2_l3_l4_v6_wr */
        .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE,
        .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
        .resource_sub_type =
@@ -942,7 +973,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
                .cond_true_goto  = 1,
                .cond_false_goto = 1,
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
-               .cond_start_idx = 34,
+               .cond_start_idx = 36,
                .cond_nums = 0 },
        .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
        .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
@@ -955,135 +986,81 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .result_bit_size = 138,
        .result_num_fields = 7
        },
-       { /* class_tid: 2, , table: wm.l3_l4.ipv4 */
-       .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-       .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM,
+       { /* class_tid: 2, , table: em.f2_l2_l3_l4_v6.0 */
+       .resource_func = BNXT_ULP_RESOURCE_FUNC_EM_TABLE,
+       .resource_type = TF_MEM_INTERNAL,
        .direction = TF_DIR_RX,
        .execute_info = {
                .cond_true_goto  = 0,
                .cond_false_goto = 1,
-               .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
-               .cond_start_idx = 34,
-               .cond_nums = 1 },
-       .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE,
-       .tbl_operand = BNXT_ULP_RF_IDX_WC_TCAM_INDEX_0,
+               .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+               .cond_start_idx = 36,
+               .cond_nums = 0 },
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .pri_opcode  = BNXT_ULP_PRI_OPC_CONST,
-       .pri_operand = 0,
-       .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
        .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,
        .key_start_idx = 1192,
        .blob_key_bit_size = 0,
        .key_bit_size = 0,
        .key_num_fields = 114,
        .result_start_idx = 547,
-       .result_bit_size = 38,
-       .result_num_fields = 5
-       },
-       { /* class_tid: 2, , table: wm.l3_l4.ipv6 */
-       .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-       .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM,
-       .direction = TF_DIR_RX,
-       .execute_info = {
-               .cond_true_goto  = 0,
-               .cond_false_goto = 0,
-               .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
-               .cond_start_idx = 35,
-               .cond_nums = 1 },
-       .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE,
-       .tbl_operand = BNXT_ULP_RF_IDX_WC_TCAM_INDEX_0,
-       .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .pri_opcode  = BNXT_ULP_PRI_OPC_CONST,
-       .pri_operand = 0,
-       .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-       .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,
-       .key_start_idx = 1306,
-       .blob_key_bit_size = 0,
-       .key_bit_size = 0,
-       .key_num_fields = 114,
-       .result_start_idx = 552,
-       .result_bit_size = 38,
-       .result_num_fields = 5
-       },
-       { /* class_tid: 3, , table: l2_cntxt_tcam_cache.rd */
-       .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE,
-       .resource_sub_type =
-               BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM,
-       .direction = TF_DIR_TX,
-       .execute_info = {
-               .cond_true_goto  = 6,
-               .cond_false_goto = 1,
-               .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
-               .cond_start_idx = 36,
-               .cond_nums = 1 },
-       .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
-       .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
-       .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .key_start_idx = 1420,
-       .blob_key_bit_size = 8,
-       .key_bit_size = 8,
-       .key_num_fields = 1,
-       .ident_start_idx = 22,
-       .ident_nums = 1
+       .result_bit_size = 0,
+       .result_num_fields = 6
        },
-       { /* class_tid: 3, , table: mac_addr_cache.rd */
+       { /* class_tid: 2, , table: profile_tcam_cache.f2_rd */
        .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE,
+       .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
        .resource_sub_type =
-               BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_MAC_ADDR_CACHE,
-       .direction = TF_DIR_TX,
+               BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM,
+       .direction = TF_DIR_RX,
        .execute_info = {
                .cond_true_goto  = 1,
                .cond_false_goto = 1,
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
-               .cond_start_idx = 37,
+               .cond_start_idx = 36,
                .cond_nums = 0 },
        .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
-       .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH,
+       .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .key_start_idx = 1421,
-       .blob_key_bit_size = 73,
-       .key_bit_size = 73,
-       .key_num_fields = 5,
-       .ident_start_idx = 23,
-       .ident_nums = 1
+       .key_start_idx = 1306,
+       .blob_key_bit_size = 14,
+       .key_bit_size = 14,
+       .key_num_fields = 3,
+       .ident_start_idx = 24,
+       .ident_nums = 3
        },
-       { /* class_tid: 3, , table: control.0 */
+       { /* class_tid: 2, , table: control.profile_tcam_cache.f2_check */
        .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE,
-       .direction = TF_DIR_TX,
+       .direction = TF_DIR_RX,
        .execute_info = {
                .cond_true_goto  = 1,
                .cond_false_goto = 4,
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
-               .cond_start_idx = 37,
+               .cond_start_idx = 36,
                .cond_nums = 1 },
        .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,
        .fdb_operand = BNXT_ULP_RF_IDX_RID
        },
-       { /* class_tid: 3, , table: port_table.egr.rd */
-       .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE,
-       .resource_sub_type =
-               BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PORT_TABLE,
-       .direction = TF_DIR_TX,
+       { /* class_tid: 2, , table: fkb_select.f2_wm */
+       .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+       .resource_type = TF_TBL_TYPE_WC_FKB,
+       .direction = TF_DIR_RX,
        .execute_info = {
                .cond_true_goto  = 1,
                .cond_false_goto = 1,
-               .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
-               .cond_start_idx = 38,
-               .cond_nums = 0 },
-       .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
-       .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
+               .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
+               .cond_start_idx = 37,
+               .cond_nums = 1 },
+       .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE,
+       .tbl_operand = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_4,
        .fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
-       .key_start_idx = 1426,
-       .blob_key_bit_size = 10,
-       .key_bit_size = 10,
-       .key_num_fields = 1,
-       .ident_start_idx = 24,
-       .ident_nums = 3
+       .result_start_idx = 553,
+       .result_bit_size = 106,
+       .result_num_fields = 106
        },
-       { /* class_tid: 3, , table: l2_cntxt_tcam.0 */
+       { /* class_tid: 2, , table: profile_tcam.f2 */
        .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
-       .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
-       .direction = TF_DIR_TX,
+       .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
+       .direction = TF_DIR_RX,
        .execute_info = {
                .cond_true_goto  = 1,
                .cond_false_goto = 1,
@@ -1091,26 +1068,27 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
                .cond_start_idx = 38,
                .cond_nums = 0 },
        .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE,
-       .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0,
+       .tbl_operand = BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE,
        .fdb_operand = BNXT_ULP_RF_IDX_RID,
        .pri_opcode  = BNXT_ULP_PRI_OPC_CONST,
-       .pri_operand = 0,
-       .key_start_idx = 1427,
-       .blob_key_bit_size = 213,
-       .key_bit_size = 213,
-       .key_num_fields = 21,
-       .result_start_idx = 557,
-       .result_bit_size = 43,
-       .result_num_fields = 6,
-       .ident_start_idx = 27,
-       .ident_nums = 1
+       .pri_operand = 1,
+       .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
+       .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
+       .key_start_idx = 1309,
+       .blob_key_bit_size = 94,
+       .key_bit_size = 94,
+       .key_num_fields = 43,
+       .result_start_idx = 659,
+       .result_bit_size = 33,
+       .result_num_fields = 8
        },
-       { /* class_tid: 3, , table: mac_addr_cache.wr */
+       { /* class_tid: 2, , table: profile_tcam_cache.f2_wr */
        .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE,
+       .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
        .resource_sub_type =
-               BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_MAC_ADDR_CACHE,
-       .direction = TF_DIR_TX,
+               BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PROFILE_TCAM,
+       .direction = TF_DIR_RX,
        .execute_info = {
                .cond_true_goto  = 1,
                .cond_false_goto = 1,
@@ -1118,15 +1096,61 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
                .cond_start_idx = 38,
                .cond_nums = 0 },
        .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
-       .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH,
+       .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .key_start_idx = 1448,
-       .blob_key_bit_size = 73,
-       .key_bit_size = 73,
-       .key_num_fields = 5,
-       .result_start_idx = 563,
-       .result_bit_size = 62,
-       .result_num_fields = 4
+       .key_start_idx = 1352,
+       .blob_key_bit_size = 14,
+       .key_bit_size = 14,
+       .key_num_fields = 3,
+       .result_start_idx = 667,
+       .result_bit_size = 138,
+       .result_num_fields = 7
+       },
+       { /* class_tid: 2, , table: wm.l3_l4.ipv4 */
+       .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+       .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM,
+       .direction = TF_DIR_RX,
+       .execute_info = {
+               .cond_true_goto  = 0,
+               .cond_false_goto = 0,
+               .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
+               .cond_start_idx = 38,
+               .cond_nums = 1 },
+       .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE,
+       .tbl_operand = BNXT_ULP_RF_IDX_WC_TCAM_INDEX_0,
+       .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
+       .pri_opcode  = BNXT_ULP_PRI_OPC_CONST,
+       .pri_operand = 0,
+       .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
+       .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,
+       .key_start_idx = 1355,
+       .blob_key_bit_size = 0,
+       .key_bit_size = 0,
+       .key_num_fields = 114,
+       .result_start_idx = 674,
+       .result_bit_size = 38,
+       .result_num_fields = 5
+       },
+       { /* class_tid: 3, , table: l2_cntxt_tcam_cache.rd */
+       .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE,
+       .resource_sub_type =
+               BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_L2_CNTXT_TCAM,
+       .direction = TF_DIR_TX,
+       .execute_info = {
+               .cond_true_goto  = 1,
+               .cond_false_goto = 1,
+               .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+               .cond_start_idx = 39,
+               .cond_nums = 0 },
+       .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
+       .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
+       .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
+       .key_start_idx = 1469,
+       .blob_key_bit_size = 8,
+       .key_bit_size = 8,
+       .key_num_fields = 1,
+       .ident_start_idx = 27,
+       .ident_nums = 1
        },
        { /* class_tid: 3, , table: control.ipv6_check */
        .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE,
@@ -1135,7 +1159,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
                .cond_true_goto  = 1,
                .cond_false_goto = 8,
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
-               .cond_start_idx = 38,
+               .cond_start_idx = 39,
                .cond_nums = 1 },
        .fdb_opcode = BNXT_ULP_FDB_OPC_NOP
        },
@@ -1148,12 +1172,12 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
                .cond_true_goto  = 1,
                .cond_false_goto = 1023,
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
-               .cond_start_idx = 39,
+               .cond_start_idx = 40,
                .cond_nums = 1 },
        .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
        .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .key_start_idx = 1453,
+       .key_start_idx = 1470,
        .blob_key_bit_size = 14,
        .key_bit_size = 14,
        .key_num_fields = 3,
@@ -1167,7 +1191,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
                .cond_true_goto  = 2,
                .cond_false_goto = 1,
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
-               .cond_start_idx = 40,
+               .cond_start_idx = 41,
                .cond_nums = 1 },
        .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,
        .fdb_operand = BNXT_ULP_RF_IDX_RID
@@ -1179,7 +1203,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
                .cond_true_goto  = 4,
                .cond_false_goto = 1023,
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
-               .cond_start_idx = 41,
+               .cond_start_idx = 42,
                .cond_nums = 1 },
        .fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
        .func_info = {
@@ -1198,13 +1222,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
                .cond_true_goto  = 1,
                .cond_false_goto = 1,
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
-               .cond_start_idx = 42,
+               .cond_start_idx = 43,
                .cond_nums = 0 },
        .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
        .tbl_operand = BNXT_ULP_RF_IDX_EM_KEY_ID_0,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE,
        .fdb_operand = BNXT_ULP_RF_IDX_RID,
-       .result_start_idx = 567,
+       .result_start_idx = 679,
        .result_bit_size = 106,
        .result_num_fields = 106
        },
@@ -1216,7 +1240,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
                .cond_true_goto  = 1,
                .cond_false_goto = 1,
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
-               .cond_start_idx = 42,
+               .cond_start_idx = 43,
                .cond_nums = 0 },
        .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE,
        .tbl_operand = BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0,
@@ -1226,11 +1250,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .pri_operand = 0,
        .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
        .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
-       .key_start_idx = 1456,
+       .key_start_idx = 1473,
        .blob_key_bit_size = 94,
        .key_bit_size = 94,
        .key_num_fields = 43,
-       .result_start_idx = 673,
+       .result_start_idx = 785,
        .result_bit_size = 33,
        .result_num_fields = 8,
        .ident_start_idx = 32,
@@ -1246,16 +1270,16 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
                .cond_true_goto  = 1,
                .cond_false_goto = 1,
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
-               .cond_start_idx = 42,
+               .cond_start_idx = 43,
                .cond_nums = 0 },
        .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
        .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .key_start_idx = 1499,
+       .key_start_idx = 1516,
        .blob_key_bit_size = 14,
        .key_bit_size = 14,
        .key_num_fields = 3,
-       .result_start_idx = 681,
+       .result_start_idx = 793,
        .result_bit_size = 138,
        .result_num_fields = 7
        },
@@ -1267,15 +1291,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
                .cond_true_goto  = 0,
                .cond_false_goto = 1,
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
-               .cond_start_idx = 42,
+               .cond_start_idx = 43,
                .cond_nums = 0 },
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
        .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,
-       .key_start_idx = 1502,
+       .key_start_idx = 1519,
        .blob_key_bit_size = 0,
        .key_bit_size = 0,
        .key_num_fields = 114,
-       .result_start_idx = 688,
+       .result_start_idx = 800,
        .result_bit_size = 0,
        .result_num_fields = 6
        },
@@ -1288,12 +1312,12 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
                .cond_true_goto  = 1,
                .cond_false_goto = 1,
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
-               .cond_start_idx = 42,
+               .cond_start_idx = 43,
                .cond_nums = 0 },
        .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
        .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .key_start_idx = 1616,
+       .key_start_idx = 1633,
        .blob_key_bit_size = 14,
        .key_bit_size = 14,
        .key_num_fields = 3,
@@ -1304,32 +1328,14 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE,
        .direction = TF_DIR_TX,
        .execute_info = {
-               .cond_true_goto  = 2,
-               .cond_false_goto = 1,
+               .cond_true_goto  = 1,
+               .cond_false_goto = 5,
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
-               .cond_start_idx = 42,
+               .cond_start_idx = 43,
                .cond_nums = 1 },
        .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,
        .fdb_operand = BNXT_ULP_RF_IDX_RID
        },
-       { /* class_tid: 3, , table: control.conflict_check */
-       .resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE,
-       .direction = TF_DIR_TX,
-       .execute_info = {
-               .cond_true_goto  = 5,
-               .cond_false_goto = 1023,
-               .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
-               .cond_start_idx = 43,
-               .cond_nums = 1 },
-       .fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
-       .func_info = {
-               .func_opc = BNXT_ULP_FUNC_OPC_EQ,
-               .func_src1 = BNXT_ULP_FUNC_SRC_REGFILE,
-               .func_opr1 = BNXT_ULP_RF_IDX_FLOW_SIG_ID,
-               .func_src2 = BNXT_ULP_FUNC_SRC_COMP_FIELD,
-               .func_opr2 = BNXT_ULP_CF_IDX_FLOW_SIG_ID,
-               .func_dst_opr = BNXT_ULP_RF_IDX_CC }
-       },
        { /* class_tid: 3, , table: fkb_select.l3_l4_wc */
        .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
        .resource_type = TF_TBL_TYPE_WC_FKB,
@@ -1343,7 +1349,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE,
        .tbl_operand = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1,
        .fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
-       .result_start_idx = 694,
+       .result_start_idx = 806,
        .result_bit_size = 106,
        .result_num_fields = 106
        },
@@ -1365,11 +1371,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .pri_operand = 0,
        .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
        .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
-       .key_start_idx = 1619,
+       .key_start_idx = 1636,
        .blob_key_bit_size = 94,
        .key_bit_size = 94,
        .key_num_fields = 43,
-       .result_start_idx = 800,
+       .result_start_idx = 912,
        .result_bit_size = 33,
        .result_num_fields = 8,
        .ident_start_idx = 35,
@@ -1393,11 +1399,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .pri_operand = 0,
        .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
        .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
-       .key_start_idx = 1662,
+       .key_start_idx = 1679,
        .blob_key_bit_size = 94,
        .key_bit_size = 94,
        .key_num_fields = 43,
-       .result_start_idx = 808,
+       .result_start_idx = 920,
        .result_bit_size = 33,
        .result_num_fields = 8,
        .ident_start_idx = 35,
@@ -1418,11 +1424,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
        .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .key_start_idx = 1705,
+       .key_start_idx = 1722,
        .blob_key_bit_size = 14,
        .key_bit_size = 14,
        .key_num_fields = 3,
-       .result_start_idx = 816,
+       .result_start_idx = 928,
        .result_bit_size = 138,
        .result_num_fields = 7
        },
@@ -1443,11 +1449,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .pri_operand = 0,
        .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
        .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,
-       .key_start_idx = 1708,
+       .key_start_idx = 1725,
        .blob_key_bit_size = 0,
        .key_bit_size = 0,
        .key_num_fields = 114,
-       .result_start_idx = 823,
+       .result_start_idx = 935,
        .result_bit_size = 38,
        .result_num_fields = 5
        },
@@ -1468,11 +1474,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .pri_operand = 0,
        .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
        .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,
-       .key_start_idx = 1822,
+       .key_start_idx = 1839,
        .blob_key_bit_size = 0,
        .key_bit_size = 0,
        .key_num_fields = 114,
-       .result_start_idx = 828,
+       .result_start_idx = 940,
        .result_bit_size = 38,
        .result_num_fields = 5
        },
@@ -1493,11 +1499,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .pri_operand = 0,
        .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
        .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,
-       .key_start_idx = 1936,
+       .key_start_idx = 1953,
        .blob_key_bit_size = 0,
        .key_bit_size = 0,
        .key_num_fields = 114,
-       .result_start_idx = 833,
+       .result_start_idx = 945,
        .result_bit_size = 38,
        .result_num_fields = 5
        },
@@ -1517,7 +1523,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_operand = BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
        .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-       .result_start_idx = 838,
+       .result_start_idx = 950,
        .result_bit_size = 128,
        .result_num_fields = 17
        },
@@ -1535,11 +1541,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
        .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .key_start_idx = 2050,
+       .key_start_idx = 2067,
        .blob_key_bit_size = 10,
        .key_bit_size = 10,
        .key_num_fields = 1,
-       .result_start_idx = 855,
+       .result_start_idx = 967,
        .result_bit_size = 152,
        .result_num_fields = 5
        },
@@ -1557,7 +1563,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
        .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .key_start_idx = 2051,
+       .key_start_idx = 2068,
        .blob_key_bit_size = 8,
        .key_bit_size = 8,
        .key_num_fields = 1,
@@ -1594,11 +1600,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .pri_operand = 0,
        .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
        .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
-       .key_start_idx = 2052,
+       .key_start_idx = 2069,
        .blob_key_bit_size = 213,
        .key_bit_size = 213,
        .key_num_fields = 21,
-       .result_start_idx = 860,
+       .result_start_idx = 972,
        .result_bit_size = 43,
        .result_num_fields = 6,
        .ident_start_idx = 35,
@@ -1618,11 +1624,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
        .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .key_start_idx = 2073,
+       .key_start_idx = 2090,
        .blob_key_bit_size = 8,
        .key_bit_size = 8,
        .key_num_fields = 1,
-       .result_start_idx = 866,
+       .result_start_idx = 978,
        .result_bit_size = 62,
        .result_num_fields = 4
        },
@@ -1639,7 +1645,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
        .tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF,
        .fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
-       .result_start_idx = 870,
+       .result_start_idx = 982,
        .result_bit_size = 32,
        .result_num_fields = 1
        },
@@ -1656,7 +1662,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
        .tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF,
        .fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
-       .result_start_idx = 871,
+       .result_start_idx = 983,
        .result_bit_size = 32,
        .result_num_fields = 1
        },
@@ -1676,7 +1682,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
        .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-       .result_start_idx = 872,
+       .result_start_idx = 984,
        .result_bit_size = 128,
        .result_num_fields = 17,
        .encap_num_fields = 0
@@ -1695,11 +1701,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
        .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .key_start_idx = 2074,
+       .key_start_idx = 2091,
        .blob_key_bit_size = 10,
        .key_bit_size = 10,
        .key_num_fields = 1,
-       .result_start_idx = 889,
+       .result_start_idx = 1001,
        .result_bit_size = 152,
        .result_num_fields = 5
        },
@@ -1728,7 +1734,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
        .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .key_start_idx = 2075,
+       .key_start_idx = 2092,
        .blob_key_bit_size = 8,
        .key_bit_size = 8,
        .key_num_fields = 1,
@@ -1761,7 +1767,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_SVIF,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE,
        .fdb_operand = BNXT_ULP_RF_IDX_RID,
-       .result_start_idx = 894,
+       .result_start_idx = 1006,
        .result_bit_size = 64,
        .result_num_fields = 8
        },
@@ -1779,11 +1785,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
        .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .key_start_idx = 2076,
+       .key_start_idx = 2093,
        .blob_key_bit_size = 8,
        .key_bit_size = 8,
        .key_num_fields = 1,
-       .result_start_idx = 902,
+       .result_start_idx = 1014,
        .result_bit_size = 62,
        .result_num_fields = 4
        },
@@ -1801,7 +1807,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
        .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .key_start_idx = 2077,
+       .key_start_idx = 2094,
        .blob_key_bit_size = 8,
        .key_bit_size = 8,
        .key_num_fields = 1,
@@ -1836,11 +1842,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .fdb_operand = BNXT_ULP_RF_IDX_RID,
        .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
        .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
-       .key_start_idx = 2078,
+       .key_start_idx = 2095,
        .blob_key_bit_size = 213,
        .key_bit_size = 213,
        .key_num_fields = 21,
-       .result_start_idx = 906,
+       .result_start_idx = 1018,
        .result_bit_size = 43,
        .result_num_fields = 6,
        .ident_start_idx = 36,
@@ -1860,11 +1866,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
        .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .key_start_idx = 2099,
+       .key_start_idx = 2116,
        .blob_key_bit_size = 8,
        .key_bit_size = 8,
        .key_num_fields = 1,
-       .result_start_idx = 912,
+       .result_start_idx = 1024,
        .result_bit_size = 62,
        .result_num_fields = 4
        },
@@ -1881,7 +1887,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
        .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .result_start_idx = 916,
+       .result_start_idx = 1028,
        .result_bit_size = 32,
        .result_num_fields = 1
        },
@@ -1898,7 +1904,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
        .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .result_start_idx = 917,
+       .result_start_idx = 1029,
        .result_bit_size = 32,
        .result_num_fields = 1
        },
@@ -1918,11 +1924,33 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_operand = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR,
        .fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
        .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-       .result_start_idx = 918,
+       .result_start_idx = 1030,
        .result_bit_size = 128,
        .result_num_fields = 17,
        .encap_num_fields = 0
        },
+       { /* class_tid: 5, , table: port_table.egr_wr */
+       .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE,
+       .resource_sub_type =
+               BNXT_ULP_RESOURCE_SUB_TYPE_GENERIC_TABLE_PORT_TABLE,
+       .direction = TF_DIR_TX,
+       .execute_info = {
+               .cond_true_goto  = 1,
+               .cond_false_goto = 1,
+               .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
+               .cond_start_idx = 52,
+               .cond_nums = 0 },
+       .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
+       .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
+       .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
+       .key_start_idx = 2117,
+       .blob_key_bit_size = 10,
+       .key_bit_size = 10,
+       .key_num_fields = 1,
+       .result_start_idx = 1047,
+       .result_bit_size = 152,
+       .result_num_fields = 5
+       },
        { /* class_tid: 5, , table: l2_cntxt_tcam_cache.vf_rd_egr */
        .resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE,
        .resource_sub_type =
@@ -1937,7 +1965,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
        .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .key_start_idx = 2100,
+       .key_start_idx = 2118,
        .blob_key_bit_size = 8,
        .key_bit_size = 8,
        .key_num_fields = 1,
@@ -1972,11 +2000,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .fdb_operand = BNXT_ULP_RF_IDX_RID,
        .pri_opcode  = BNXT_ULP_PRI_OPC_CONST,
        .pri_operand = 0,
-       .key_start_idx = 2101,
+       .key_start_idx = 2119,
        .blob_key_bit_size = 213,
        .key_bit_size = 213,
        .key_num_fields = 21,
-       .result_start_idx = 935,
+       .result_start_idx = 1052,
        .result_bit_size = 43,
        .result_num_fields = 6,
        .ident_start_idx = 37,
@@ -1996,11 +2024,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
        .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .key_start_idx = 2122,
+       .key_start_idx = 2140,
        .blob_key_bit_size = 8,
        .key_bit_size = 8,
        .key_num_fields = 1,
-       .result_start_idx = 941,
+       .result_start_idx = 1058,
        .result_bit_size = 62,
        .result_num_fields = 4
        },
@@ -2017,7 +2045,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST,
        .tbl_operand = ULP_THOR_SYM_LOOPBACK_PARIF,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .result_start_idx = 945,
+       .result_start_idx = 1062,
        .result_bit_size = 32,
        .result_num_fields = 1
        },
@@ -2034,7 +2062,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST,
        .tbl_operand = ULP_THOR_SYM_LOOPBACK_PARIF,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .result_start_idx = 946,
+       .result_start_idx = 1063,
        .result_bit_size = 32,
        .result_num_fields = 1
        },
@@ -2054,7 +2082,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
        .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_AND_SET_VFR_FLAG,
-       .result_start_idx = 947,
+       .result_start_idx = 1064,
        .result_bit_size = 128,
        .result_num_fields = 17,
        .encap_num_fields = 0
@@ -2072,7 +2100,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
        .tbl_operand = BNXT_ULP_CF_IDX_VF_FUNC_SVIF,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .result_start_idx = 964,
+       .result_start_idx = 1081,
        .result_bit_size = 64,
        .result_num_fields = 8
        },
@@ -2091,7 +2119,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
        .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .key_start_idx = 2123,
+       .key_start_idx = 2141,
        .blob_key_bit_size = 8,
        .key_bit_size = 8,
        .key_num_fields = 1,
@@ -2124,7 +2152,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_SVIF,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE,
        .fdb_operand = BNXT_ULP_RF_IDX_RID,
-       .result_start_idx = 972,
+       .result_start_idx = 1089,
        .result_bit_size = 64,
        .result_num_fields = 8
        },
@@ -2142,11 +2170,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
        .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .key_start_idx = 2124,
+       .key_start_idx = 2142,
        .blob_key_bit_size = 8,
        .key_bit_size = 8,
        .key_num_fields = 1,
-       .result_start_idx = 980,
+       .result_start_idx = 1097,
        .result_bit_size = 62,
        .result_num_fields = 4
        },
@@ -2165,7 +2193,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE,
        .tbl_operand = BNXT_ULP_GLB_RF_IDX_GLB_METADATA_PROF_0,
        .fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
-       .result_start_idx = 984,
+       .result_start_idx = 1101,
        .result_bit_size = 16,
        .result_num_fields = 1
        },
@@ -2184,8 +2212,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
        .tbl_operand = BNXT_ULP_RF_IDX_MODIFY_PTR,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .record_size = 64,
-       .result_start_idx = 985,
+       .result_start_idx = 1102,
        .result_bit_size = 0,
        .result_num_fields = 0,
        .encap_num_fields = 47
@@ -2206,7 +2233,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
        .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-       .result_start_idx = 1032,
+       .result_start_idx = 1149,
        .result_bit_size = 128,
        .result_num_fields = 17
        },
@@ -2224,7 +2251,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
        .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .key_start_idx = 2125,
+       .key_start_idx = 2143,
        .blob_key_bit_size = 8,
        .key_bit_size = 8,
        .key_num_fields = 1,
@@ -2261,11 +2288,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .pri_operand = 0,
        .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
        .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
-       .key_start_idx = 2126,
+       .key_start_idx = 2144,
        .blob_key_bit_size = 213,
        .key_bit_size = 213,
        .key_num_fields = 21,
-       .result_start_idx = 1049,
+       .result_start_idx = 1166,
        .result_bit_size = 43,
        .result_num_fields = 6,
        .ident_start_idx = 38,
@@ -2284,7 +2311,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE,
        .tbl_operand = BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_KEY_ID_0,
        .fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
-       .result_start_idx = 1055,
+       .result_start_idx = 1172,
        .result_bit_size = 106,
        .result_num_fields = 106
        },
@@ -2306,11 +2333,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .pri_operand = 0,
        .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
        .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
-       .key_start_idx = 2147,
+       .key_start_idx = 2165,
        .blob_key_bit_size = 94,
        .key_bit_size = 94,
        .key_num_fields = 43,
-       .result_start_idx = 1161,
+       .result_start_idx = 1278,
        .result_bit_size = 33,
        .result_num_fields = 8
        },
@@ -2325,15 +2352,16 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
                .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
                .cond_start_idx = 55,
                .cond_nums = 0 },
-       .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
+       .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
        .gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
-       .key_start_idx = 2190,
+       .key_start_idx = 2208,
        .blob_key_bit_size = 8,
        .key_bit_size = 8,
        .key_num_fields = 1,
-       .ident_start_idx = 38,
-       .ident_nums = 1
+       .result_start_idx = 1286,
+       .result_bit_size = 62,
+       .result_num_fields = 4
        },
        { /* class_tid: 5, , table: int_full_act_record.vfr_ing0 */
        .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -2351,7 +2379,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
        .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
        .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
-       .result_start_idx = 1169,
+       .result_start_idx = 1290,
        .result_bit_size = 128,
        .result_num_fields = 17
        },
@@ -2367,11 +2395,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
                .cond_nums = 0 },
        .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
        .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,
-       .key_start_idx = 2191,
+       .key_start_idx = 2209,
        .blob_key_bit_size = 0,
        .key_bit_size = 0,
        .key_num_fields = 114,
-       .result_start_idx = 1186,
+       .result_start_idx = 1307,
        .result_bit_size = 0,
        .result_num_fields = 6
        }
@@ -2529,6 +2557,26 @@ struct bnxt_ulp_mapper_cond_info ulp_thor_class_cond_list[] = {
        .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET,
        .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS
        },
+       /* cond_execute: class_tid: 2, control.ipv6_check */
+       {
+       .cond_opcode = BNXT_ULP_COND_OPC_HDR_BIT_IS_SET,
+       .cond_operand = BNXT_ULP_HDR_BIT_I_IPV6
+       },
+       /* cond_execute: class_tid: 2, profile_tcam_cache.f2_ipv6_rd */
+       {
+       .cond_opcode = BNXT_ULP_COND_OPC_CF_NOT_SET,
+       .cond_operand = BNXT_ULP_CF_IDX_WC_MATCH
+       },
+       /* cond_execute: class_tid: 2, control.f2_ipv6_prof_cache_check */
+       {
+       .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET,
+       .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS
+       },
+       /* cond_execute: class_tid: 2, control.f2_v6_conflict_check */
+       {
+       .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET,
+       .cond_operand = BNXT_ULP_RF_IDX_CC
+       },
        /* cond_execute: class_tid: 2, control.profile_tcam_cache.f2_check */
        {
        .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET,
@@ -2544,21 +2592,6 @@ struct bnxt_ulp_mapper_cond_info ulp_thor_class_cond_list[] = {
        .cond_opcode = BNXT_ULP_COND_OPC_HDR_BIT_IS_SET,
        .cond_operand = BNXT_ULP_HDR_BIT_O_IPV4
        },
-       /* cond_execute: class_tid: 2, wm.l3_l4.ipv6 */
-       {
-       .cond_opcode = BNXT_ULP_COND_OPC_HDR_BIT_IS_SET,
-       .cond_operand = BNXT_ULP_HDR_BIT_O_IPV6
-       },
-       /* cond_execute: class_tid: 3, l2_cntxt_tcam_cache.rd */
-       {
-       .cond_opcode = BNXT_ULP_COND_OPC_FIELD_BIT_NOT_SET,
-       .cond_operand = BNXT_ULP_GLB_HF_ID_O_ETH_SMAC
-       },
-       /* cond_execute: class_tid: 3, control.0 */
-       {
-       .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET,
-       .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS
-       },
        /* cond_execute: class_tid: 3, control.ipv6_check */
        {
        .cond_opcode = BNXT_ULP_COND_OPC_HDR_BIT_IS_SET,
@@ -2584,11 +2617,6 @@ struct bnxt_ulp_mapper_cond_info ulp_thor_class_cond_list[] = {
        .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET,
        .cond_operand = BNXT_ULP_RF_IDX_GENERIC_TBL_MISS
        },
-       /* cond_execute: class_tid: 3, control.conflict_check */
-       {
-       .cond_opcode = BNXT_ULP_COND_OPC_RF_IS_SET,
-       .cond_operand = BNXT_ULP_RF_IDX_CC
-       },
        /* cond_execute: class_tid: 3, profile_tcam.l3_l4.ip */
        {
        .cond_opcode = BNXT_ULP_COND_OPC_CF_IS_SET,
@@ -5115,12 +5143,24 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
        .field_info_mask = {
                .description = "l3.prot",
                .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
                },
        .field_info_spec = {
                .description = "l3.prot",
                .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr1 = {
+               (BNXT_ULP_CF_IDX_O_L3_FB_PROTO_ID >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_O_L3_FB_PROTO_ID & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr2 = {
+                       (BNXT_ULP_CF_IDX_O_L3_PROTO_ID >> 8) & 0xff,
+                       BNXT_ULP_CF_IDX_O_L3_PROTO_ID & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
                }
        },
        {
@@ -8346,7 +8386,10 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
                .field_opr1 = {
                (BNXT_ULP_CF_IDX_O_L4_FB_SRC_PORT >> 8) & 0xff,
                BNXT_ULP_CF_IDX_O_L4_FB_SRC_PORT & 0xff},
-               .field_src2 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_src2 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr2 = {
+                       (BNXT_ULP_CF_IDX_O_L4_SRC_PORT_MASK >> 8) & 0xff,
+                       BNXT_ULP_CF_IDX_O_L4_SRC_PORT_MASK & 0xff},
                .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
@@ -8373,7 +8416,10 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
                .field_opr1 = {
                (BNXT_ULP_CF_IDX_O_L4_FB_DST_PORT >> 8) & 0xff,
                BNXT_ULP_CF_IDX_O_L4_FB_DST_PORT & 0xff},
-               .field_src2 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_src2 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr2 = {
+                       (BNXT_ULP_CF_IDX_O_L4_DST_PORT_MASK >> 8) & 0xff,
+                       BNXT_ULP_CF_IDX_O_L4_DST_PORT_MASK & 0xff},
                .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
@@ -15050,7 +15096,10 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
                .field_opr1 = {
                (BNXT_ULP_CF_IDX_O_L4_FB_SRC_PORT >> 8) & 0xff,
                BNXT_ULP_CF_IDX_O_L4_FB_SRC_PORT & 0xff},
-               .field_src2 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_src2 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr2 = {
+                       (BNXT_ULP_CF_IDX_O_L4_SRC_PORT_MASK >> 8) & 0xff,
+                       BNXT_ULP_CF_IDX_O_L4_SRC_PORT_MASK & 0xff},
                .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
@@ -15077,7 +15126,10 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
                .field_opr1 = {
                (BNXT_ULP_CF_IDX_O_L4_FB_DST_PORT >> 8) & 0xff,
                BNXT_ULP_CF_IDX_O_L4_FB_DST_PORT & 0xff},
-               .field_src2 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_src2 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr2 = {
+                       (BNXT_ULP_CF_IDX_O_L4_DST_PORT_MASK >> 8) & 0xff,
+                       BNXT_ULP_CF_IDX_O_L4_DST_PORT_MASK & 0xff},
                .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
@@ -16551,7 +16603,10 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
                .field_opr1 = {
                (BNXT_ULP_CF_IDX_O_L4_FB_SRC_PORT >> 8) & 0xff,
                BNXT_ULP_CF_IDX_O_L4_FB_SRC_PORT & 0xff},
-               .field_src2 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_src2 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr2 = {
+                       (BNXT_ULP_CF_IDX_O_L4_SRC_PORT_MASK >> 8) & 0xff,
+                       BNXT_ULP_CF_IDX_O_L4_SRC_PORT_MASK & 0xff},
                .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
@@ -16578,7 +16633,10 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
                .field_opr1 = {
                (BNXT_ULP_CF_IDX_O_L4_FB_DST_PORT >> 8) & 0xff,
                BNXT_ULP_CF_IDX_O_L4_FB_DST_PORT & 0xff},
-               .field_src2 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_src2 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr2 = {
+                       (BNXT_ULP_CF_IDX_O_L4_DST_PORT_MASK >> 8) & 0xff,
+                       BNXT_ULP_CF_IDX_O_L4_DST_PORT_MASK & 0xff},
                .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
@@ -18283,7 +18341,7 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
                BNXT_ULP_GLB_HF_ID_O_ETH_DMAC & 0xff}
                }
        },
-       /* class_tid: 2, , table: profile_tcam_cache.f2_rd */
+       /* class_tid: 2, , table: profile_tcam_cache.f2_ipv6_rd */
        {
        .field_info_mask = {
                .description = "recycle_cnt",
@@ -18338,7 +18396,7 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
                BNXT_ULP_CF_IDX_HDR_SIG_ID & 0xff}
                }
        },
-       /* class_tid: 2, , table: profile_tcam.f2 */
+       /* class_tid: 2, , table: profile_tcam.f2_l2_l3_l4_v6_em */
        {
        .field_info_mask = {
                .description = "l4_hdr_is_udp_tcp",
@@ -18357,14 +18415,34 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
        .field_info_mask = {
                .description = "l4_hdr_type",
                .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr1 = {
+               (BNXT_ULP_CF_IDX_I_L4 >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_I_L4 & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
                .description = "l4_hdr_type",
                .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT,
+               .field_opr1 = {
+               ((uint64_t)BNXT_ULP_HDR_BIT_I_TCP >> 56) & 0xff,
+               ((uint64_t)BNXT_ULP_HDR_BIT_I_TCP >> 48) & 0xff,
+               ((uint64_t)BNXT_ULP_HDR_BIT_I_TCP >> 40) & 0xff,
+               ((uint64_t)BNXT_ULP_HDR_BIT_I_TCP >> 32) & 0xff,
+               ((uint64_t)BNXT_ULP_HDR_BIT_I_TCP >> 24) & 0xff,
+               ((uint64_t)BNXT_ULP_HDR_BIT_I_TCP >> 16) & 0xff,
+               ((uint64_t)BNXT_ULP_HDR_BIT_I_TCP >> 8) & 0xff,
+               (uint64_t)BNXT_ULP_HDR_BIT_I_TCP & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_CONST,
+               .field_opr2 = {
+                       ULP_THOR_SYM_L4_HDR_TYPE_TCP},
+               .field_src3 = BNXT_ULP_FIELD_SRC_CONST,
+               .field_opr3 = {
+               ULP_THOR_SYM_L4_HDR_TYPE_UDP}
                }
        },
        {
@@ -18372,7 +18450,10 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
                .description = "l4_hdr_error",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr1 = {
+               (BNXT_ULP_CF_IDX_I_L4 >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_I_L4 & 0xff}
                },
        .field_info_spec = {
                .description = "l4_hdr_error",
@@ -18386,13 +18467,19 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
                .description = "l4_hdr_valid",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr1 = {
+               (BNXT_ULP_CF_IDX_I_L4 >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_I_L4 & 0xff}
                },
        .field_info_spec = {
                .description = "l4_hdr_valid",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr1 = {
+               (BNXT_ULP_CF_IDX_I_L4 >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_I_L4 & 0xff}
                }
        },
        {
@@ -18456,13 +18543,17 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
                .description = "l3_hdr_type",
                .field_bit_size = 4,
                .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
                },
        .field_info_spec = {
                .description = "l3_hdr_type",
                .field_bit_size = 4,
                .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+               .field_opr1 = {
+               ULP_THOR_SYM_L3_HDR_TYPE_IPV6}
                }
        },
        {
@@ -18470,7 +18561,9 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
                .description = "l3_hdr_error",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
                },
        .field_info_spec = {
                .description = "l3_hdr_error",
@@ -18484,13 +18577,17 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
                .description = "l3_hdr_valid",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
                },
        .field_info_spec = {
                .description = "l3_hdr_valid",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+               .field_opr1 = {
+               ULP_THOR_SYM_L3_HDR_VALID_YES}
                }
        },
        {
@@ -18526,7 +18623,9 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
                .description = "l2_uc_mc_bc",
                .field_bit_size = 2,
                .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
                },
        .field_info_spec = {
                .description = "l2_uc_mc_bc",
@@ -18990,15 +19089,13 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
                1}
                }
        },
-       /* class_tid: 2, , table: profile_tcam_cache.f2_wr */
+       /* class_tid: 2, , table: profile_tcam_cache.f2_l2_l3_l4_v6_wr */
        {
        .field_info_mask = {
                .description = "recycle_cnt",
                .field_bit_size = 2,
                .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
-               .field_opr1 = {
-                       0xff}
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
                .description = "recycle_cnt",
@@ -19045,10 +19142,10 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
                BNXT_ULP_CF_IDX_HDR_SIG_ID & 0xff}
                }
        },
-       /* class_tid: 2, , table: wm.l3_l4.ipv4 */
+       /* class_tid: 2, , table: em.f2_l2_l3_l4_v6.0 */
        {
        .field_info_mask = {
-               .description = "wc_profile_id",
+               .description = "em_profile_id",
                .field_bit_size = 8,
                .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
                .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
@@ -19056,13 +19153,13 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
                        0xff}
                },
        .field_info_spec = {
-               .description = "wc_profile_id",
+               .description = "em_profile_id",
                .field_bit_size = 8,
                .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF,
+               .field_src1 = BNXT_ULP_FIELD_SRC_RF,
                .field_opr1 = {
-               (BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_4 >> 8) & 0xff,
-               BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_4 & 0xff}
+               (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff,
+               BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff}
                }
        },
        {
@@ -19401,20 +19498,12 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
        .field_info_mask = {
                .description = "tl3.dip.ipv4",
                .field_bit_size = 32,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_HF,
-               .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR & 0xff}
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
                .description = "tl3.dip.ipv4",
                .field_bit_size = 32,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_HF,
-               .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR & 0xff}
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
@@ -19766,7 +19855,7 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
                .field_opr2 = {
                        (BNXT_ULP_GLB_HF_ID_T_VXLAN_VNI >> 8) & 0xff,
                        BNXT_ULP_GLB_HF_ID_T_VXLAN_VNI & 0xff},
-               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
+               .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
                },
        .field_info_spec = {
                .description = "tids",
@@ -19780,7 +19869,7 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
                .field_opr2 = {
                        (BNXT_ULP_GLB_HF_ID_T_VXLAN_VNI >> 8) & 0xff,
                        BNXT_ULP_GLB_HF_ID_T_VXLAN_VNI & 0xff},
-               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
+               .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
                }
        },
        {
@@ -19879,12 +19968,30 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
        .field_info_mask = {
                .description = "l2_smac",
                .field_bit_size = 48,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+               .field_opr1 = {
+               (BNXT_ULP_GLB_HF_ID_I_ETH_SMAC >> 8) & 0xff,
+               BNXT_ULP_GLB_HF_ID_I_ETH_SMAC & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+               .field_opr2 = {
+                       (BNXT_ULP_GLB_HF_ID_I_ETH_SMAC >> 8) & 0xff,
+                       BNXT_ULP_GLB_HF_ID_I_ETH_SMAC & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
                },
        .field_info_spec = {
                .description = "l2_smac",
                .field_bit_size = 48,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+               .field_opr1 = {
+               (BNXT_ULP_GLB_HF_ID_I_ETH_SMAC >> 8) & 0xff,
+               BNXT_ULP_GLB_HF_ID_I_ETH_SMAC & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+               .field_opr2 = {
+                       (BNXT_ULP_GLB_HF_ID_I_ETH_SMAC >> 8) & 0xff,
+                       BNXT_ULP_GLB_HF_ID_I_ETH_SMAC & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
                }
        },
        {
@@ -20059,12 +20166,30 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
        .field_info_mask = {
                .description = "l3.sip.ipv6",
                .field_bit_size = 128,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+               .field_opr1 = {
+               (BNXT_ULP_GLB_HF_ID_I_IPV6_SRC_ADDR >> 8) & 0xff,
+               BNXT_ULP_GLB_HF_ID_I_IPV6_SRC_ADDR & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+               .field_opr2 = {
+                       (BNXT_ULP_GLB_HF_ID_I_IPV6_SRC_ADDR >> 8) & 0xff,
+                       BNXT_ULP_GLB_HF_ID_I_IPV6_SRC_ADDR & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
                },
        .field_info_spec = {
                .description = "l3.sip.ipv6",
                .field_bit_size = 128,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+               .field_opr1 = {
+               (BNXT_ULP_GLB_HF_ID_I_IPV6_SRC_ADDR >> 8) & 0xff,
+               BNXT_ULP_GLB_HF_ID_I_IPV6_SRC_ADDR & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+               .field_opr2 = {
+                       (BNXT_ULP_GLB_HF_ID_I_IPV6_SRC_ADDR >> 8) & 0xff,
+                       BNXT_ULP_GLB_HF_ID_I_IPV6_SRC_ADDR & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
                }
        },
        {
@@ -20083,42 +20208,42 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
        .field_info_mask = {
                .description = "l3.dip.ipv4",
                .field_bit_size = 32,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
-               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
-               .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_I_IPV4_DST_ADDR >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_I_IPV4_DST_ADDR & 0xff},
-               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
-               .field_opr2 = {
-                       (BNXT_ULP_GLB_HF_ID_I_IPV4_DST_ADDR >> 8) & 0xff,
-                       BNXT_ULP_GLB_HF_ID_I_IPV4_DST_ADDR & 0xff},
-               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
                .description = "l3.dip.ipv4",
                .field_bit_size = 32,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
-               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
-               .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_I_IPV4_DST_ADDR >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_I_IPV4_DST_ADDR & 0xff},
-               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
-               .field_opr2 = {
-                       (BNXT_ULP_GLB_HF_ID_I_IPV4_DST_ADDR >> 8) & 0xff,
-                       BNXT_ULP_GLB_HF_ID_I_IPV4_DST_ADDR & 0xff},
-               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
                .description = "l3.dip.ipv6",
                .field_bit_size = 128,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+               .field_opr1 = {
+               (BNXT_ULP_GLB_HF_ID_I_IPV6_DST_ADDR >> 8) & 0xff,
+               BNXT_ULP_GLB_HF_ID_I_IPV6_DST_ADDR & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+               .field_opr2 = {
+                       (BNXT_ULP_GLB_HF_ID_I_IPV6_DST_ADDR >> 8) & 0xff,
+                       BNXT_ULP_GLB_HF_ID_I_IPV6_DST_ADDR & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
                },
        .field_info_spec = {
                .description = "l3.dip.ipv6",
                .field_bit_size = 128,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+               .field_opr1 = {
+               (BNXT_ULP_GLB_HF_ID_I_IPV6_DST_ADDR >> 8) & 0xff,
+               BNXT_ULP_GLB_HF_ID_I_IPV6_DST_ADDR & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+               .field_opr2 = {
+                       (BNXT_ULP_GLB_HF_ID_I_IPV6_DST_ADDR >> 8) & 0xff,
+                       BNXT_ULP_GLB_HF_ID_I_IPV6_DST_ADDR & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
                }
        },
        {
@@ -20149,12 +20274,24 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
        .field_info_mask = {
                .description = "l3.prot",
                .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
                },
        .field_info_spec = {
                .description = "l3.prot",
                .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr1 = {
+               (BNXT_ULP_CF_IDX_I_L3_FB_PROTO_ID >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_I_L3_FB_PROTO_ID & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr2 = {
+                       (BNXT_ULP_CF_IDX_I_L3_PROTO_ID >> 8) & 0xff,
+                       BNXT_ULP_CF_IDX_I_L3_PROTO_ID & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
                }
        },
        {
@@ -20341,24 +20478,50 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
        .field_info_mask = {
                .description = "l4.src",
                .field_bit_size = 16,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff,
+                       0xff}
                },
        .field_info_spec = {
                .description = "l4.src",
                .field_bit_size = 16,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr1 = {
+               (BNXT_ULP_CF_IDX_I_L4_FB_SRC_PORT >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_I_L4_FB_SRC_PORT & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr2 = {
+                       (BNXT_ULP_CF_IDX_I_L4_SRC_PORT >> 8) & 0xff,
+                       BNXT_ULP_CF_IDX_I_L4_SRC_PORT & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
                }
        },
        {
        .field_info_mask = {
                .description = "l4.dst",
                .field_bit_size = 16,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff,
+                       0xff}
                },
        .field_info_spec = {
                .description = "l4.dst",
                .field_bit_size = 16,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr1 = {
+               (BNXT_ULP_CF_IDX_I_L4_FB_DST_PORT >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_I_L4_FB_DST_PORT & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr2 = {
+                       (BNXT_ULP_CF_IDX_I_L4_DST_PORT >> 8) & 0xff,
+                       BNXT_ULP_CF_IDX_I_L4_DST_PORT & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
                }
        },
        {
@@ -20481,2254 +20644,2585 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
-       /* class_tid: 2, , table: wm.l3_l4.ipv6 */
+       /* class_tid: 2, , table: profile_tcam_cache.f2_rd */
        {
        .field_info_mask = {
-               .description = "wc_profile_id",
-               .field_bit_size = 8,
+               .description = "recycle_cnt",
+               .field_bit_size = 2,
                .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
                .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
                .field_opr1 = {
                        0xff}
                },
        .field_info_spec = {
-               .description = "wc_profile_id",
-               .field_bit_size = 8,
+               .description = "recycle_cnt",
+               .field_bit_size = 2,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "prof_func_id",
+               .field_bit_size = 7,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
+               },
+       .field_info_spec = {
+               .description = "prof_func_id",
+               .field_bit_size = 7,
                .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
                .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF,
                .field_opr1 = {
-               (BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_5 >> 8) & 0xff,
-               BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_5 & 0xff}
+               (BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,
+               BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID & 0xff}
                }
        },
        {
        .field_info_mask = {
-               .description = "l2_cntxt_id",
-               .field_bit_size = 10,
+               .description = "hdr_sig_id",
+               .field_bit_size = 5,
                .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
                .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
                .field_opr1 = {
-                       0xff,
                        0xff}
                },
        .field_info_spec = {
-               .description = "l2_cntxt_id",
-               .field_bit_size = 10,
+               .description = "hdr_sig_id",
+               .field_bit_size = 5,
                .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
                .field_opr1 = {
-               (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff,
-               BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff}
+               (BNXT_ULP_CF_IDX_HDR_SIG_ID >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_HDR_SIG_ID & 0xff}
                }
        },
+       /* class_tid: 2, , table: profile_tcam.f2 */
        {
        .field_info_mask = {
-               .description = "parif",
+               .description = "l4_hdr_is_udp_tcp",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               },
+       .field_info_spec = {
+               .description = "l4_hdr_is_udp_tcp",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l4_hdr_type",
                .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "parif",
+               .description = "l4_hdr_type",
                .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "spif",
-               .field_bit_size = 2,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "l4_hdr_error",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "spif",
-               .field_bit_size = 2,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "l4_hdr_error",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "svif",
-               .field_bit_size = 11,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "l4_hdr_valid",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "svif",
-               .field_bit_size = 11,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "l4_hdr_valid",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "lcos",
-               .field_bit_size = 3,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "ieh",
+               .field_bit_size = 8,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "lcos",
-               .field_bit_size = 3,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "ieh",
+               .field_bit_size = 8,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "meta",
-               .field_bit_size = 16,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "l3_ipv6_cmp_dst",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "meta",
-               .field_bit_size = 16,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "l3_ipv6_cmp_dst",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "rcyc_cnt",
-               .field_bit_size = 2,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "l3_ipv6_cmp_src",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "rcyc_cnt",
-               .field_bit_size = 2,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "l3_ipv6_cmp_src",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "loopback",
+               .description = "l3_hdr_isIP",
                .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "loopback",
+               .description = "l3_hdr_isIP",
                .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "tl2_l2type",
-               .field_bit_size = 2,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "l3_hdr_type",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
                },
        .field_info_spec = {
-               .description = "tl2_l2type",
-               .field_bit_size = 2,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "l3_hdr_type",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "tl2_dmac",
-               .field_bit_size = 48,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "l3_hdr_error",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
                },
        .field_info_spec = {
-               .description = "tl2_dmac",
-               .field_bit_size = 48,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "l3_hdr_error",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "tl2_smac",
-               .field_bit_size = 48,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "l3_hdr_valid",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
                },
        .field_info_spec = {
-               .description = "tl2_smac",
-               .field_bit_size = 48,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "l3_hdr_valid",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+               .field_opr1 = {
+               ULP_THOR_SYM_L3_HDR_VALID_YES}
                }
        },
        {
        .field_info_mask = {
-               .description = "tl2_dt",
-               .field_bit_size = 2,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "l2_two_vtags",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "tl2_dt",
-               .field_bit_size = 2,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "l2_two_vtags",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "tl2_sa",
+               .description = "l2_vtag_present",
                .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "tl2_sa",
+               .description = "l2_vtag_present",
                .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "tl2_nvt",
+               .description = "l2_uc_mc_bc",
                .field_bit_size = 2,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "tl2_nvt",
+               .description = "l2_uc_mc_bc",
                .field_bit_size = 2,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "tl2_ovp",
-               .field_bit_size = 3,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "l2_hdr_type",
+               .field_bit_size = 2,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
                },
        .field_info_spec = {
-               .description = "tl2_ovp",
-               .field_bit_size = 3,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "l2_hdr_type",
+               .field_bit_size = 2,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "tl2_ovd",
+               .description = "l2_hdr_error",
                .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
                },
        .field_info_spec = {
-               .description = "tl2_ovd",
+               .description = "l2_hdr_error",
                .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "tl2_ovv",
-               .field_bit_size = 12,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "l2_hdr_valid",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
                },
        .field_info_spec = {
-               .description = "tl2_ovv",
-               .field_bit_size = 12,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "l2_hdr_valid",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+               .field_opr1 = {
+               ULP_THOR_SYM_L2_HDR_VALID_YES}
                }
        },
        {
        .field_info_mask = {
-               .description = "tl2_ovt",
+               .description = "tun_hdr_flags",
                .field_bit_size = 3,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "tl2_ovt",
+               .description = "tun_hdr_flags",
                .field_bit_size = 3,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "tl2_ivp",
-               .field_bit_size = 3,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "tun_hdr_type",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
                },
        .field_info_spec = {
-               .description = "tl2_ivp",
-               .field_bit_size = 3,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "tun_hdr_type",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "tl2_ivd",
+               .description = "tun_hdr_err",
                .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
                },
        .field_info_spec = {
-               .description = "tl2_ivd",
+               .description = "tun_hdr_err",
                .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               }
-       },
-       {
-       .field_info_mask = {
-               .description = "tl2_ivv",
-               .field_bit_size = 12,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               },
-       .field_info_spec = {
-               .description = "tl2_ivv",
-               .field_bit_size = 12,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "tl2_ivt",
-               .field_bit_size = 3,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "tun_hdr_valid",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
                },
        .field_info_spec = {
-               .description = "tl2_ivt",
-               .field_bit_size = 3,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "tun_hdr_valid",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+               .field_opr1 = {
+               ULP_THOR_SYM_TUN_HDR_VALID_YES}
                }
        },
        {
        .field_info_mask = {
-               .description = "tl2_etype",
-               .field_bit_size = 16,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "tl4_hdr_is_udp_tcp",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "tl2_etype",
-               .field_bit_size = 16,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "tl4_hdr_is_udp_tcp",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "tl3.l3type",
+               .description = "tl4_hdr_type",
                .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
                },
        .field_info_spec = {
-               .description = "tl3.l3type",
+               .description = "tl4_hdr_type",
                .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+               .field_opr1 = {
+               ULP_THOR_SYM_TL4_HDR_TYPE_UDP}
                }
        },
        {
        .field_info_mask = {
-               .description = "tl3.sip.ipv4",
-               .field_bit_size = 32,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "tl4_hdr_error",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
                },
        .field_info_spec = {
-               .description = "tl3.sip.ipv4",
-               .field_bit_size = 32,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "tl4_hdr_error",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "tl3.sip.ipv6",
-               .field_bit_size = 128,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "tl4_hdr_valid",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
                },
        .field_info_spec = {
-               .description = "tl3.sip.ipv6",
-               .field_bit_size = 128,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "tl4_hdr_valid",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+               .field_opr1 = {
+               ULP_THOR_SYM_TL4_HDR_VALID_YES}
                }
        },
        {
        .field_info_mask = {
-               .description = "tl3.sip_selcmp.ipv6",
-               .field_bit_size = 72,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "tl3_ipv6_cmp_dst",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "tl3.sip_selcmp.ipv6",
-               .field_bit_size = 72,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "tl3_ipv6_cmp_dst",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "tl3.dip.ipv4",
-               .field_bit_size = 32,
+               .description = "tl3_ipv6_cmp_src",
+               .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_HF,
-               .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR & 0xff}
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "tl3.dip.ipv4",
-               .field_bit_size = 32,
+               .description = "tl3_ipv6_cmp_src",
+               .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_HF,
-               .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR & 0xff}
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "tl3.dip.ipv6",
-               .field_bit_size = 128,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "tl3_hdr_isIP",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "tl3.dip.ipv6",
-               .field_bit_size = 128,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "tl3_hdr_isIP",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "tl3.dip_selcmp.ipv6",
-               .field_bit_size = 72,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "tl3_hdr_type",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
                },
        .field_info_spec = {
-               .description = "tl3.dip_selcmp.ipv6",
-               .field_bit_size = 72,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "tl3_hdr_type",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "tl3.ttl",
-               .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               },
-       .field_info_spec = {
-               .description = "tl3.ttl",
-               .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               }
-       },
-       {
-       .field_info_mask = {
-               .description = "tl3.prot",
-               .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               },
-       .field_info_spec = {
-               .description = "tl3.prot",
-               .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               }
-       },
-       {
-       .field_info_mask = {
-               .description = "tl3.fid.ipv4",
-               .field_bit_size = 16,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               },
-       .field_info_spec = {
-               .description = "tl3.fid.ipv4",
-               .field_bit_size = 16,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               }
-       },
-       {
-       .field_info_mask = {
-               .description = "tl3.fid.ipv6",
-               .field_bit_size = 20,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               },
-       .field_info_spec = {
-               .description = "tl3.fid.ipv6",
-               .field_bit_size = 20,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               }
-       },
-       {
-       .field_info_mask = {
-               .description = "tl3.qos",
-               .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               },
-       .field_info_spec = {
-               .description = "tl3.qos",
-               .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               }
-       },
-       {
-       .field_info_mask = {
-               .description = "tl3.ieh_nonext",
+               .description = "tl3_hdr_error",
                .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
                },
        .field_info_spec = {
-               .description = "tl3.ieh_nonext",
+               .description = "tl3_hdr_error",
                .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "tl3.ieh_esp",
+               .description = "tl3_hdr_valid",
                .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
                },
        .field_info_spec = {
-               .description = "tl3.ieh_esp",
+               .description = "tl3_hdr_valid",
                .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+               .field_opr1 = {
+               ULP_THOR_SYM_TL3_HDR_VALID_YES}
                }
        },
        {
        .field_info_mask = {
-               .description = "tl3.ieh_auth",
+               .description = "tl2_two_vtags",
                .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "tl3.ieh_auth",
+               .description = "tl2_two_vtags",
                .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "tl3.ieh_dest",
+               .description = "tl2_vtag_present",
                .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "tl3.ieh_dest",
+               .description = "tl2_vtag_present",
                .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "tl3.ieh_frag",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "tl2_uc_mc_bc",
+               .field_bit_size = 2,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
                },
        .field_info_spec = {
-               .description = "tl3.ieh_frag",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "tl2_uc_mc_bc",
+               .field_bit_size = 2,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "tl3.ieh_rthdr",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "tl2_hdr_type",
+               .field_bit_size = 2,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "tl3.ieh_rthdr",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "tl2_hdr_type",
+               .field_bit_size = 2,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "tl3.ieh_hop",
+               .description = "tl2_hdr_valid",
                .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
                },
        .field_info_spec = {
-               .description = "tl3.ieh_hop",
+               .description = "tl2_hdr_valid",
                .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+               .field_opr1 = {
+               ULP_THOR_SYM_TL2_HDR_VALID_YES}
                }
        },
        {
        .field_info_mask = {
-               .description = "tl3.ieh_1frag",
+               .description = "hrec_next",
                .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "tl3.ieh_1frag",
+               .description = "hrec_next",
                .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "tl3.df",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "prof_func_id",
+               .field_bit_size = 7,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
                },
        .field_info_spec = {
-               .description = "tl3.df",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "prof_func_id",
+               .field_bit_size = 7,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF,
+               .field_opr1 = {
+               (BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,
+               BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID & 0xff}
                }
        },
        {
        .field_info_mask = {
-               .description = "tl3.l3err",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "agg_error",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "tl3.l3err",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "agg_error",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "tl4.l4type",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "metadata",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "tl4.l4type",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "metadata",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "tl4.src",
-               .field_bit_size = 16,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "pkt_type_0",
+               .field_bit_size = 2,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "tl4.src",
-               .field_bit_size = 16,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "pkt_type_0",
+               .field_bit_size = 2,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "tl4.dst",
-               .field_bit_size = 16,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "pkt_type_1",
+               .field_bit_size = 2,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "tl4.dst",
-               .field_bit_size = 16,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "pkt_type_1",
+               .field_bit_size = 2,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "tl4.flags",
-               .field_bit_size = 9,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "valid",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+               .field_opr1 = {
+               1}
                },
        .field_info_spec = {
-               .description = "tl4.flags",
-               .field_bit_size = 9,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "valid",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+               .field_opr1 = {
+               1}
                }
        },
+       /* class_tid: 2, , table: profile_tcam_cache.f2_wr */
        {
        .field_info_mask = {
-               .description = "tl4.seq",
-               .field_bit_size = 32,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "recycle_cnt",
+               .field_bit_size = 2,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
                },
        .field_info_spec = {
-               .description = "tl4.seq",
-               .field_bit_size = 32,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "recycle_cnt",
+               .field_bit_size = 2,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "tl4.pa",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "prof_func_id",
+               .field_bit_size = 7,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
                },
        .field_info_spec = {
-               .description = "tl4.pa",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "prof_func_id",
+               .field_bit_size = 7,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF,
+               .field_opr1 = {
+               (BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,
+               BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID & 0xff}
                }
        },
        {
        .field_info_mask = {
-               .description = "tl4.opt",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "hdr_sig_id",
+               .field_bit_size = 5,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
                },
        .field_info_spec = {
-               .description = "tl4.opt",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "hdr_sig_id",
+               .field_bit_size = 5,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr1 = {
+               (BNXT_ULP_CF_IDX_HDR_SIG_ID >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_HDR_SIG_ID & 0xff}
                }
        },
+       /* class_tid: 2, , table: wm.l3_l4.ipv4 */
        {
        .field_info_mask = {
-               .description = "tl4.tcpts",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "wc_profile_id",
+               .field_bit_size = 8,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
                },
        .field_info_spec = {
-               .description = "tl4.tcpts",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "wc_profile_id",
+               .field_bit_size = 8,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF,
+               .field_opr1 = {
+               (BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_4 >> 8) & 0xff,
+               BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_4 & 0xff}
                }
        },
        {
        .field_info_mask = {
-               .description = "tl4.err",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "l2_cntxt_id",
+               .field_bit_size = 10,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff,
+                       0xff}
                },
        .field_info_spec = {
-               .description = "tl4.err",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "l2_cntxt_id",
+               .field_bit_size = 10,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+               .field_opr1 = {
+               (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff,
+               BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff}
                }
        },
        {
        .field_info_mask = {
-               .description = "tuntype",
+               .description = "parif",
                .field_bit_size = 4,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "tuntype",
+               .description = "parif",
                .field_bit_size = 4,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "tflags",
-               .field_bit_size = 3,
+               .description = "spif",
+               .field_bit_size = 2,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "tflags",
-               .field_bit_size = 3,
+               .description = "spif",
+               .field_bit_size = 2,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "tids",
-               .field_bit_size = 24,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
-               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
-               .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_T_VXLAN_VNI >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_T_VXLAN_VNI & 0xff},
-               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
-               .field_opr2 = {
-                       (BNXT_ULP_GLB_HF_ID_T_VXLAN_VNI >> 8) & 0xff,
-                       BNXT_ULP_GLB_HF_ID_T_VXLAN_VNI & 0xff},
-               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
-               },
-       .field_info_spec = {
-               .description = "tids",
-               .field_bit_size = 24,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
-               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
-               .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_T_VXLAN_VNI >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_T_VXLAN_VNI & 0xff},
-               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
-               .field_opr2 = {
-                       (BNXT_ULP_GLB_HF_ID_T_VXLAN_VNI >> 8) & 0xff,
-                       BNXT_ULP_GLB_HF_ID_T_VXLAN_VNI & 0xff},
-               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
-               }
-       },
-       {
-       .field_info_mask = {
-               .description = "tid",
-               .field_bit_size = 32,
+               .description = "svif",
+               .field_bit_size = 11,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "tid",
-               .field_bit_size = 32,
+               .description = "svif",
+               .field_bit_size = 11,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "tctxts",
-               .field_bit_size = 24,
+               .description = "lcos",
+               .field_bit_size = 3,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "tctxts",
-               .field_bit_size = 24,
+               .description = "lcos",
+               .field_bit_size = 3,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "tctxt",
-               .field_bit_size = 32,
+               .description = "meta",
+               .field_bit_size = 16,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "tctxt",
-               .field_bit_size = 32,
+               .description = "meta",
+               .field_bit_size = 16,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "tqos",
-               .field_bit_size = 3,
+               .description = "rcyc_cnt",
+               .field_bit_size = 2,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "tqos",
-               .field_bit_size = 3,
+               .description = "rcyc_cnt",
+               .field_bit_size = 2,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "terr",
-               .field_bit_size = 4,
+               .description = "loopback",
+               .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "terr",
-               .field_bit_size = 4,
+               .description = "loopback",
+               .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l2_l2type",
+               .description = "tl2_l2type",
                .field_bit_size = 2,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l2_l2type",
+               .description = "tl2_l2type",
                .field_bit_size = 2,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l2_dmac",
+               .description = "tl2_dmac",
                .field_bit_size = 48,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_HF,
-               .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_I_ETH_DMAC >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_I_ETH_DMAC & 0xff}
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l2_dmac",
+               .description = "tl2_dmac",
                .field_bit_size = 48,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_HF,
-               .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_I_ETH_DMAC >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_I_ETH_DMAC & 0xff}
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l2_smac",
+               .description = "tl2_smac",
                .field_bit_size = 48,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l2_smac",
+               .description = "tl2_smac",
                .field_bit_size = 48,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l2_dt",
+               .description = "tl2_dt",
                .field_bit_size = 2,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l2_dt",
+               .description = "tl2_dt",
                .field_bit_size = 2,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l2_sa",
+               .description = "tl2_sa",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l2_sa",
+               .description = "tl2_sa",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l2_nvt",
+               .description = "tl2_nvt",
                .field_bit_size = 2,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l2_nvt",
+               .description = "tl2_nvt",
                .field_bit_size = 2,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l2_ovp",
+               .description = "tl2_ovp",
                .field_bit_size = 3,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l2_ovp",
+               .description = "tl2_ovp",
                .field_bit_size = 3,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l2_ovd",
+               .description = "tl2_ovd",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l2_ovd",
+               .description = "tl2_ovd",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l2_ovv",
+               .description = "tl2_ovv",
                .field_bit_size = 12,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l2_ovv",
+               .description = "tl2_ovv",
                .field_bit_size = 12,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l2_ovt",
+               .description = "tl2_ovt",
                .field_bit_size = 3,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l2_ovt",
+               .description = "tl2_ovt",
                .field_bit_size = 3,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l2_ivp",
+               .description = "tl2_ivp",
                .field_bit_size = 3,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l2_ivp",
+               .description = "tl2_ivp",
                .field_bit_size = 3,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l2_ivd",
+               .description = "tl2_ivd",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l2_ivd",
+               .description = "tl2_ivd",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l2_ivv",
+               .description = "tl2_ivv",
                .field_bit_size = 12,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l2_ivv",
+               .description = "tl2_ivv",
                .field_bit_size = 12,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l2_ivt",
+               .description = "tl2_ivt",
                .field_bit_size = 3,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l2_ivt",
+               .description = "tl2_ivt",
                .field_bit_size = 3,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l2_etype",
+               .description = "tl2_etype",
                .field_bit_size = 16,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l2_etype",
+               .description = "tl2_etype",
                .field_bit_size = 16,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l3.l3type",
+               .description = "tl3.l3type",
                .field_bit_size = 4,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l3.l3type",
+               .description = "tl3.l3type",
                .field_bit_size = 4,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l3.sip.ipv4",
+               .description = "tl3.sip.ipv4",
                .field_bit_size = 32,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l3.sip.ipv4",
+               .description = "tl3.sip.ipv4",
                .field_bit_size = 32,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l3.sip.ipv6",
+               .description = "tl3.sip.ipv6",
                .field_bit_size = 128,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l3.sip.ipv6",
+               .description = "tl3.sip.ipv6",
                .field_bit_size = 128,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l3.sip_selcmp.ipv6",
+               .description = "tl3.sip_selcmp.ipv6",
                .field_bit_size = 72,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l3.sip_selcmp.ipv6",
+               .description = "tl3.sip_selcmp.ipv6",
                .field_bit_size = 72,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l3.dip.ipv4",
+               .description = "tl3.dip.ipv4",
                .field_bit_size = 32,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
-               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
-               .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_I_IPV4_DST_ADDR >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_I_IPV4_DST_ADDR & 0xff},
-               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
-               .field_opr2 = {
-                       (BNXT_ULP_GLB_HF_ID_I_IPV4_DST_ADDR >> 8) & 0xff,
-                       BNXT_ULP_GLB_HF_ID_I_IPV4_DST_ADDR & 0xff},
-               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l3.dip.ipv4",
+               .description = "tl3.dip.ipv4",
                .field_bit_size = 32,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
-               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
-               .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_I_IPV4_DST_ADDR >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_I_IPV4_DST_ADDR & 0xff},
-               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
-               .field_opr2 = {
-                       (BNXT_ULP_GLB_HF_ID_I_IPV4_DST_ADDR >> 8) & 0xff,
-                       BNXT_ULP_GLB_HF_ID_I_IPV4_DST_ADDR & 0xff},
-               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l3.dip.ipv6",
+               .description = "tl3.dip.ipv6",
                .field_bit_size = 128,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l3.dip.ipv6",
+               .description = "tl3.dip.ipv6",
                .field_bit_size = 128,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l3.dip_selcmp.ipv6",
+               .description = "tl3.dip_selcmp.ipv6",
                .field_bit_size = 72,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l3.dip_selcmp.ipv6",
+               .description = "tl3.dip_selcmp.ipv6",
                .field_bit_size = 72,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l3.ttl",
+               .description = "tl3.ttl",
                .field_bit_size = 8,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l3.ttl",
+               .description = "tl3.ttl",
                .field_bit_size = 8,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l3.prot",
+               .description = "tl3.prot",
                .field_bit_size = 8,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l3.prot",
+               .description = "tl3.prot",
                .field_bit_size = 8,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l3.fid.ipv4",
+               .description = "tl3.fid.ipv4",
                .field_bit_size = 16,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l3.fid.ipv4",
+               .description = "tl3.fid.ipv4",
                .field_bit_size = 16,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l3.fid.ipv6",
+               .description = "tl3.fid.ipv6",
                .field_bit_size = 20,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l3.fid.ipv6",
+               .description = "tl3.fid.ipv6",
                .field_bit_size = 20,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l3.qos",
+               .description = "tl3.qos",
                .field_bit_size = 8,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l3.qos",
+               .description = "tl3.qos",
                .field_bit_size = 8,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l3.ieh_nonext",
+               .description = "tl3.ieh_nonext",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l3.ieh_nonext",
+               .description = "tl3.ieh_nonext",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l3.ieh_esp",
+               .description = "tl3.ieh_esp",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l3.ieh_esp",
+               .description = "tl3.ieh_esp",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l3.ieh_auth",
+               .description = "tl3.ieh_auth",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l3.ieh_auth",
+               .description = "tl3.ieh_auth",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l3.ieh_dest",
+               .description = "tl3.ieh_dest",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l3.ieh_dest",
+               .description = "tl3.ieh_dest",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l3.ieh_frag",
+               .description = "tl3.ieh_frag",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l3.ieh_frag",
+               .description = "tl3.ieh_frag",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l3.ieh_rthdr",
+               .description = "tl3.ieh_rthdr",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l3.ieh_rthdr",
+               .description = "tl3.ieh_rthdr",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l3.ieh_hop",
+               .description = "tl3.ieh_hop",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l3.ieh_hop",
+               .description = "tl3.ieh_hop",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l3.ieh_1frag",
+               .description = "tl3.ieh_1frag",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l3.ieh_1frag",
+               .description = "tl3.ieh_1frag",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l3.df",
+               .description = "tl3.df",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l3.df",
+               .description = "tl3.df",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l3.l3err.ipv4",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               },
-       .field_info_spec = {
-               .description = "l3.l3err.ipv4",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               }
-       },
-       {
-       .field_info_mask = {
-               .description = "l3.l3err.ipv6",
+               .description = "tl3.l3err",
                .field_bit_size = 4,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l3.l3err.ipv6",
+               .description = "tl3.l3err",
                .field_bit_size = 4,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l4.l4type",
+               .description = "tl4.l4type",
                .field_bit_size = 4,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l4.l4type",
+               .description = "tl4.l4type",
                .field_bit_size = 4,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l4.src",
+               .description = "tl4.src",
                .field_bit_size = 16,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l4.src",
+               .description = "tl4.src",
                .field_bit_size = 16,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l4.dst",
+               .description = "tl4.dst",
                .field_bit_size = 16,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l4.dst",
+               .description = "tl4.dst",
                .field_bit_size = 16,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l4.flags",
+               .description = "tl4.flags",
                .field_bit_size = 9,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l4.flags",
+               .description = "tl4.flags",
                .field_bit_size = 9,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l4.seq",
+               .description = "tl4.seq",
                .field_bit_size = 32,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l4.seq",
+               .description = "tl4.seq",
                .field_bit_size = 32,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l4.ack",
-               .field_bit_size = 32,
+               .description = "tl4.pa",
+               .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l4.ack",
-               .field_bit_size = 32,
+               .description = "tl4.pa",
+               .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l4.win",
-               .field_bit_size = 16,
+               .description = "tl4.opt",
+               .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l4.win",
-               .field_bit_size = 16,
+               .description = "tl4.opt",
+               .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l4.pa",
+               .description = "tl4.tcpts",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l4.pa",
+               .description = "tl4.tcpts",
                .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l4.opt",
-               .field_bit_size = 1,
+               .description = "tl4.err",
+               .field_bit_size = 4,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l4.opt",
-               .field_bit_size = 1,
+               .description = "tl4.err",
+               .field_bit_size = 4,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l4.tcpts",
-               .field_bit_size = 1,
+               .description = "tuntype",
+               .field_bit_size = 4,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l4.tcpts",
-               .field_bit_size = 1,
+               .description = "tuntype",
+               .field_bit_size = 4,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l4.tsval",
-               .field_bit_size = 32,
+               .description = "tflags",
+               .field_bit_size = 3,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l4.tsval",
-               .field_bit_size = 32,
+               .description = "tflags",
+               .field_bit_size = 3,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l4.txecr",
-               .field_bit_size = 32,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "tids",
+               .field_bit_size = 24,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+               .field_opr1 = {
+               (BNXT_ULP_GLB_HF_ID_T_VXLAN_VNI >> 8) & 0xff,
+               BNXT_ULP_GLB_HF_ID_T_VXLAN_VNI & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+               .field_opr2 = {
+                       (BNXT_ULP_GLB_HF_ID_T_VXLAN_VNI >> 8) & 0xff,
+                       BNXT_ULP_GLB_HF_ID_T_VXLAN_VNI & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "l4.txecr",
-               .field_bit_size = 32,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .description = "tids",
+               .field_bit_size = 24,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+               .field_opr1 = {
+               (BNXT_ULP_GLB_HF_ID_T_VXLAN_VNI >> 8) & 0xff,
+               BNXT_ULP_GLB_HF_ID_T_VXLAN_VNI & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+               .field_opr2 = {
+                       (BNXT_ULP_GLB_HF_ID_T_VXLAN_VNI >> 8) & 0xff,
+                       BNXT_ULP_GLB_HF_ID_T_VXLAN_VNI & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "l4.err",
-               .field_bit_size = 4,
+               .description = "tid",
+               .field_bit_size = 32,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l4.err",
-               .field_bit_size = 4,
+               .description = "tid",
+               .field_bit_size = 32,
                .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
-       /* class_tid: 3, , table: l2_cntxt_tcam_cache.rd */
        {
        .field_info_mask = {
-               .description = "svif",
-               .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_HF,
-               .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_SVIF_INDEX >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_SVIF_INDEX & 0xff}
+               .description = "tctxts",
+               .field_bit_size = 24,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "svif",
-               .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_HF,
-               .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_SVIF_INDEX >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_SVIF_INDEX & 0xff}
+               .description = "tctxts",
+               .field_bit_size = 24,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
-       /* class_tid: 3, , table: mac_addr_cache.rd */
        {
        .field_info_mask = {
-               .description = "svif",
-               .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_HF,
-               .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_SVIF_INDEX >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_SVIF_INDEX & 0xff}
+               .description = "tctxt",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "svif",
-               .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_HF,
-               .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_SVIF_INDEX >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_SVIF_INDEX & 0xff}
+               .description = "tctxt",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "tun_hdr",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-               .field_opr1 = {
-               ULP_THOR_SYM_TUN_HDR_TYPE_NONE}
+               .description = "tqos",
+               .field_bit_size = 3,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "tun_hdr",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-               .field_opr1 = {
-               ULP_THOR_SYM_TUN_HDR_TYPE_NONE}
+               .description = "tqos",
+               .field_bit_size = 3,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "one_tag",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "terr",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "one_tag",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "terr",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "vid",
-               .field_bit_size = 12,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l2_l2type",
+               .field_bit_size = 2,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "vid",
-               .field_bit_size = 12,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l2_l2type",
+               .field_bit_size = 2,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "mac_addr",
+               .description = "l2_dmac",
                .field_bit_size = 48,
                .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
                .field_src1 = BNXT_ULP_FIELD_SRC_HF,
                .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff}
+               (BNXT_ULP_GLB_HF_ID_I_ETH_DMAC >> 8) & 0xff,
+               BNXT_ULP_GLB_HF_ID_I_ETH_DMAC & 0xff}
                },
        .field_info_spec = {
-               .description = "mac_addr",
+               .description = "l2_dmac",
                .field_bit_size = 48,
                .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
                .field_src1 = BNXT_ULP_FIELD_SRC_HF,
                .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff}
+               (BNXT_ULP_GLB_HF_ID_I_ETH_DMAC >> 8) & 0xff,
+               BNXT_ULP_GLB_HF_ID_I_ETH_DMAC & 0xff}
                }
        },
-       /* class_tid: 3, , table: port_table.egr.rd */
        {
        .field_info_mask = {
-               .description = "dev.port_id",
-               .field_bit_size = 10,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .description = "l2_smac",
+               .field_bit_size = 48,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
                .field_opr1 = {
-                       0xff,
-                       0xff}
+               (BNXT_ULP_GLB_HF_ID_I_ETH_SMAC >> 8) & 0xff,
+               BNXT_ULP_GLB_HF_ID_I_ETH_SMAC & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+               .field_opr2 = {
+                       (BNXT_ULP_GLB_HF_ID_I_ETH_SMAC >> 8) & 0xff,
+                       BNXT_ULP_GLB_HF_ID_I_ETH_SMAC & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "dev.port_id",
-               .field_bit_size = 10,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+               .description = "l2_smac",
+               .field_bit_size = 48,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
                .field_opr1 = {
-               (BNXT_ULP_CF_IDX_DEV_PORT_ID >> 8) & 0xff,
-               BNXT_ULP_CF_IDX_DEV_PORT_ID & 0xff}
+               (BNXT_ULP_GLB_HF_ID_I_ETH_SMAC >> 8) & 0xff,
+               BNXT_ULP_GLB_HF_ID_I_ETH_SMAC & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+               .field_opr2 = {
+                       (BNXT_ULP_GLB_HF_ID_I_ETH_SMAC >> 8) & 0xff,
+                       BNXT_ULP_GLB_HF_ID_I_ETH_SMAC & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
-       /* class_tid: 3, , table: l2_cntxt_tcam.0 */
        {
        .field_info_mask = {
-               .description = "etype",
-               .field_bit_size = 16,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l2_dt",
+               .field_bit_size = 2,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "etype",
-               .field_bit_size = 16,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l2_dt",
+               .field_bit_size = 2,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l2_ivlan_tpid_sel",
-               .field_bit_size = 3,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l2_sa",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l2_ivlan_tpid_sel",
-               .field_bit_size = 3,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l2_sa",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l2_ivlan_vid",
-               .field_bit_size = 12,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l2_nvt",
+               .field_bit_size = 2,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l2_ivlan_vid",
-               .field_bit_size = 12,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l2_nvt",
+               .field_bit_size = 2,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l2_ovlan_tpid_sel",
+               .description = "l2_ovp",
                .field_bit_size = 3,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l2_ovlan_tpid_sel",
+               .description = "l2_ovp",
                .field_bit_size = 3,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l2_ovlan_vid",
-               .field_bit_size = 12,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l2_ovd",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l2_ovlan_vid",
-               .field_bit_size = 12,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l2_ovd",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "two_vtags",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l2_ovv",
+               .field_bit_size = 12,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "two_vtags",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l2_ovv",
+               .field_bit_size = 12,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "vtag_present",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l2_ovt",
+               .field_bit_size = 3,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "vtag_present",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l2_ovt",
+               .field_bit_size = 3,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "mac1_addr",
-               .field_bit_size = 48,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l2_ivp",
+               .field_bit_size = 3,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "mac1_addr",
-               .field_bit_size = 48,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l2_ivp",
+               .field_bit_size = 3,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "mac0_addr",
-               .field_bit_size = 48,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_HF,
-               .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff}
+               .description = "l2_ivd",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "mac0_addr",
-               .field_bit_size = 48,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_HF,
-               .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff}
+               .description = "l2_ivd",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "tunnel_id",
-               .field_bit_size = 24,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l2_ivv",
+               .field_bit_size = 12,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "tunnel_id",
-               .field_bit_size = 24,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l2_ivv",
+               .field_bit_size = 12,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "tun_hdr_type",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-               .field_opr1 = {
-               ULP_THOR_SYM_TUN_HDR_TYPE_NONE}
+               .description = "l2_ivt",
+               .field_bit_size = 3,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "tun_hdr_type",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-               .field_opr1 = {
-               ULP_THOR_SYM_TUN_HDR_TYPE_NONE}
+               .description = "l2_ivt",
+               .field_bit_size = 3,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "llc",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l2_etype",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "llc",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l2_etype",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "roce",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l3.l3type",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "roce",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               }
-       },
-       {
-       .field_info_mask = {
-               .description = "metadata",
-               .field_bit_size = 16,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               },
-       .field_info_spec = {
-               .description = "metadata",
-               .field_bit_size = 16,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l3.l3type",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "svif",
-               .field_bit_size = 11,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_HF,
+               .description = "l3.sip.ipv4",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
                .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_SVIF_INDEX >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_SVIF_INDEX & 0xff}
+               (BNXT_ULP_GLB_HF_ID_I_IPV4_SRC_ADDR >> 8) & 0xff,
+               BNXT_ULP_GLB_HF_ID_I_IPV4_SRC_ADDR & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+               .field_opr2 = {
+                       (BNXT_ULP_GLB_HF_ID_I_IPV4_SRC_ADDR >> 8) & 0xff,
+                       BNXT_ULP_GLB_HF_ID_I_IPV4_SRC_ADDR & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "svif",
-               .field_bit_size = 11,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_HF,
+               .description = "l3.sip.ipv4",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
                .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_SVIF_INDEX >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_SVIF_INDEX & 0xff}
-               }
-       },
-       {
-       .field_info_mask = {
-               .description = "parif",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               },
-       .field_info_spec = {
-               .description = "parif",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               (BNXT_ULP_GLB_HF_ID_I_IPV4_SRC_ADDR >> 8) & 0xff,
+               BNXT_ULP_GLB_HF_ID_I_IPV4_SRC_ADDR & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+               .field_opr2 = {
+                       (BNXT_ULP_GLB_HF_ID_I_IPV4_SRC_ADDR >> 8) & 0xff,
+                       BNXT_ULP_GLB_HF_ID_I_IPV4_SRC_ADDR & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "spif",
-               .field_bit_size = 2,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l3.sip.ipv6",
+               .field_bit_size = 128,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "spif",
-               .field_bit_size = 2,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l3.sip.ipv6",
+               .field_bit_size = 128,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "loopback",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l3.sip_selcmp.ipv6",
+               .field_bit_size = 72,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "loopback",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l3.sip_selcmp.ipv6",
+               .field_bit_size = 72,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "recycle_cnt",
-               .field_bit_size = 2,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l3.dip.ipv4",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+               .field_opr1 = {
+               (BNXT_ULP_GLB_HF_ID_I_IPV4_DST_ADDR >> 8) & 0xff,
+               BNXT_ULP_GLB_HF_ID_I_IPV4_DST_ADDR & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+               .field_opr2 = {
+                       (BNXT_ULP_GLB_HF_ID_I_IPV4_DST_ADDR >> 8) & 0xff,
+                       BNXT_ULP_GLB_HF_ID_I_IPV4_DST_ADDR & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "recycle_cnt",
-               .field_bit_size = 2,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l3.dip.ipv4",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+               .field_opr1 = {
+               (BNXT_ULP_GLB_HF_ID_I_IPV4_DST_ADDR >> 8) & 0xff,
+               BNXT_ULP_GLB_HF_ID_I_IPV4_DST_ADDR & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+               .field_opr2 = {
+                       (BNXT_ULP_GLB_HF_ID_I_IPV4_DST_ADDR >> 8) & 0xff,
+                       BNXT_ULP_GLB_HF_ID_I_IPV4_DST_ADDR & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "mpass_cnt",
-               .field_bit_size = 2,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l3.dip.ipv6",
+               .field_bit_size = 128,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "mpass_cnt",
-               .field_bit_size = 2,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l3.dip.ipv6",
+               .field_bit_size = 128,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "valid",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-               .field_opr1 = {
-               1}
+               .description = "l3.dip_selcmp.ipv6",
+               .field_bit_size = 72,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "valid",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-               .field_opr1 = {
-               1}
+               .description = "l3.dip_selcmp.ipv6",
+               .field_bit_size = 72,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
-       /* class_tid: 3, , table: mac_addr_cache.wr */
        {
        .field_info_mask = {
-               .description = "svif",
+               .description = "l3.ttl",
                .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_HF,
-               .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_SVIF_INDEX >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_SVIF_INDEX & 0xff}
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "svif",
+               .description = "l3.ttl",
                .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_HF,
-               .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_SVIF_INDEX >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_SVIF_INDEX & 0xff}
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "tun_hdr",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+               .description = "l3.prot",
+               .field_bit_size = 8,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
                .field_opr1 = {
-               ULP_THOR_SYM_TUN_HDR_TYPE_NONE}
+               (BNXT_ULP_CF_IDX_I_L3_FB_PROTO_ID >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_I_L3_FB_PROTO_ID & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "tun_hdr",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+               .description = "l3.prot",
+               .field_bit_size = 8,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
                .field_opr1 = {
-               ULP_THOR_SYM_TUN_HDR_TYPE_NONE}
+               (BNXT_ULP_CF_IDX_I_L3_FB_PROTO_ID >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_I_L3_FB_PROTO_ID & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr2 = {
+                       (BNXT_ULP_CF_IDX_I_L3_PROTO_ID >> 8) & 0xff,
+                       BNXT_ULP_CF_IDX_I_L3_PROTO_ID & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "one_tag",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l3.fid.ipv4",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "one_tag",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l3.fid.ipv4",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "vid",
-               .field_bit_size = 12,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l3.fid.ipv6",
+               .field_bit_size = 20,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "vid",
-               .field_bit_size = 12,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l3.fid.ipv6",
+               .field_bit_size = 20,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "mac_addr",
-               .field_bit_size = 48,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_HF,
-               .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff}
+               .description = "l3.qos",
+               .field_bit_size = 8,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "mac_addr",
-               .field_bit_size = 48,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_HF,
-               .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff}
+               .description = "l3.qos",
+               .field_bit_size = 8,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
-       /* class_tid: 3, , table: profile_tcam_cache.ipv6_rd */
        {
        .field_info_mask = {
-               .description = "recycle_cnt",
-               .field_bit_size = 2,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l3.ieh_nonext",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "recycle_cnt",
-               .field_bit_size = 2,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l3.ieh_nonext",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "prof_func_id",
-               .field_bit_size = 7,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
-               .field_opr1 = {
-                       0xff}
+               .description = "l3.ieh_esp",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "prof_func_id",
-               .field_bit_size = 7,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
-               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
-               .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff},
-               .field_src2 = BNXT_ULP_FIELD_SRC_GLB_RF,
-               .field_opr2 = {
-                       (BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID >> 8) & 0xff,
-                       BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID & 0xff},
-               .field_src3 = BNXT_ULP_FIELD_SRC_GLB_RF,
-               .field_opr3 = {
-               (BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID >> 8) & 0xff,
-               BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID & 0xff}
+               .description = "l3.ieh_esp",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "hdr_sig_id",
-               .field_bit_size = 5,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
-               .field_opr1 = {
-                       0xff}
+               .description = "l3.ieh_auth",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "hdr_sig_id",
-               .field_bit_size = 5,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
-               .field_opr1 = {
-               (BNXT_ULP_CF_IDX_HDR_SIG_ID >> 8) & 0xff,
-               BNXT_ULP_CF_IDX_HDR_SIG_ID & 0xff}
+               .description = "l3.ieh_auth",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
-       /* class_tid: 3, , table: profile_tcam.l2_l3_l4_v6_em */
        {
        .field_info_mask = {
-               .description = "l4_hdr_is_udp_tcp",
+               .description = "l3.ieh_dest",
                .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l4_hdr_is_udp_tcp",
+               .description = "l3.ieh_dest",
                .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l4_hdr_type",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
-               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
-               .field_opr1 = {
-               (BNXT_ULP_CF_IDX_O_L4 >> 8) & 0xff,
-               BNXT_ULP_CF_IDX_O_L4 & 0xff},
-               .field_src2 = BNXT_ULP_FIELD_SRC_ONES,
-               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l3.ieh_frag",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l4_hdr_type",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
-               .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT,
-               .field_opr1 = {
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff,
-               (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff},
-               .field_src2 = BNXT_ULP_FIELD_SRC_CONST,
-               .field_opr2 = {
-                       ULP_THOR_SYM_L4_HDR_TYPE_TCP},
-               .field_src3 = BNXT_ULP_FIELD_SRC_CONST,
-               .field_opr3 = {
-               ULP_THOR_SYM_L4_HDR_TYPE_UDP}
+               .description = "l3.ieh_frag",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l4_hdr_error",
+               .description = "l3.ieh_rthdr",
                .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
-               .field_opr1 = {
-               (BNXT_ULP_CF_IDX_O_L4 >> 8) & 0xff,
-               BNXT_ULP_CF_IDX_O_L4 & 0xff}
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l4_hdr_error",
+               .description = "l3.ieh_rthdr",
                .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l4_hdr_valid",
+               .description = "l3.ieh_hop",
                .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
-               .field_opr1 = {
-               (BNXT_ULP_CF_IDX_O_L4 >> 8) & 0xff,
-               BNXT_ULP_CF_IDX_O_L4 & 0xff}
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l4_hdr_valid",
+               .description = "l3.ieh_hop",
                .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
-               .field_opr1 = {
-               (BNXT_ULP_CF_IDX_O_L4 >> 8) & 0xff,
-               BNXT_ULP_CF_IDX_O_L4 & 0xff}
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "ieh",
-               .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l3.ieh_1frag",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "ieh",
-               .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l3.ieh_1frag",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l3_ipv6_cmp_dst",
+               .description = "l3.df",
                .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l3_ipv6_cmp_dst",
+               .description = "l3.df",
                .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l3_ipv6_cmp_src",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l3.l3err.ipv4",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l3_ipv6_cmp_src",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l3.l3err.ipv4",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l3_hdr_isIP",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l3.l3err.ipv6",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l3_hdr_isIP",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l3.l3err.ipv6",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l3_hdr_type",
+               .description = "l4.l4type",
                .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
-               .field_opr1 = {
-                       0xff}
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l3_hdr_type",
+               .description = "l4.l4type",
                .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-               .field_opr1 = {
-               ULP_THOR_SYM_L3_HDR_TYPE_IPV6}
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l3_hdr_error",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .description = "l4.src",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
                .field_opr1 = {
-                       0xff}
+               (BNXT_ULP_CF_IDX_I_L4_FB_SRC_PORT >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_I_L4_FB_SRC_PORT & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr2 = {
+                       (BNXT_ULP_CF_IDX_I_L4_SRC_PORT_MASK >> 8) & 0xff,
+                       BNXT_ULP_CF_IDX_I_L4_SRC_PORT_MASK & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "l3_hdr_error",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l4.src",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr1 = {
+               (BNXT_ULP_CF_IDX_I_L4_FB_SRC_PORT >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_I_L4_FB_SRC_PORT & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr2 = {
+                       (BNXT_ULP_CF_IDX_I_L4_SRC_PORT >> 8) & 0xff,
+                       BNXT_ULP_CF_IDX_I_L4_SRC_PORT & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "l3_hdr_valid",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .description = "l4.dst",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
                .field_opr1 = {
-                       0xff}
+               (BNXT_ULP_CF_IDX_I_L4_FB_DST_PORT >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_I_L4_FB_DST_PORT & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr2 = {
+                       (BNXT_ULP_CF_IDX_I_L4_DST_PORT_MASK >> 8) & 0xff,
+                       BNXT_ULP_CF_IDX_I_L4_DST_PORT_MASK & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
-               .description = "l3_hdr_valid",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+               .description = "l4.dst",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
                .field_opr1 = {
-               ULP_THOR_SYM_L3_HDR_VALID_YES}
+               (BNXT_ULP_CF_IDX_I_L4_FB_DST_PORT >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_I_L4_FB_DST_PORT & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr2 = {
+                       (BNXT_ULP_CF_IDX_I_L4_DST_PORT >> 8) & 0xff,
+                       BNXT_ULP_CF_IDX_I_L4_DST_PORT & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
        .field_info_mask = {
-               .description = "l2_two_vtags",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l4.flags",
+               .field_bit_size = 9,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l2_two_vtags",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               .description = "l4.flags",
+               .field_bit_size = 9,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                }
        },
        {
        .field_info_mask = {
-               .description = "l2_vtag_present",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
-               .field_opr1 = {
-                       0xff}
+               .description = "l4.seq",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
                },
        .field_info_spec = {
-               .description = "l2_vtag_present",
-               .field_bit_size = 1,
+               .description = "l4.seq",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l4.ack",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l4.ack",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l4.win",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l4.win",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l4.pa",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l4.pa",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l4.opt",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l4.opt",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l4.tcpts",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l4.tcpts",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l4.tsval",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l4.tsval",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l4.txecr",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l4.txecr",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l4.err",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l4.err",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       /* class_tid: 3, , table: l2_cntxt_tcam_cache.rd */
+       {
+       .field_info_mask = {
+               .description = "svif",
+               .field_bit_size = 8,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_HF,
+               .field_opr1 = {
+               (BNXT_ULP_GLB_HF_ID_SVIF_INDEX >> 8) & 0xff,
+               BNXT_ULP_GLB_HF_ID_SVIF_INDEX & 0xff}
+               },
+       .field_info_spec = {
+               .description = "svif",
+               .field_bit_size = 8,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_HF,
+               .field_opr1 = {
+               (BNXT_ULP_GLB_HF_ID_SVIF_INDEX >> 8) & 0xff,
+               BNXT_ULP_GLB_HF_ID_SVIF_INDEX & 0xff}
+               }
+       },
+       /* class_tid: 3, , table: profile_tcam_cache.ipv6_rd */
+       {
+       .field_info_mask = {
+               .description = "recycle_cnt",
+               .field_bit_size = 2,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               },
+       .field_info_spec = {
+               .description = "recycle_cnt",
+               .field_bit_size = 2,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "prof_func_id",
+               .field_bit_size = 7,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
+               },
+       .field_info_spec = {
+               .description = "prof_func_id",
+               .field_bit_size = 7,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF,
+               .field_opr1 = {
+               (BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID >> 8) & 0xff,
+               BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID & 0xff}
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "hdr_sig_id",
+               .field_bit_size = 5,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
+               },
+       .field_info_spec = {
+               .description = "hdr_sig_id",
+               .field_bit_size = 5,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr1 = {
+               (BNXT_ULP_CF_IDX_HDR_SIG_ID >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_HDR_SIG_ID & 0xff}
+               }
+       },
+       /* class_tid: 3, , table: profile_tcam.l2_l3_l4_v6_em */
+       {
+       .field_info_mask = {
+               .description = "l4_hdr_is_udp_tcp",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               },
+       .field_info_spec = {
+               .description = "l4_hdr_is_udp_tcp",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l4_hdr_type",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr1 = {
+               (BNXT_ULP_CF_IDX_O_L4 >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_O_L4 & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
+               },
+       .field_info_spec = {
+               .description = "l4_hdr_type",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT,
+               .field_opr1 = {
+               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff,
+               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff,
+               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff,
+               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff,
+               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff,
+               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff,
+               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff,
+               (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_CONST,
+               .field_opr2 = {
+                       ULP_THOR_SYM_L4_HDR_TYPE_TCP},
+               .field_src3 = BNXT_ULP_FIELD_SRC_CONST,
+               .field_opr3 = {
+               ULP_THOR_SYM_L4_HDR_TYPE_UDP}
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l4_hdr_error",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr1 = {
+               (BNXT_ULP_CF_IDX_O_L4 >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_O_L4 & 0xff}
+               },
+       .field_info_spec = {
+               .description = "l4_hdr_error",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l4_hdr_valid",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr1 = {
+               (BNXT_ULP_CF_IDX_O_L4 >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_O_L4 & 0xff}
+               },
+       .field_info_spec = {
+               .description = "l4_hdr_valid",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr1 = {
+               (BNXT_ULP_CF_IDX_O_L4 >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_O_L4 & 0xff}
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "ieh",
+               .field_bit_size = 8,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               },
+       .field_info_spec = {
+               .description = "ieh",
+               .field_bit_size = 8,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l3_ipv6_cmp_dst",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               },
+       .field_info_spec = {
+               .description = "l3_ipv6_cmp_dst",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l3_ipv6_cmp_src",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               },
+       .field_info_spec = {
+               .description = "l3_ipv6_cmp_src",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l3_hdr_isIP",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               },
+       .field_info_spec = {
+               .description = "l3_hdr_isIP",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l3_hdr_type",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
+               },
+       .field_info_spec = {
+               .description = "l3_hdr_type",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+               .field_opr1 = {
+               ULP_THOR_SYM_L3_HDR_TYPE_IPV6}
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l3_hdr_error",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
+               },
+       .field_info_spec = {
+               .description = "l3_hdr_error",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l3_hdr_valid",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
+               },
+       .field_info_spec = {
+               .description = "l3_hdr_valid",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+               .field_opr1 = {
+               ULP_THOR_SYM_L3_HDR_VALID_YES}
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l2_two_vtags",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               },
+       .field_info_spec = {
+               .description = "l2_two_vtags",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l2_vtag_present",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
+               },
+       .field_info_spec = {
+               .description = "l2_vtag_present",
+               .field_bit_size = 1,
                .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
                .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT,
                .field_opr1 = {
@@ -23114,17 +23608,9 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
        .field_info_spec = {
                .description = "prof_func_id",
                .field_bit_size = 7,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
-               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF,
                .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff},
-               .field_src2 = BNXT_ULP_FIELD_SRC_GLB_RF,
-               .field_opr2 = {
-                       (BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID >> 8) & 0xff,
-                       BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID & 0xff},
-               .field_src3 = BNXT_ULP_FIELD_SRC_GLB_RF,
-               .field_opr3 = {
                (BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID >> 8) & 0xff,
                BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID & 0xff}
                }
@@ -23230,17 +23716,9 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
        .field_info_spec = {
                .description = "prof_func_id",
                .field_bit_size = 7,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
-               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF,
                .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff},
-               .field_src2 = BNXT_ULP_FIELD_SRC_GLB_RF,
-               .field_opr2 = {
-                       (BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID >> 8) & 0xff,
-                       BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID & 0xff},
-               .field_src3 = BNXT_ULP_FIELD_SRC_GLB_RF,
-               .field_opr3 = {
                (BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID >> 8) & 0xff,
                BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID & 0xff}
                }
@@ -24082,12 +24560,30 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
        .field_info_mask = {
                .description = "l2_smac",
                .field_bit_size = 48,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+               .field_opr1 = {
+               (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
+               BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+               .field_opr2 = {
+                       (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
+                       BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
                },
        .field_info_spec = {
                .description = "l2_smac",
                .field_bit_size = 48,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+               .field_opr1 = {
+               (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
+               BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+               .field_opr2 = {
+                       (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
+                       BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
                }
        },
        {
@@ -24388,12 +24884,24 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
        .field_info_mask = {
                .description = "l3.prot",
                .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
                },
        .field_info_spec = {
                .description = "l3.prot",
                .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr1 = {
+               (BNXT_ULP_CF_IDX_O_L3_FB_PROTO_ID >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_O_L3_FB_PROTO_ID & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr2 = {
+                       (BNXT_ULP_CF_IDX_O_L3_PROTO_ID >> 8) & 0xff,
+                       BNXT_ULP_CF_IDX_O_L3_PROTO_ID & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
                }
        },
        {
@@ -24773,17 +25281,9 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
        .field_info_spec = {
                .description = "prof_func_id",
                .field_bit_size = 7,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
-               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF,
                .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff},
-               .field_src2 = BNXT_ULP_FIELD_SRC_GLB_RF,
-               .field_opr2 = {
-                       (BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID >> 8) & 0xff,
-                       BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID & 0xff},
-               .field_src3 = BNXT_ULP_FIELD_SRC_GLB_RF,
-               .field_opr3 = {
                (BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID >> 8) & 0xff,
                BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID & 0xff}
                }
@@ -25425,17 +25925,9 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
        .field_info_spec = {
                .description = "prof_func_id",
                .field_bit_size = 7,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
-               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF,
                .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff},
-               .field_src2 = BNXT_ULP_FIELD_SRC_GLB_RF,
-               .field_opr2 = {
-                       (BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID >> 8) & 0xff,
-                       BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID & 0xff},
-               .field_src3 = BNXT_ULP_FIELD_SRC_GLB_RF,
-               .field_opr3 = {
                (BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID >> 8) & 0xff,
                BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID & 0xff}
                }
@@ -26095,17 +26587,9 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
        .field_info_spec = {
                .description = "prof_func_id",
                .field_bit_size = 7,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
-               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF,
                .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff},
-               .field_src2 = BNXT_ULP_FIELD_SRC_GLB_RF,
-               .field_opr2 = {
-                       (BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID >> 8) & 0xff,
-                       BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID & 0xff},
-               .field_src3 = BNXT_ULP_FIELD_SRC_GLB_RF,
-               .field_opr3 = {
                (BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID >> 8) & 0xff,
                BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID & 0xff}
                }
@@ -26211,17 +26695,9 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
        .field_info_spec = {
                .description = "prof_func_id",
                .field_bit_size = 7,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
-               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF,
                .field_opr1 = {
-               (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff},
-               .field_src2 = BNXT_ULP_FIELD_SRC_GLB_RF,
-               .field_opr2 = {
-                       (BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID >> 8) & 0xff,
-                       BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID & 0xff},
-               .field_src3 = BNXT_ULP_FIELD_SRC_GLB_RF,
-               .field_opr3 = {
                (BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID >> 8) & 0xff,
                BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID & 0xff}
                }
@@ -27063,12 +27539,30 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
        .field_info_mask = {
                .description = "l2_smac",
                .field_bit_size = 48,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+               .field_opr1 = {
+               (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
+               BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+               .field_opr2 = {
+                       (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
+                       BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
                .description = "l2_smac",
                .field_bit_size = 48,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+               .field_opr1 = {
+               (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
+               BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+               .field_opr2 = {
+                       (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
+                       BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
@@ -27349,12 +27843,27 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
        .field_info_mask = {
                .description = "l3.prot",
                .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr1 = {
+               (BNXT_ULP_CF_IDX_O_L3_FB_PROTO_ID >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_O_L3_FB_PROTO_ID & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
                .description = "l3.prot",
                .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr1 = {
+               (BNXT_ULP_CF_IDX_O_L3_FB_PROTO_ID >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_O_L3_FB_PROTO_ID & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr2 = {
+                       (BNXT_ULP_CF_IDX_O_L3_PROTO_ID >> 8) & 0xff,
+                       BNXT_ULP_CF_IDX_O_L3_PROTO_ID & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
@@ -27542,47 +28051,29 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
                .description = "l4.src",
                .field_bit_size = 16,
                .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
-               .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
                .field_opr1 = {
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff,
-               (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff},
-               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+               (BNXT_ULP_CF_IDX_O_L4_FB_SRC_PORT >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_O_L4_FB_SRC_PORT & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_CF,
                .field_opr2 = {
-                       (BNXT_ULP_GLB_HF_ID_O_TCP_SRC_PORT >> 8) & 0xff,
-                       BNXT_ULP_GLB_HF_ID_O_TCP_SRC_PORT & 0xff},
-               .field_src3 = BNXT_ULP_FIELD_SRC_HF,
-               .field_opr3 = {
-               (BNXT_ULP_GLB_HF_ID_O_UDP_SRC_PORT >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_O_UDP_SRC_PORT & 0xff}
+                       (BNXT_ULP_CF_IDX_O_L4_SRC_PORT_MASK >> 8) & 0xff,
+                       BNXT_ULP_CF_IDX_O_L4_SRC_PORT_MASK & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
                .description = "l4.src",
                .field_bit_size = 16,
                .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
-               .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
                .field_opr1 = {
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff,
-               (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff},
-               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+               (BNXT_ULP_CF_IDX_O_L4_FB_SRC_PORT >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_O_L4_FB_SRC_PORT & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_CF,
                .field_opr2 = {
-                       (BNXT_ULP_GLB_HF_ID_O_TCP_SRC_PORT >> 8) & 0xff,
-                       BNXT_ULP_GLB_HF_ID_O_TCP_SRC_PORT & 0xff},
-               .field_src3 = BNXT_ULP_FIELD_SRC_HF,
-               .field_opr3 = {
-               (BNXT_ULP_GLB_HF_ID_O_UDP_SRC_PORT >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_O_UDP_SRC_PORT & 0xff}
+                       (BNXT_ULP_CF_IDX_O_L4_SRC_PORT >> 8) & 0xff,
+                       BNXT_ULP_CF_IDX_O_L4_SRC_PORT & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
@@ -27590,47 +28081,29 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
                .description = "l4.dst",
                .field_bit_size = 16,
                .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
-               .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
                .field_opr1 = {
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff,
-               (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff},
-               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+               (BNXT_ULP_CF_IDX_O_L4_FB_DST_PORT >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_O_L4_FB_DST_PORT & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_CF,
                .field_opr2 = {
-                       (BNXT_ULP_GLB_HF_ID_O_TCP_DST_PORT >> 8) & 0xff,
-                       BNXT_ULP_GLB_HF_ID_O_TCP_DST_PORT & 0xff},
-               .field_src3 = BNXT_ULP_FIELD_SRC_HF,
-               .field_opr3 = {
-               (BNXT_ULP_GLB_HF_ID_O_UDP_DST_PORT >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_O_UDP_DST_PORT & 0xff}
+                       (BNXT_ULP_CF_IDX_O_L4_DST_PORT_MASK >> 8) & 0xff,
+                       BNXT_ULP_CF_IDX_O_L4_DST_PORT_MASK & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
                .description = "l4.dst",
                .field_bit_size = 16,
                .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
-               .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
                .field_opr1 = {
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff,
-               ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff,
-               (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff},
-               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+               (BNXT_ULP_CF_IDX_O_L4_FB_DST_PORT >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_O_L4_FB_DST_PORT & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_CF,
                .field_opr2 = {
-                       (BNXT_ULP_GLB_HF_ID_O_TCP_DST_PORT >> 8) & 0xff,
-                       BNXT_ULP_GLB_HF_ID_O_TCP_DST_PORT & 0xff},
-               .field_src3 = BNXT_ULP_FIELD_SRC_HF,
-               .field_opr3 = {
-               (BNXT_ULP_GLB_HF_ID_O_UDP_DST_PORT >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_O_UDP_DST_PORT & 0xff}
+                       (BNXT_ULP_CF_IDX_O_L4_DST_PORT >> 8) & 0xff,
+                       BNXT_ULP_CF_IDX_O_L4_DST_PORT & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
@@ -28571,12 +29044,30 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
        .field_info_mask = {
                .description = "l2_smac",
                .field_bit_size = 48,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+               .field_opr1 = {
+               (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
+               BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+               .field_opr2 = {
+                       (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
+                       BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
                .description = "l2_smac",
                .field_bit_size = 48,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+               .field_opr1 = {
+               (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
+               BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+               .field_opr2 = {
+                       (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
+                       BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
@@ -28857,12 +29348,27 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
        .field_info_mask = {
                .description = "l3.prot",
                .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr1 = {
+               (BNXT_ULP_CF_IDX_O_L3_FB_PROTO_ID >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_O_L3_FB_PROTO_ID & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
                .description = "l3.prot",
                .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr1 = {
+               (BNXT_ULP_CF_IDX_O_L3_FB_PROTO_ID >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_O_L3_FB_PROTO_ID & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr2 = {
+                       (BNXT_ULP_CF_IDX_O_L3_PROTO_ID >> 8) & 0xff,
+                       BNXT_ULP_CF_IDX_O_L3_PROTO_ID & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
@@ -30011,12 +30517,30 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
        .field_info_mask = {
                .description = "l2_smac",
                .field_bit_size = 48,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+               .field_opr1 = {
+               (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
+               BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+               .field_opr2 = {
+                       (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
+                       BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
                .description = "l2_smac",
                .field_bit_size = 48,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+               .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+               .field_opr1 = {
+               (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
+               BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff},
+               .field_src2 = BNXT_ULP_FIELD_SRC_HF,
+               .field_opr2 = {
+                       (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
+                       BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff},
+               .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
@@ -30285,12 +30809,14 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
        .field_info_mask = {
                .description = "l3.prot",
                .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                },
        .field_info_spec = {
                .description = "l3.prot",
                .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
                }
        },
        {
@@ -31393,227 +31919,11 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
                BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff}
                }
        },
-       /* class_tid: 5, , table: l2_cntxt_tcam_cache.vf_rd_egr */
-       {
-       .field_info_mask = {
-               .description = "svif",
-               .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
-               .field_opr1 = {
-                       0xff}
-               },
-       .field_info_spec = {
-               .description = "svif",
-               .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
-               .field_opr1 = {
-               (BNXT_ULP_CF_IDX_VF_FUNC_SVIF >> 8) & 0xff,
-               BNXT_ULP_CF_IDX_VF_FUNC_SVIF & 0xff}
-               }
-       },
-       /* class_tid: 5, , table: l2_cntxt_tcam.vf_egr */
-       {
-       .field_info_mask = {
-               .description = "etype",
-               .field_bit_size = 16,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               },
-       .field_info_spec = {
-               .description = "etype",
-               .field_bit_size = 16,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               }
-       },
-       {
-       .field_info_mask = {
-               .description = "l2_ivlan_tpid_sel",
-               .field_bit_size = 3,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               },
-       .field_info_spec = {
-               .description = "l2_ivlan_tpid_sel",
-               .field_bit_size = 3,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               }
-       },
-       {
-       .field_info_mask = {
-               .description = "l2_ivlan_vid",
-               .field_bit_size = 12,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               },
-       .field_info_spec = {
-               .description = "l2_ivlan_vid",
-               .field_bit_size = 12,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               }
-       },
-       {
-       .field_info_mask = {
-               .description = "l2_ovlan_tpid_sel",
-               .field_bit_size = 3,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               },
-       .field_info_spec = {
-               .description = "l2_ovlan_tpid_sel",
-               .field_bit_size = 3,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               }
-       },
-       {
-       .field_info_mask = {
-               .description = "l2_ovlan_vid",
-               .field_bit_size = 12,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               },
-       .field_info_spec = {
-               .description = "l2_ovlan_vid",
-               .field_bit_size = 12,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               }
-       },
+       /* class_tid: 5, , table: port_table.egr_wr */
        {
        .field_info_mask = {
-               .description = "two_vtags",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               },
-       .field_info_spec = {
-               .description = "two_vtags",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               }
-       },
-       {
-       .field_info_mask = {
-               .description = "vtag_present",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               },
-       .field_info_spec = {
-               .description = "vtag_present",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               }
-       },
-       {
-       .field_info_mask = {
-               .description = "mac1_addr",
-               .field_bit_size = 48,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               },
-       .field_info_spec = {
-               .description = "mac1_addr",
-               .field_bit_size = 48,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               }
-       },
-       {
-       .field_info_mask = {
-               .description = "mac0_addr",
-               .field_bit_size = 48,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               },
-       .field_info_spec = {
-               .description = "mac0_addr",
-               .field_bit_size = 48,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               }
-       },
-       {
-       .field_info_mask = {
-               .description = "tunnel_id",
-               .field_bit_size = 24,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               },
-       .field_info_spec = {
-               .description = "tunnel_id",
-               .field_bit_size = 24,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               }
-       },
-       {
-       .field_info_mask = {
-               .description = "tun_hdr_type",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               },
-       .field_info_spec = {
-               .description = "tun_hdr_type",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               }
-       },
-       {
-       .field_info_mask = {
-               .description = "llc",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               },
-       .field_info_spec = {
-               .description = "llc",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               }
-       },
-       {
-       .field_info_mask = {
-               .description = "roce",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               },
-       .field_info_spec = {
-               .description = "roce",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               }
-       },
-       {
-       .field_info_mask = {
-               .description = "metadata",
-               .field_bit_size = 16,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               },
-       .field_info_spec = {
-               .description = "metadata",
-               .field_bit_size = 16,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               }
-       },
-       {
-       .field_info_mask = {
-               .description = "svif",
-               .field_bit_size = 11,
+               .description = "dev.port_id",
+               .field_bit_size = 10,
                .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
                .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
                .field_opr1 = {
@@ -31621,104 +31931,16 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
                        0xff}
                },
        .field_info_spec = {
-               .description = "svif",
-               .field_bit_size = 11,
+               .description = "dev.port_id",
+               .field_bit_size = 10,
                .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
                .field_src1 = BNXT_ULP_FIELD_SRC_CF,
                .field_opr1 = {
-               (BNXT_ULP_CF_IDX_VF_FUNC_SVIF >> 8) & 0xff,
-               BNXT_ULP_CF_IDX_VF_FUNC_SVIF & 0xff}
-               }
-       },
-       {
-       .field_info_mask = {
-               .description = "parif",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               },
-       .field_info_spec = {
-               .description = "parif",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               }
-       },
-       {
-       .field_info_mask = {
-               .description = "spif",
-               .field_bit_size = 2,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               },
-       .field_info_spec = {
-               .description = "spif",
-               .field_bit_size = 2,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               }
-       },
-       {
-       .field_info_mask = {
-               .description = "loopback",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               },
-       .field_info_spec = {
-               .description = "loopback",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               }
-       },
-       {
-       .field_info_mask = {
-               .description = "recycle_cnt",
-               .field_bit_size = 2,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               },
-       .field_info_spec = {
-               .description = "recycle_cnt",
-               .field_bit_size = 2,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               }
-       },
-       {
-       .field_info_mask = {
-               .description = "mpass_cnt",
-               .field_bit_size = 2,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               },
-       .field_info_spec = {
-               .description = "mpass_cnt",
-               .field_bit_size = 2,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-               }
-       },
-       {
-       .field_info_mask = {
-               .description = "valid",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-               .field_opr1 = {
-               1}
-               },
-       .field_info_spec = {
-               .description = "valid",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-               .field_opr1 = {
-               1}
+               (BNXT_ULP_CF_IDX_DEV_PORT_ID >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_DEV_PORT_ID & 0xff}
                }
        },
-       /* class_tid: 5, , table: l2_cntxt_tcam_cache.vf_egr_wr */
+       /* class_tid: 5, , table: l2_cntxt_tcam_cache.vf_rd_egr */
        {
        .field_info_mask = {
                .description = "svif",
@@ -31738,67 +31960,392 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
                BNXT_ULP_CF_IDX_VF_FUNC_SVIF & 0xff}
                }
        },
-       /* class_tid: 5, , table: l2_cntxt_tcam_cache.rd_egr0 */
-       {
-       .field_info_mask = {
-               .description = "svif",
-               .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
-               .field_opr1 = {
-                       0xff}
-               },
-       .field_info_spec = {
-               .description = "svif",
-               .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
-               .field_opr1 = {
-               (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff,
-               BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff}
-               }
-       },
-       /* class_tid: 5, , table: l2_cntxt_tcam_cache.vfr_wr_egr0 */
-       {
-       .field_info_mask = {
-               .description = "svif",
-               .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
-               .field_opr1 = {
-                       0xff}
-               },
-       .field_info_spec = {
-               .description = "svif",
-               .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
-               .field_opr1 = {
-               (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff,
-               BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff}
-               }
-       },
-       /* class_tid: 5, , table: l2_cntxt_tcam_cache.ing_rd_vfr */
-       {
-       .field_info_mask = {
-               .description = "svif",
-               .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
-               .field_opr1 = {
-                       0xff}
-               },
-       .field_info_spec = {
-               .description = "svif",
-               .field_bit_size = 8,
-               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
-               .field_opr1 = {
-               (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff,
-               BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff}
-               }
-       },
-       /* class_tid: 5, , table: l2_cntxt_tcam.vfr_ing0 */
+       /* class_tid: 5, , table: l2_cntxt_tcam.vf_egr */
+       {
+       .field_info_mask = {
+               .description = "etype",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               },
+       .field_info_spec = {
+               .description = "etype",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l2_ivlan_tpid_sel",
+               .field_bit_size = 3,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               },
+       .field_info_spec = {
+               .description = "l2_ivlan_tpid_sel",
+               .field_bit_size = 3,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l2_ivlan_vid",
+               .field_bit_size = 12,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               },
+       .field_info_spec = {
+               .description = "l2_ivlan_vid",
+               .field_bit_size = 12,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l2_ovlan_tpid_sel",
+               .field_bit_size = 3,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               },
+       .field_info_spec = {
+               .description = "l2_ovlan_tpid_sel",
+               .field_bit_size = 3,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l2_ovlan_vid",
+               .field_bit_size = 12,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               },
+       .field_info_spec = {
+               .description = "l2_ovlan_vid",
+               .field_bit_size = 12,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "two_vtags",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               },
+       .field_info_spec = {
+               .description = "two_vtags",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "vtag_present",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               },
+       .field_info_spec = {
+               .description = "vtag_present",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "mac1_addr",
+               .field_bit_size = 48,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               },
+       .field_info_spec = {
+               .description = "mac1_addr",
+               .field_bit_size = 48,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "mac0_addr",
+               .field_bit_size = 48,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               },
+       .field_info_spec = {
+               .description = "mac0_addr",
+               .field_bit_size = 48,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "tunnel_id",
+               .field_bit_size = 24,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               },
+       .field_info_spec = {
+               .description = "tunnel_id",
+               .field_bit_size = 24,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "tun_hdr_type",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               },
+       .field_info_spec = {
+               .description = "tun_hdr_type",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "llc",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               },
+       .field_info_spec = {
+               .description = "llc",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "roce",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               },
+       .field_info_spec = {
+               .description = "roce",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "metadata",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               },
+       .field_info_spec = {
+               .description = "metadata",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "svif",
+               .field_bit_size = 11,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff,
+                       0xff}
+               },
+       .field_info_spec = {
+               .description = "svif",
+               .field_bit_size = 11,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr1 = {
+               (BNXT_ULP_CF_IDX_VF_FUNC_SVIF >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_VF_FUNC_SVIF & 0xff}
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "parif",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               },
+       .field_info_spec = {
+               .description = "parif",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "spif",
+               .field_bit_size = 2,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               },
+       .field_info_spec = {
+               .description = "spif",
+               .field_bit_size = 2,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "loopback",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               },
+       .field_info_spec = {
+               .description = "loopback",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "recycle_cnt",
+               .field_bit_size = 2,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               },
+       .field_info_spec = {
+               .description = "recycle_cnt",
+               .field_bit_size = 2,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "mpass_cnt",
+               .field_bit_size = 2,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               },
+       .field_info_spec = {
+               .description = "mpass_cnt",
+               .field_bit_size = 2,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "valid",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+               .field_opr1 = {
+               1}
+               },
+       .field_info_spec = {
+               .description = "valid",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+               .field_opr1 = {
+               1}
+               }
+       },
+       /* class_tid: 5, , table: l2_cntxt_tcam_cache.vf_egr_wr */
+       {
+       .field_info_mask = {
+               .description = "svif",
+               .field_bit_size = 8,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
+               },
+       .field_info_spec = {
+               .description = "svif",
+               .field_bit_size = 8,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr1 = {
+               (BNXT_ULP_CF_IDX_VF_FUNC_SVIF >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_VF_FUNC_SVIF & 0xff}
+               }
+       },
+       /* class_tid: 5, , table: l2_cntxt_tcam_cache.rd_egr0 */
+       {
+       .field_info_mask = {
+               .description = "svif",
+               .field_bit_size = 8,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
+               },
+       .field_info_spec = {
+               .description = "svif",
+               .field_bit_size = 8,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr1 = {
+               (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff}
+               }
+       },
+       /* class_tid: 5, , table: l2_cntxt_tcam_cache.vfr_wr_egr0 */
+       {
+       .field_info_mask = {
+               .description = "svif",
+               .field_bit_size = 8,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
+               },
+       .field_info_spec = {
+               .description = "svif",
+               .field_bit_size = 8,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr1 = {
+               (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff}
+               }
+       },
+       /* class_tid: 5, , table: l2_cntxt_tcam_cache.ing_rd_vfr */
+       {
+       .field_info_mask = {
+               .description = "svif",
+               .field_bit_size = 8,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_ONES,
+               .field_opr1 = {
+                       0xff}
+               },
+       .field_info_spec = {
+               .description = "svif",
+               .field_bit_size = 8,
+               .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+               .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+               .field_opr1 = {
+               (BNXT_ULP_CF_IDX_DRV_FUNC_SVIF >> 8) & 0xff,
+               BNXT_ULP_CF_IDX_DRV_FUNC_SVIF & 0xff}
+               }
+       },
+       /* class_tid: 5, , table: l2_cntxt_tcam.vfr_ing0 */
        {
        .field_info_mask = {
                .description = "etype",
@@ -33860,332 +34407,1091 @@ struct bnxt_ulp_mapper_key_info ulp_thor_class_key_info_list[] = {
                }
        },
        {
-       .field_info_mask = {
-               .description = "l3.ieh_auth",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               },
-       .field_info_spec = {
-               .description = "l3.ieh_auth",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               }
+       .field_info_mask = {
+               .description = "l3.ieh_auth",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l3.ieh_auth",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l3.ieh_dest",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l3.ieh_dest",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l3.ieh_frag",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l3.ieh_frag",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l3.ieh_rthdr",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l3.ieh_rthdr",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l3.ieh_hop",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l3.ieh_hop",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l3.ieh_1frag",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l3.ieh_1frag",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l3.df",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l3.df",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l3.l3err.ipv4",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l3.l3err.ipv4",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l3.l3err.ipv6",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l3.l3err.ipv6",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l4.l4type",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l4.l4type",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l4.src",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l4.src",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l4.dst",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l4.dst",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l4.flags",
+               .field_bit_size = 9,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l4.flags",
+               .field_bit_size = 9,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l4.seq",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l4.seq",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l4.ack",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l4.ack",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l4.win",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l4.win",
+               .field_bit_size = 16,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l4.pa",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l4.pa",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l4.opt",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l4.opt",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l4.tcpts",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l4.tcpts",
+               .field_bit_size = 1,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l4.tsval",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l4.tsval",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l4.txecr",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l4.txecr",
+               .field_bit_size = 32,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       },
+       {
+       .field_info_mask = {
+               .description = "l4.err",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               },
+       .field_info_spec = {
+               .description = "l4.err",
+               .field_bit_size = 4,
+               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
+               }
+       }
+};
+
+struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
+       /* class_tid: 1, , table: l2_cntxt_tcam.0 */
+       {
+       .description = "prof_func_id",
+       .field_bit_size = 7,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+       .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+       .field_opr1 = {
+       (BNXT_ULP_GLB_HF_ID_O_ETH_DMAC >> 8) & 0xff,
+       BNXT_ULP_GLB_HF_ID_O_ETH_DMAC & 0xff},
+       .field_src2 = BNXT_ULP_FIELD_SRC_GLB_RF,
+       .field_opr2 = {
+               (BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID >> 8) & 0xff,
+               BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID & 0xff},
+       .field_src3 = BNXT_ULP_FIELD_SRC_GLB_RF,
+       .field_opr3 = {
+       (BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID >> 8) & 0xff,
+       BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID & 0xff}
+       },
+       {
+       .description = "ctxt_meta_prof",
+       .field_bit_size = 3,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "def_ctxt_data",
+       .field_bit_size = 16,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR & 0xff}
+       },
+       {
+       .description = "ctxt_opcode",
+       .field_bit_size = 3,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       ULP_THOR_SYM_CTXT_OPCODE_NORMAL_FLOW}
+       },
+       {
+       .description = "l2_cntxt_id",
+       .field_bit_size = 10,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff}
+       },
+       {
+       .description = "parif",
+       .field_bit_size = 4,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+       .field_opr1 = {
+       (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff,
+       BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff}
+       },
+       /* class_tid: 1, , table: mac_addr_cache.wr */
+       {
+       .description = "rid",
+       .field_bit_size = 32,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_RID >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_RID & 0xff}
+       },
+       {
+       .description = "l2_cntxt_tcam_index",
+       .field_bit_size = 10,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l2_cntxt_id",
+       .field_bit_size = 10,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff}
+       },
+       {
+       .description = "src_property_ptr",
+       .field_bit_size = 10,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       /* class_tid: 1, , table: fkb_select.l2_l3_l4_v6_em */
+       {
+       .description = "l2_cntxt_id.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
+       },
+       {
+       .description = "parif.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "spif.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "svif.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "lcos.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "meta.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "rcyc_cnt.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "loopback.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl2_l2type.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl2_dmac.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl2_smac.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl2_dt.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl2_sa.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl2_nvt.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl2_ovp.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl2_ovd.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl2_ovv.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl2_ovt.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl2_ivp.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl2_ivd.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl2_ivv.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl2_ivt.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl2_etype.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl3_l3type.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl3_sip.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl3_sip_selcmp.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl3_dip.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl3_dip_selcmp.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl3_ttl.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl3_prot.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl3_fid.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl3_qos.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl3_ieh_nonext.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl3_ieh_esp.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl3_ieh_auth.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl3_ieh_dest.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl3_ieh_frag.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl3_ieh_rthdr.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl3_ieh_hop.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl3_ieh_1frag.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl3_df.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl3_l3err.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl4_l4type.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl4_src.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl4_dst.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl4_flags.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl4_seq.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl4_pa.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl4_opt.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl4_tcpts.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tl4_err.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tuntype.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tflags.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tids.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tid.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tctxts.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tctxt.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "tqos.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "terr.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l2_l2type.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l2_dmac.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l2_smac.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+       .field_opr1 = {
+       (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
+       BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff}
+       },
+       {
+       .description = "l2_dt.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l2_sa.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l2_nvt.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l2_ovp.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l2_ovd.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l2_ovv.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l2_ovt.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l2_ivp.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l2_ivd.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l2_ivv.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+       .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT,
+       .field_opr1 = {
+       ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff,
+       ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff,
+       ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff,
+       ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff,
+       ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff,
+       ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff,
+       ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff,
+       (uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff},
+       .field_src2 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+       .field_opr2 = {
+               (BNXT_ULP_GLB_HF_ID_OO_VLAN_VID >> 8) & 0xff,
+               BNXT_ULP_GLB_HF_ID_OO_VLAN_VID & 0xff},
+       .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l2_ivt.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l2_etype.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l3_l3type.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l3_sip.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+       .field_opr1 = {
+       (BNXT_ULP_GLB_HF_ID_O_IPV6_SRC_ADDR >> 8) & 0xff,
+       BNXT_ULP_GLB_HF_ID_O_IPV6_SRC_ADDR & 0xff}
+       },
+       {
+       .description = "l3_sip_selcmp.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l3_dip.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+       .field_opr1 = {
+       (BNXT_ULP_GLB_HF_ID_O_IPV6_DST_ADDR >> 8) & 0xff,
+       BNXT_ULP_GLB_HF_ID_O_IPV6_DST_ADDR & 0xff}
+       },
+       {
+       .description = "l3_dip_selcmp.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l3_ttl.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l3_prot.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+       .field_opr1 = {
+       (BNXT_ULP_CF_IDX_O_L3_FB_PROTO_ID >> 8) & 0xff,
+       BNXT_ULP_CF_IDX_O_L3_FB_PROTO_ID & 0xff}
+       },
+       {
+       .description = "l3_fid.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l3_qos.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l3_ieh_nonext.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l3_ieh_esp.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l3_ieh_auth.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l3_ieh_dest.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l3_ieh_frag.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .field_info_mask = {
-               .description = "l3.ieh_dest",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               },
-       .field_info_spec = {
-               .description = "l3.ieh_dest",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               }
+       .description = "l3_ieh_rthdr.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .field_info_mask = {
-               .description = "l3.ieh_frag",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               },
-       .field_info_spec = {
-               .description = "l3.ieh_frag",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               }
+       .description = "l3_ieh_hop.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .field_info_mask = {
-               .description = "l3.ieh_rthdr",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               },
-       .field_info_spec = {
-               .description = "l3.ieh_rthdr",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               }
+       .description = "l3_ieh_1frag.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .field_info_mask = {
-               .description = "l3.ieh_hop",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               },
-       .field_info_spec = {
-               .description = "l3.ieh_hop",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               }
+       .description = "l3_df.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .field_info_mask = {
-               .description = "l3.ieh_1frag",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               },
-       .field_info_spec = {
-               .description = "l3.ieh_1frag",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               }
+       .description = "l3_l3err.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .field_info_mask = {
-               .description = "l3.df",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               },
-       .field_info_spec = {
-               .description = "l3.df",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               }
+       .description = "l4_l4type.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .field_info_mask = {
-               .description = "l3.l3err.ipv4",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               },
-       .field_info_spec = {
-               .description = "l3.l3err.ipv4",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               }
+       .description = "l4_src.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+       .field_opr1 = {
+       (BNXT_ULP_CF_IDX_O_L4_FB_SRC_PORT >> 8) & 0xff,
+       BNXT_ULP_CF_IDX_O_L4_FB_SRC_PORT & 0xff}
        },
        {
-       .field_info_mask = {
-               .description = "l3.l3err.ipv6",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               },
-       .field_info_spec = {
-               .description = "l3.l3err.ipv6",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               }
+       .description = "l4_dst.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+       .field_opr1 = {
+       (BNXT_ULP_CF_IDX_O_L4_FB_DST_PORT >> 8) & 0xff,
+       BNXT_ULP_CF_IDX_O_L4_FB_DST_PORT & 0xff}
        },
        {
-       .field_info_mask = {
-               .description = "l4.l4type",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               },
-       .field_info_spec = {
-               .description = "l4.l4type",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               }
+       .description = "l4_flags.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .field_info_mask = {
-               .description = "l4.src",
-               .field_bit_size = 16,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               },
-       .field_info_spec = {
-               .description = "l4.src",
-               .field_bit_size = 16,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               }
+       .description = "l4_seq.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .field_info_mask = {
-               .description = "l4.dst",
-               .field_bit_size = 16,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               },
-       .field_info_spec = {
-               .description = "l4.dst",
-               .field_bit_size = 16,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               }
+       .description = "l4_ack.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .field_info_mask = {
-               .description = "l4.flags",
-               .field_bit_size = 9,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               },
-       .field_info_spec = {
-               .description = "l4.flags",
-               .field_bit_size = 9,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               }
+       .description = "l4_win.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .field_info_mask = {
-               .description = "l4.seq",
-               .field_bit_size = 32,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               },
-       .field_info_spec = {
-               .description = "l4.seq",
-               .field_bit_size = 32,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               }
+       .description = "l4_pa.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .field_info_mask = {
-               .description = "l4.ack",
-               .field_bit_size = 32,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               },
-       .field_info_spec = {
-               .description = "l4.ack",
-               .field_bit_size = 32,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               }
+       .description = "l4_opt.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .field_info_mask = {
-               .description = "l4.win",
-               .field_bit_size = 16,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               },
-       .field_info_spec = {
-               .description = "l4.win",
-               .field_bit_size = 16,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               }
+       .description = "l4_tcpts.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .field_info_mask = {
-               .description = "l4.pa",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               },
-       .field_info_spec = {
-               .description = "l4.pa",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               }
+       .description = "l4_tsval.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .field_info_mask = {
-               .description = "l4.opt",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               },
-       .field_info_spec = {
-               .description = "l4.opt",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               }
+       .description = "l4_txecr.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .field_info_mask = {
-               .description = "l4.tcpts",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               },
-       .field_info_spec = {
-               .description = "l4.tcpts",
-               .field_bit_size = 1,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               }
+       .description = "l4_err.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
+       /* class_tid: 1, , table: profile_tcam.l2_l3_l4_v6_em */
        {
-       .field_info_mask = {
-               .description = "l4.tsval",
-               .field_bit_size = 32,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               },
-       .field_info_spec = {
-               .description = "l4.tsval",
-               .field_bit_size = 32,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               }
+       .description = "wc_key_id",
+       .field_bit_size = 6,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .field_info_mask = {
-               .description = "l4.txecr",
-               .field_bit_size = 32,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               },
-       .field_info_spec = {
-               .description = "l4.txecr",
-               .field_bit_size = 32,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               }
+       .description = "wc_profile_id",
+       .field_bit_size = 8,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .field_info_mask = {
-               .description = "l4.err",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               },
-       .field_info_spec = {
-               .description = "l4.err",
-               .field_bit_size = 4,
-               .field_opc = BNXT_ULP_FIELD_OPC_SKIP
-               }
-       }
-};
-
-struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
-       /* class_tid: 1, , table: l2_cntxt_tcam.0 */
-       {
-       .description = "prof_func_id",
-       .field_bit_size = 7,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
-       .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
-       .field_opr1 = {
-       (BNXT_ULP_GLB_HF_ID_O_ETH_DMAC >> 8) & 0xff,
-       BNXT_ULP_GLB_HF_ID_O_ETH_DMAC & 0xff},
-       .field_src2 = BNXT_ULP_FIELD_SRC_GLB_RF,
-       .field_opr2 = {
-               (BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID >> 8) & 0xff,
-               BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID & 0xff},
-       .field_src3 = BNXT_ULP_FIELD_SRC_GLB_RF,
-       .field_opr3 = {
-       (BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID >> 8) & 0xff,
-       BNXT_ULP_GLB_RF_IDX_GLB_PROF_FUNC_ID & 0xff}
+       .description = "wc_search_en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "ctxt_meta_prof",
-       .field_bit_size = 3,
+       .description = "em_key_type",
+       .field_bit_size = 2,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "def_ctxt_data",
-       .field_bit_size = 16,
+       .description = "em_key_id",
+       .field_bit_size = 6,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_RF,
        .field_opr1 = {
-       (BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR & 0xff}
+       (BNXT_ULP_RF_IDX_EM_KEY_ID_0 >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_EM_KEY_ID_0 & 0xff}
        },
        {
-       .description = "ctxt_opcode",
-       .field_bit_size = 3,
+       .description = "em_profile_id",
+       .field_bit_size = 8,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
        .field_opr1 = {
-       ULP_THOR_SYM_CTXT_OPCODE_NORMAL_FLOW}
+       (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff}
        },
        {
-       .description = "l2_cntxt_id",
-       .field_bit_size = 10,
+       .description = "em_search_en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
        .field_opr1 = {
-       (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff}
+       1}
        },
        {
-       .description = "parif",
-       .field_bit_size = 4,
+       .description = "pl_byp_lkup_en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CF,
-       .field_opr1 = {
-       (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff,
-       BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff}
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
-       /* class_tid: 1, , table: mac_addr_cache.wr */
+       /* class_tid: 1, , table: profile_tcam_cache.l2_l3_l4_v6_wr */
        {
        .description = "rid",
        .field_bit_size = 32,
@@ -34196,27 +35502,98 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        BNXT_ULP_RF_IDX_RID & 0xff}
        },
        {
-       .description = "l2_cntxt_tcam_index",
+       .description = "profile_tcam_index",
        .field_bit_size = 10,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0 >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0 & 0xff}
+       },
+       {
+       .description = "em_profile_id",
+       .field_bit_size = 8,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff}
+       },
+       {
+       .description = "em_key_id",
+       .field_bit_size = 8,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_EM_KEY_ID_0 >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_EM_KEY_ID_0 & 0xff}
+       },
+       {
+       .description = "wc_profile_id",
+       .field_bit_size = 8,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l2_cntxt_id",
-       .field_bit_size = 10,
+       .description = "wc_key_id",
+       .field_bit_size = 8,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "flow_sig_id",
+       .field_bit_size = 64,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+       .field_opr1 = {
+       (BNXT_ULP_CF_IDX_FLOW_SIG_ID >> 8) & 0xff,
+       BNXT_ULP_CF_IDX_FLOW_SIG_ID & 0xff}
+       },
+       /* class_tid: 1, , table: em.l2_l3_l4_v6.0 */
+       {
+       .description = "valid",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
+       },
+       {
+       .description = "strength",
+       .field_bit_size = 2,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       3}
+       },
+       {
+       .description = "data",
+       .field_bit_size = 16,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_RF,
        .field_opr1 = {
-       (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff}
+       (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff}
        },
        {
-       .description = "src_property_ptr",
-       .field_bit_size = 10,
+       .description = "opcode",
+       .field_bit_size = 3,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
-       /* class_tid: 1, , table: fkb_select.l2_l3_l4_v6_em */
+       {
+       .description = "meta_prof",
+       .field_bit_size = 3,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "ctxt_data",
+       .field_bit_size = 14,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       /* class_tid: 1, , table: fkb_select.l3_l4_wm */
        {
        .description = "l2_cntxt_id.en",
        .field_bit_size = 1,
@@ -34589,10 +35966,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "l2_smac.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
        .field_opr1 = {
-       (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
-       BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff}
+       1}
        },
        {
        .description = "l2_dt.en",
@@ -34651,22 +36027,10 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        {
        .description = "l2_ivv.en",
        .field_bit_size = 1,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
-       .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
        .field_opr1 = {
-       ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff,
-       ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff,
-       ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff,
-       ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff,
-       ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff,
-       ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff,
-       ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff,
-       (uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff},
-       .field_src2 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
-       .field_opr2 = {
-               (BNXT_ULP_GLB_HF_ID_OO_VLAN_VID >> 8) & 0xff,
-               BNXT_ULP_GLB_HF_ID_OO_VLAN_VID & 0xff},
-       .field_src3 = BNXT_ULP_FIELD_SRC_ZERO
+       1}
        },
        {
        .description = "l2_ivt.en",
@@ -34690,10 +36054,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "l3_sip.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
        .field_opr1 = {
-       (BNXT_ULP_GLB_HF_ID_O_IPV6_SRC_ADDR >> 8) & 0xff,
-       BNXT_ULP_GLB_HF_ID_O_IPV6_SRC_ADDR & 0xff}
+       1}
        },
        {
        .description = "l3_sip_selcmp.en",
@@ -34705,10 +36068,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "l3_dip.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
        .field_opr1 = {
-       (BNXT_ULP_GLB_HF_ID_O_IPV6_DST_ADDR >> 8) & 0xff,
-       BNXT_ULP_GLB_HF_ID_O_IPV6_DST_ADDR & 0xff}
+       1}
        },
        {
        .description = "l3_dip_selcmp.en",
@@ -34726,7 +36088,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "l3_prot.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
        },
        {
        .description = "l3_fid.en",
@@ -34810,19 +36174,17 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "l4_src.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
        .field_opr1 = {
-       (BNXT_ULP_CF_IDX_O_L4_FB_SRC_PORT >> 8) & 0xff,
-       BNXT_ULP_CF_IDX_O_L4_FB_SRC_PORT & 0xff}
+       1}
        },
        {
        .description = "l4_dst.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
        .field_opr1 = {
-       (BNXT_ULP_CF_IDX_O_L4_FB_DST_PORT >> 8) & 0xff,
-       BNXT_ULP_CF_IDX_O_L4_FB_DST_PORT & 0xff}
+       1}
        },
        {
        .description = "l4_flags.en",
@@ -34884,166 +36246,7 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
-       /* class_tid: 1, , table: profile_tcam.l2_l3_l4_v6_em */
-       {
-       .description = "wc_key_id",
-       .field_bit_size = 6,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-       },
-       {
-       .description = "wc_profile_id",
-       .field_bit_size = 8,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-       },
-       {
-       .description = "wc_search_en",
-       .field_bit_size = 1,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-       },
-       {
-       .description = "em_key_type",
-       .field_bit_size = 2,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-       },
-       {
-       .description = "em_key_id",
-       .field_bit_size = 6,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
-       .field_opr1 = {
-       (BNXT_ULP_RF_IDX_EM_KEY_ID_0 >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_EM_KEY_ID_0 & 0xff}
-       },
-       {
-       .description = "em_profile_id",
-       .field_bit_size = 8,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
-       .field_opr1 = {
-       (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff}
-       },
-       {
-       .description = "em_search_en",
-       .field_bit_size = 1,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-       .field_opr1 = {
-       1}
-       },
-       {
-       .description = "pl_byp_lkup_en",
-       .field_bit_size = 1,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-       },
-       /* class_tid: 1, , table: profile_tcam_cache.l2_l3_l4_v6_wr */
-       {
-       .description = "rid",
-       .field_bit_size = 32,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
-       .field_opr1 = {
-       (BNXT_ULP_RF_IDX_RID >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_RID & 0xff}
-       },
-       {
-       .description = "profile_tcam_index",
-       .field_bit_size = 10,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
-       .field_opr1 = {
-       (BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0 >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0 & 0xff}
-       },
-       {
-       .description = "em_profile_id",
-       .field_bit_size = 8,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
-       .field_opr1 = {
-       (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff}
-       },
-       {
-       .description = "em_key_id",
-       .field_bit_size = 8,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
-       .field_opr1 = {
-       (BNXT_ULP_RF_IDX_EM_KEY_ID_0 >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_EM_KEY_ID_0 & 0xff}
-       },
-       {
-       .description = "wc_profile_id",
-       .field_bit_size = 8,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-       },
-       {
-       .description = "wc_key_id",
-       .field_bit_size = 8,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-       },
-       {
-       .description = "flow_sig_id",
-       .field_bit_size = 64,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CF,
-       .field_opr1 = {
-       (BNXT_ULP_CF_IDX_FLOW_SIG_ID >> 8) & 0xff,
-       BNXT_ULP_CF_IDX_FLOW_SIG_ID & 0xff}
-       },
-       /* class_tid: 1, , table: em.l2_l3_l4_v6.0 */
-       {
-       .description = "valid",
-       .field_bit_size = 1,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-       .field_opr1 = {
-       1}
-       },
-       {
-       .description = "strength",
-       .field_bit_size = 2,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-       .field_opr1 = {
-       3}
-       },
-       {
-       .description = "data",
-       .field_bit_size = 16,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
-       .field_opr1 = {
-       (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff}
-       },
-       {
-       .description = "opcode",
-       .field_bit_size = 3,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-       },
-       {
-       .description = "meta_prof",
-       .field_bit_size = 3,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-       },
-       {
-       .description = "ctxt_data",
-       .field_bit_size = 14,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-       },
-       /* class_tid: 1, , table: fkb_select.l3_l4_wm */
+       /* class_tid: 1, , table: fkb_select.l3_l4_wm_vxlan */
        {
        .description = "l2_cntxt_id.en",
        .field_bit_size = 1,
@@ -35170,7 +36373,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "tl2_ivv.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
        },
        {
        .description = "tl2_ivt.en",
@@ -35194,7 +36399,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "tl3_sip.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
        },
        {
        .description = "tl3_sip_selcmp.en",
@@ -35206,7 +36413,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "tl3_dip.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
        },
        {
        .description = "tl3_dip_selcmp.en",
@@ -35224,7 +36433,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "tl3_prot.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
        },
        {
        .description = "tl3_fid.en",
@@ -35308,13 +36519,17 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "tl4_src.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
        },
        {
        .description = "tl4_dst.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
        },
        {
        .description = "tl4_flags.en",
@@ -35478,9 +36693,7 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "l2_ivv.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-       .field_opr1 = {
-       1}
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
        .description = "l2_ivt.en",
@@ -35504,9 +36717,7 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "l3_sip.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-       .field_opr1 = {
-       1}
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
        .description = "l3_sip_selcmp.en",
@@ -35518,9 +36729,7 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "l3_dip.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-       .field_opr1 = {
-       1}
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
        .description = "l3_dip_selcmp.en",
@@ -35538,9 +36747,7 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "l3_prot.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-       .field_opr1 = {
-       1}
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
        .description = "l3_fid.en",
@@ -35624,17 +36831,13 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "l4_src.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-       .field_opr1 = {
-       1}
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
        .description = "l4_dst.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-       .field_opr1 = {
-       1}
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
        .description = "l4_flags.en",
@@ -35696,9 +36899,112 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
-       /* class_tid: 1, , table: fkb_select.l3_l4_wm_vxlan */
+       /* class_tid: 1, , table: profile_tcam.l3_l4.ip */
        {
-       .description = "l2_cntxt_id.en",
+       .description = "wc_key_id",
+       .field_bit_size = 6,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF,
+       .field_opr1 = {
+       (BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0 >> 8) & 0xff,
+       BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0 & 0xff}
+       },
+       {
+       .description = "wc_profile_id",
+       .field_bit_size = 8,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+       .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT,
+       .field_opr1 = {
+       ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,
+       ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,
+       ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,
+       ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,
+       ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,
+       ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,
+       ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,
+       (uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},
+       .field_src2 = BNXT_ULP_FIELD_SRC_GLB_RF,
+       .field_opr2 = {
+               (BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1 >> 8) & 0xff,
+               BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1 & 0xff},
+       .field_src3 = BNXT_ULP_FIELD_SRC_GLB_RF,
+       .field_opr3 = {
+       (BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0 >> 8) & 0xff,
+       BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0 & 0xff}
+       },
+       {
+       .description = "wc_search_en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
+       },
+       {
+       .description = "em_key_type",
+       .field_bit_size = 2,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "em_key_id",
+       .field_bit_size = 6,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "em_profile_id",
+       .field_bit_size = 8,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "em_search_en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "pl_byp_lkup_en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       /* class_tid: 1, , table: profile_tcam.l3_l4.vxlan */
+       {
+       .description = "wc_key_id",
+       .field_bit_size = 6,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF,
+       .field_opr1 = {
+       (BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_2 >> 8) & 0xff,
+       BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_2 & 0xff}
+       },
+       {
+       .description = "wc_profile_id",
+       .field_bit_size = 8,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+       .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT,
+       .field_opr1 = {
+       ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,
+       ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,
+       ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,
+       ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,
+       ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,
+       ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,
+       ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,
+       (uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},
+       .field_src2 = BNXT_ULP_FIELD_SRC_GLB_RF,
+       .field_opr2 = {
+               (BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3 >> 8) & 0xff,
+               BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3 & 0xff},
+       .field_src3 = BNXT_ULP_FIELD_SRC_GLB_RF,
+       .field_opr3 = {
+       (BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2 >> 8) & 0xff,
+       BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2 & 0xff}
+       },
+       {
+       .description = "wc_search_en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
@@ -35706,1131 +37012,1203 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        1}
        },
        {
-       .description = "parif.en",
-       .field_bit_size = 1,
+       .description = "em_key_type",
+       .field_bit_size = 2,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "em_key_id",
+       .field_bit_size = 6,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "spif.en",
-       .field_bit_size = 1,
+       .description = "em_profile_id",
+       .field_bit_size = 8,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "svif.en",
+       .description = "em_search_en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "lcos.en",
+       .description = "pl_byp_lkup_en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
+       /* class_tid: 1, , table: profile_tcam_cache.wr */
        {
-       .description = "meta.en",
-       .field_bit_size = 1,
+       .description = "rid",
+       .field_bit_size = 32,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_RID >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_RID & 0xff}
        },
        {
-       .description = "rcyc_cnt.en",
-       .field_bit_size = 1,
+       .description = "profile_tcam_index",
+       .field_bit_size = 10,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0 >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0 & 0xff}
        },
        {
-       .description = "loopback.en",
-       .field_bit_size = 1,
+       .description = "em_profile_id",
+       .field_bit_size = 8,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl2_l2type.en",
-       .field_bit_size = 1,
+       .description = "em_key_id",
+       .field_bit_size = 8,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl2_dmac.en",
-       .field_bit_size = 1,
+       .description = "wc_profile_id",
+       .field_bit_size = 8,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl2_smac.en",
-       .field_bit_size = 1,
+       .description = "wc_key_id",
+       .field_bit_size = 8,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl2_dt.en",
-       .field_bit_size = 1,
+       .description = "flow_sig_id",
+       .field_bit_size = 64,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+       .field_opr1 = {
+       (BNXT_ULP_CF_IDX_FLOW_SIG_ID >> 8) & 0xff,
+       BNXT_ULP_CF_IDX_FLOW_SIG_ID & 0xff}
        },
+       /* class_tid: 1, , table: wm.l3_l4.ipv4 */
        {
-       .description = "tl2_sa.en",
-       .field_bit_size = 1,
+       .description = "ctxt_data",
+       .field_bit_size = 14,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl2_nvt.en",
-       .field_bit_size = 1,
+       .description = "meta_prof",
+       .field_bit_size = 3,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl2_ovp.en",
-       .field_bit_size = 1,
+       .description = "opcode",
+       .field_bit_size = 3,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl2_ovd.en",
-       .field_bit_size = 1,
+       .description = "data",
+       .field_bit_size = 16,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff}
        },
        {
-       .description = "tl2_ovv.en",
-       .field_bit_size = 1,
+       .description = "strength",
+       .field_bit_size = 2,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
        },
+       /* class_tid: 1, , table: wm.l3_l4.ipv6 */
        {
-       .description = "tl2_ovt.en",
-       .field_bit_size = 1,
+       .description = "ctxt_data",
+       .field_bit_size = 14,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl2_ivp.en",
-       .field_bit_size = 1,
+       .description = "meta_prof",
+       .field_bit_size = 3,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl2_ivd.en",
-       .field_bit_size = 1,
+       .description = "opcode",
+       .field_bit_size = 3,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl2_ivv.en",
-       .field_bit_size = 1,
+       .description = "data",
+       .field_bit_size = 16,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff}
+       },
+       {
+       .description = "strength",
+       .field_bit_size = 2,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
        .field_opr1 = {
        1}
        },
+       /* class_tid: 1, , table: wm.l3.ipv4 */
        {
-       .description = "tl2_ivt.en",
-       .field_bit_size = 1,
+       .description = "ctxt_data",
+       .field_bit_size = 14,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl2_etype.en",
-       .field_bit_size = 1,
+       .description = "meta_prof",
+       .field_bit_size = 3,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl3_l3type.en",
-       .field_bit_size = 1,
+       .description = "opcode",
+       .field_bit_size = 3,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl3_sip.en",
-       .field_bit_size = 1,
+       .description = "data",
+       .field_bit_size = 16,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff}
+       },
+       {
+       .description = "strength",
+       .field_bit_size = 2,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
        .field_opr1 = {
        1}
        },
+       /* class_tid: 1, , table: wm.l3.ipv6 */
        {
-       .description = "tl3_sip_selcmp.en",
-       .field_bit_size = 1,
+       .description = "ctxt_data",
+       .field_bit_size = 14,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl3_dip.en",
-       .field_bit_size = 1,
+       .description = "meta_prof",
+       .field_bit_size = 3,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-       .field_opr1 = {
-       1}
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl3_dip_selcmp.en",
-       .field_bit_size = 1,
+       .description = "opcode",
+       .field_bit_size = 3,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl3_ttl.en",
-       .field_bit_size = 1,
+       .description = "data",
+       .field_bit_size = 16,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff}
        },
        {
-       .description = "tl3_prot.en",
-       .field_bit_size = 1,
+       .description = "strength",
+       .field_bit_size = 2,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
        .field_opr1 = {
        1}
        },
+       /* class_tid: 1, , table: wm.l2 */
        {
-       .description = "tl3_fid.en",
-       .field_bit_size = 1,
+       .description = "ctxt_data",
+       .field_bit_size = 14,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl3_qos.en",
-       .field_bit_size = 1,
+       .description = "meta_prof",
+       .field_bit_size = 3,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl3_ieh_nonext.en",
-       .field_bit_size = 1,
+       .description = "opcode",
+       .field_bit_size = 3,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl3_ieh_esp.en",
-       .field_bit_size = 1,
+       .description = "data",
+       .field_bit_size = 16,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff}
        },
        {
-       .description = "tl3_ieh_auth.en",
-       .field_bit_size = 1,
+       .description = "strength",
+       .field_bit_size = 2,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
        },
+       /* class_tid: 1, , table: wm.l3_l4.vxlan.ipv4 */
        {
-       .description = "tl3_ieh_dest.en",
-       .field_bit_size = 1,
+       .description = "ctxt_data",
+       .field_bit_size = 14,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl3_ieh_frag.en",
-       .field_bit_size = 1,
+       .description = "meta_prof",
+       .field_bit_size = 3,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl3_ieh_rthdr.en",
-       .field_bit_size = 1,
+       .description = "opcode",
+       .field_bit_size = 3,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl3_ieh_hop.en",
-       .field_bit_size = 1,
+       .description = "data",
+       .field_bit_size = 16,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff}
        },
        {
-       .description = "tl3_ieh_1frag.en",
-       .field_bit_size = 1,
+       .description = "strength",
+       .field_bit_size = 2,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
        },
+       /* class_tid: 1, , table: wm.l3_l4.vxlan.ipv6 */
        {
-       .description = "tl3_df.en",
-       .field_bit_size = 1,
+       .description = "ctxt_data",
+       .field_bit_size = 14,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl3_l3err.en",
-       .field_bit_size = 1,
+       .description = "meta_prof",
+       .field_bit_size = 3,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl4_l4type.en",
-       .field_bit_size = 1,
+       .description = "opcode",
+       .field_bit_size = 3,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl4_src.en",
-       .field_bit_size = 1,
+       .description = "data",
+       .field_bit_size = 16,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
        .field_opr1 = {
-       1}
+       (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff}
        },
        {
-       .description = "tl4_dst.en",
-       .field_bit_size = 1,
+       .description = "strength",
+       .field_bit_size = 2,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
        .field_opr1 = {
        1}
        },
+       /* class_tid: 2, , table: l2_cntxt_tcam.1 */
        {
-       .description = "tl4_flags.en",
-       .field_bit_size = 1,
+       .description = "prof_func_id",
+       .field_bit_size = 7,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl4_seq.en",
-       .field_bit_size = 1,
+       .description = "ctxt_meta_prof",
+       .field_bit_size = 3,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl4_pa.en",
-       .field_bit_size = 1,
+       .description = "def_ctxt_data",
+       .field_bit_size = 16,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl4_opt.en",
-       .field_bit_size = 1,
+       .description = "ctxt_opcode",
+       .field_bit_size = 3,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl4_tcpts.en",
-       .field_bit_size = 1,
+       .description = "l2_cntxt_id",
+       .field_bit_size = 10,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tl4_err.en",
-       .field_bit_size = 1,
+       .description = "parif",
+       .field_bit_size = 4,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
+       /* class_tid: 2, , table: tunnel_cache.wr */
        {
-       .description = "tuntype.en",
-       .field_bit_size = 1,
+       .description = "rid",
+       .field_bit_size = 32,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_RID >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_RID & 0xff}
        },
        {
-       .description = "tflags.en",
-       .field_bit_size = 1,
+       .description = "l2_cntxt_tcam_index",
+       .field_bit_size = 10,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tids.en",
-       .field_bit_size = 1,
+       .description = "l2_cntxt_id",
+       .field_bit_size = 10,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff}
        },
+       /* class_tid: 2, , table: l2_cntxt_tcam.0 */
        {
-       .description = "tid.en",
-       .field_bit_size = 1,
+       .description = "prof_func_id",
+       .field_bit_size = 7,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF,
+       .field_opr1 = {
+       (BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,
+       BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID & 0xff}
        },
        {
-       .description = "tctxts.en",
-       .field_bit_size = 1,
+       .description = "ctxt_meta_prof",
+       .field_bit_size = 3,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "tctxt.en",
-       .field_bit_size = 1,
+       .description = "def_ctxt_data",
+       .field_bit_size = 16,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR & 0xff}
        },
        {
-       .description = "tqos.en",
-       .field_bit_size = 1,
+       .description = "ctxt_opcode",
+       .field_bit_size = 3,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       ULP_THOR_SYM_CTXT_OPCODE_NORMAL_FLOW}
        },
        {
-       .description = "terr.en",
-       .field_bit_size = 1,
+       .description = "l2_cntxt_id",
+       .field_bit_size = 10,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff}
        },
        {
-       .description = "l2_l2type.en",
-       .field_bit_size = 1,
+       .description = "parif",
+       .field_bit_size = 4,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+       .field_opr1 = {
+       (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff,
+       BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff}
        },
+       /* class_tid: 2, , table: mac_addr_cache.wr */
        {
-       .description = "l2_dmac.en",
-       .field_bit_size = 1,
+       .description = "rid",
+       .field_bit_size = 32,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_RID >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_RID & 0xff}
+       },
+       {
+       .description = "l2_cntxt_tcam_index",
+       .field_bit_size = 10,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l2_smac.en",
-       .field_bit_size = 1,
+       .description = "l2_cntxt_id",
+       .field_bit_size = 10,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff}
+       },
+       {
+       .description = "src_property_ptr",
+       .field_bit_size = 10,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
+       /* class_tid: 2, , table: fkb_select.f2_l2_l3_l4_v6_em */
        {
-       .description = "l2_dt.en",
+       .description = "l2_cntxt_id.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
        },
        {
-       .description = "l2_sa.en",
+       .description = "parif.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l2_nvt.en",
+       .description = "spif.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l2_ovp.en",
+       .description = "svif.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l2_ovd.en",
+       .description = "lcos.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l2_ovv.en",
+       .description = "meta.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l2_ovt.en",
+       .description = "rcyc_cnt.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l2_ivp.en",
+       .description = "loopback.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l2_ivd.en",
+       .description = "tl2_l2type.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l2_ivv.en",
+       .description = "tl2_dmac.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l2_ivt.en",
+       .description = "tl2_smac.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l2_etype.en",
+       .description = "tl2_dt.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l3_l3type.en",
+       .description = "tl2_sa.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l3_sip.en",
+       .description = "tl2_nvt.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l3_sip_selcmp.en",
+       .description = "tl2_ovp.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l3_dip.en",
+       .description = "tl2_ovd.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l3_dip_selcmp.en",
+       .description = "tl2_ovv.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l3_ttl.en",
+       .description = "tl2_ovt.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l3_prot.en",
+       .description = "tl2_ivp.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l3_fid.en",
+       .description = "tl2_ivd.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l3_qos.en",
+       .description = "tl2_ivv.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l3_ieh_nonext.en",
+       .description = "tl2_ivt.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l3_ieh_esp.en",
+       .description = "tl2_etype.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l3_ieh_auth.en",
+       .description = "tl3_l3type.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l3_ieh_dest.en",
+       .description = "tl3_sip.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l3_ieh_frag.en",
+       .description = "tl3_sip_selcmp.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l3_ieh_rthdr.en",
+       .description = "tl3_dip.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l3_ieh_hop.en",
+       .description = "tl3_dip_selcmp.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l3_ieh_1frag.en",
+       .description = "tl3_ttl.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l3_df.en",
+       .description = "tl3_prot.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l3_l3err.en",
+       .description = "tl3_fid.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l4_l4type.en",
+       .description = "tl3_qos.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l4_src.en",
+       .description = "tl3_ieh_nonext.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l4_dst.en",
+       .description = "tl3_ieh_esp.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l4_flags.en",
+       .description = "tl3_ieh_auth.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l4_seq.en",
+       .description = "tl3_ieh_dest.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l4_ack.en",
+       .description = "tl3_ieh_frag.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l4_win.en",
+       .description = "tl3_ieh_rthdr.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l4_pa.en",
+       .description = "tl3_ieh_hop.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l4_opt.en",
+       .description = "tl3_ieh_1frag.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l4_tcpts.en",
+       .description = "tl3_df.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l4_tsval.en",
+       .description = "tl3_l3err.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l4_txecr.en",
+       .description = "tl4_l4type.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l4_err.en",
+       .description = "tl4_src.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
-       /* class_tid: 1, , table: profile_tcam.l3_l4.ip */
        {
-       .description = "wc_key_id",
-       .field_bit_size = 6,
+       .description = "tl4_dst.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF,
-       .field_opr1 = {
-       (BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0 >> 8) & 0xff,
-       BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0 & 0xff}
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "wc_profile_id",
-       .field_bit_size = 8,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
-       .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT,
-       .field_opr1 = {
-       ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,
-       ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,
-       ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,
-       ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,
-       ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,
-       ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,
-       ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,
-       (uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},
-       .field_src2 = BNXT_ULP_FIELD_SRC_GLB_RF,
-       .field_opr2 = {
-               (BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1 >> 8) & 0xff,
-               BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1 & 0xff},
-       .field_src3 = BNXT_ULP_FIELD_SRC_GLB_RF,
-       .field_opr3 = {
-       (BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0 >> 8) & 0xff,
-       BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0 & 0xff}
+       .description = "tl4_flags.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "wc_search_en",
+       .description = "tl4_seq.en",
        .field_bit_size = 1,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-       .field_opr1 = {
-       1}
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "em_key_type",
-       .field_bit_size = 2,
+       .description = "tl4_pa.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "em_key_id",
-       .field_bit_size = 6,
+       .description = "tl4_opt.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "em_profile_id",
-       .field_bit_size = 8,
+       .description = "tl4_tcpts.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "em_search_en",
+       .description = "tl4_err.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "pl_byp_lkup_en",
+       .description = "tuntype.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
-       /* class_tid: 1, , table: profile_tcam.l3_l4.vxlan */
        {
-       .description = "wc_key_id",
-       .field_bit_size = 6,
+       .description = "tflags.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF,
-       .field_opr1 = {
-       (BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_2 >> 8) & 0xff,
-       BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_2 & 0xff}
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "wc_profile_id",
-       .field_bit_size = 8,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
-       .field_src1 = BNXT_ULP_FIELD_SRC_HDR_BIT,
+       .description = "tids.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
        .field_opr1 = {
-       ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,
-       ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,
-       ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,
-       ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,
-       ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,
-       ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,
-       ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,
-       (uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},
-       .field_src2 = BNXT_ULP_FIELD_SRC_GLB_RF,
-       .field_opr2 = {
-               (BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3 >> 8) & 0xff,
-               BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3 & 0xff},
-       .field_src3 = BNXT_ULP_FIELD_SRC_GLB_RF,
-       .field_opr3 = {
-       (BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2 >> 8) & 0xff,
-       BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2 & 0xff}
+       (BNXT_ULP_GLB_HF_ID_T_VXLAN_VNI >> 8) & 0xff,
+       BNXT_ULP_GLB_HF_ID_T_VXLAN_VNI & 0xff}
        },
        {
-       .description = "wc_search_en",
+       .description = "tid.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-       .field_opr1 = {
-       1}
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "em_key_type",
-       .field_bit_size = 2,
+       .description = "tctxts.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "em_key_id",
-       .field_bit_size = 6,
+       .description = "tctxt.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "em_profile_id",
-       .field_bit_size = 8,
+       .description = "tqos.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "em_search_en",
+       .description = "terr.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "pl_byp_lkup_en",
+       .description = "l2_l2type.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
-       /* class_tid: 1, , table: profile_tcam_cache.wr */
        {
-       .description = "rid",
-       .field_bit_size = 32,
+       .description = "l2_dmac.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
        .field_opr1 = {
-       (BNXT_ULP_RF_IDX_RID >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_RID & 0xff}
+       1}
        },
        {
-       .description = "profile_tcam_index",
-       .field_bit_size = 10,
+       .description = "l2_smac.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
        .field_opr1 = {
-       (BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0 >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0 & 0xff}
+       (BNXT_ULP_GLB_HF_ID_I_ETH_SMAC >> 8) & 0xff,
+       BNXT_ULP_GLB_HF_ID_I_ETH_SMAC & 0xff}
        },
        {
-       .description = "em_profile_id",
-       .field_bit_size = 8,
+       .description = "l2_dt.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "em_key_id",
-       .field_bit_size = 8,
+       .description = "l2_sa.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "wc_profile_id",
-       .field_bit_size = 8,
+       .description = "l2_nvt.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "wc_key_id",
-       .field_bit_size = 8,
+       .description = "l2_ovp.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "flow_sig_id",
-       .field_bit_size = 64,
+       .description = "l2_ovd.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CF,
-       .field_opr1 = {
-       (BNXT_ULP_CF_IDX_FLOW_SIG_ID >> 8) & 0xff,
-       BNXT_ULP_CF_IDX_FLOW_SIG_ID & 0xff}
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
-       /* class_tid: 1, , table: wm.l3_l4.ipv4 */
        {
-       .description = "ctxt_data",
-       .field_bit_size = 14,
+       .description = "l2_ovv.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "meta_prof",
-       .field_bit_size = 3,
+       .description = "l2_ovt.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "opcode",
-       .field_bit_size = 3,
+       .description = "l2_ivp.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "data",
-       .field_bit_size = 16,
+       .description = "l2_ivd.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
-       .field_opr1 = {
-       (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff}
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "strength",
-       .field_bit_size = 2,
+       .description = "l2_ivv.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-       .field_opr1 = {
-       1}
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
-       /* class_tid: 1, , table: wm.l3_l4.ipv6 */
        {
-       .description = "ctxt_data",
-       .field_bit_size = 14,
+       .description = "l2_ivt.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "meta_prof",
-       .field_bit_size = 3,
+       .description = "l2_etype.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "opcode",
-       .field_bit_size = 3,
+       .description = "l3_l3type.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "data",
-       .field_bit_size = 16,
+       .description = "l3_sip.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
        .field_opr1 = {
-       (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff}
+       (BNXT_ULP_GLB_HF_ID_I_IPV6_SRC_ADDR >> 8) & 0xff,
+       BNXT_ULP_GLB_HF_ID_I_IPV6_SRC_ADDR & 0xff}
        },
        {
-       .description = "strength",
-       .field_bit_size = 2,
+       .description = "l3_sip_selcmp.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l3_dip.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
        .field_opr1 = {
-       1}
+       (BNXT_ULP_GLB_HF_ID_I_IPV6_DST_ADDR >> 8) & 0xff,
+       BNXT_ULP_GLB_HF_ID_I_IPV6_DST_ADDR & 0xff}
        },
-       /* class_tid: 1, , table: wm.l3.ipv4 */
        {
-       .description = "ctxt_data",
-       .field_bit_size = 14,
+       .description = "l3_dip_selcmp.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "meta_prof",
-       .field_bit_size = 3,
+       .description = "l3_ttl.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "opcode",
-       .field_bit_size = 3,
+       .description = "l3_prot.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+       .field_opr1 = {
+       (BNXT_ULP_CF_IDX_I_L3_FB_PROTO_ID >> 8) & 0xff,
+       BNXT_ULP_CF_IDX_I_L3_FB_PROTO_ID & 0xff}
+       },
+       {
+       .description = "l3_fid.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "data",
-       .field_bit_size = 16,
+       .description = "l3_qos.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
-       .field_opr1 = {
-       (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff}
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "strength",
-       .field_bit_size = 2,
+       .description = "l3_ieh_nonext.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-       .field_opr1 = {
-       1}
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
-       /* class_tid: 1, , table: wm.l3.ipv6 */
        {
-       .description = "ctxt_data",
-       .field_bit_size = 14,
+       .description = "l3_ieh_esp.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "meta_prof",
-       .field_bit_size = 3,
+       .description = "l3_ieh_auth.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "opcode",
-       .field_bit_size = 3,
+       .description = "l3_ieh_dest.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "data",
-       .field_bit_size = 16,
+       .description = "l3_ieh_frag.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
-       .field_opr1 = {
-       (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff}
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "strength",
-       .field_bit_size = 2,
+       .description = "l3_ieh_rthdr.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-       .field_opr1 = {
-       1}
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
-       /* class_tid: 1, , table: wm.l2 */
        {
-       .description = "ctxt_data",
-       .field_bit_size = 14,
+       .description = "l3_ieh_hop.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "meta_prof",
-       .field_bit_size = 3,
+       .description = "l3_ieh_1frag.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "opcode",
-       .field_bit_size = 3,
+       .description = "l3_df.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "data",
-       .field_bit_size = 16,
+       .description = "l3_l3err.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l4_l4type.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l4_src.en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_CF,
        .field_opr1 = {
-       (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff}
+       (BNXT_ULP_CF_IDX_I_L4_FB_SRC_PORT >> 8) & 0xff,
+       BNXT_ULP_CF_IDX_I_L4_FB_SRC_PORT & 0xff}
        },
        {
-       .description = "strength",
-       .field_bit_size = 2,
+       .description = "l4_dst.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_src1 = BNXT_ULP_FIELD_SRC_CF,
        .field_opr1 = {
-       1}
+       (BNXT_ULP_CF_IDX_I_L4_FB_DST_PORT >> 8) & 0xff,
+       BNXT_ULP_CF_IDX_I_L4_FB_DST_PORT & 0xff}
        },
-       /* class_tid: 1, , table: wm.l3_l4.vxlan.ipv4 */
        {
-       .description = "ctxt_data",
-       .field_bit_size = 14,
+       .description = "l4_flags.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "meta_prof",
-       .field_bit_size = 3,
+       .description = "l4_seq.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "opcode",
-       .field_bit_size = 3,
+       .description = "l4_ack.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "data",
-       .field_bit_size = 16,
+       .description = "l4_win.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
-       .field_opr1 = {
-       (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff}
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "strength",
-       .field_bit_size = 2,
+       .description = "l4_pa.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-       .field_opr1 = {
-       1}
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
-       /* class_tid: 1, , table: wm.l3_l4.vxlan.ipv6 */
        {
-       .description = "ctxt_data",
-       .field_bit_size = 14,
+       .description = "l4_opt.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "meta_prof",
-       .field_bit_size = 3,
+       .description = "l4_tcpts.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "opcode",
-       .field_bit_size = 3,
+       .description = "l4_tsval.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "data",
-       .field_bit_size = 16,
+       .description = "l4_txecr.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
-       .field_opr1 = {
-       (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff}
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "strength",
-       .field_bit_size = 2,
+       .description = "l4_err.en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-       .field_opr1 = {
-       1}
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
-       /* class_tid: 2, , table: l2_cntxt_tcam.1 */
+       /* class_tid: 2, , table: profile_tcam.f2_l2_l3_l4_v6_em */
        {
-       .description = "prof_func_id",
-       .field_bit_size = 7,
+       .description = "wc_key_id",
+       .field_bit_size = 6,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "ctxt_meta_prof",
-       .field_bit_size = 3,
+       .description = "wc_profile_id",
+       .field_bit_size = 8,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "def_ctxt_data",
-       .field_bit_size = 16,
+       .description = "wc_search_en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "ctxt_opcode",
-       .field_bit_size = 3,
+       .description = "em_key_type",
+       .field_bit_size = 2,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l2_cntxt_id",
-       .field_bit_size = 10,
+       .description = "em_key_id",
+       .field_bit_size = 6,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_EM_KEY_ID_0 >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_EM_KEY_ID_0 & 0xff}
        },
        {
-       .description = "parif",
-       .field_bit_size = 4,
+       .description = "em_profile_id",
+       .field_bit_size = 8,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff}
+       },
+       {
+       .description = "em_search_en",
+       .field_bit_size = 1,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
+       },
+       {
+       .description = "pl_byp_lkup_en",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
-       /* class_tid: 2, , table: tunnel_cache.wr */
+       /* class_tid: 2, , table: profile_tcam_cache.f2_l2_l3_l4_v6_wr */
        {
        .description = "rid",
        .field_bit_size = 32,
@@ -36841,99 +38219,94 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        BNXT_ULP_RF_IDX_RID & 0xff}
        },
        {
-       .description = "l2_cntxt_tcam_index",
+       .description = "profile_tcam_index",
        .field_bit_size = 10,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0 >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0 & 0xff}
        },
        {
-       .description = "l2_cntxt_id",
-       .field_bit_size = 10,
+       .description = "em_profile_id",
+       .field_bit_size = 8,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_RF,
        .field_opr1 = {
-       (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff}
+       (BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff}
        },
-       /* class_tid: 2, , table: l2_cntxt_tcam.0 */
        {
-       .description = "prof_func_id",
-       .field_bit_size = 7,
+       .description = "em_key_id",
+       .field_bit_size = 8,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF,
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
        .field_opr1 = {
-       (BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,
-       BNXT_ULP_GLB_RF_IDX_VXLAN_PROF_FUNC_ID & 0xff}
+       (BNXT_ULP_RF_IDX_EM_KEY_ID_0 >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_EM_KEY_ID_0 & 0xff}
        },
        {
-       .description = "ctxt_meta_prof",
-       .field_bit_size = 3,
+       .description = "wc_profile_id",
+       .field_bit_size = 8,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "def_ctxt_data",
-       .field_bit_size = 16,
+       .description = "wc_key_id",
+       .field_bit_size = 8,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
-       .field_opr1 = {
-       (BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR & 0xff}
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "ctxt_opcode",
-       .field_bit_size = 3,
+       .description = "flow_sig_id",
+       .field_bit_size = 64,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_src1 = BNXT_ULP_FIELD_SRC_CF,
        .field_opr1 = {
-       ULP_THOR_SYM_CTXT_OPCODE_NORMAL_FLOW}
+       (BNXT_ULP_CF_IDX_FLOW_SIG_ID >> 8) & 0xff,
+       BNXT_ULP_CF_IDX_FLOW_SIG_ID & 0xff}
        },
+       /* class_tid: 2, , table: em.f2_l2_l3_l4_v6.0 */
        {
-       .description = "l2_cntxt_id",
-       .field_bit_size = 10,
+       .description = "valid",
+       .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
        .field_opr1 = {
-       (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff}
+       1}
        },
        {
-       .description = "parif",
-       .field_bit_size = 4,
+       .description = "strength",
+       .field_bit_size = 2,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
        .field_opr1 = {
-       (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff,
-       BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff}
+       3}
        },
-       /* class_tid: 2, , table: mac_addr_cache.wr */
        {
-       .description = "rid",
-       .field_bit_size = 32,
+       .description = "data",
+       .field_bit_size = 16,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_RF,
        .field_opr1 = {
-       (BNXT_ULP_RF_IDX_RID >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_RID & 0xff}
+       (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff}
        },
        {
-       .description = "l2_cntxt_tcam_index",
-       .field_bit_size = 10,
+       .description = "opcode",
+       .field_bit_size = 3,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "l2_cntxt_id",
-       .field_bit_size = 10,
+       .description = "meta_prof",
+       .field_bit_size = 3,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
-       .field_opr1 = {
-       (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff}
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
-       .description = "src_property_ptr",
-       .field_bit_size = 10,
+       .description = "ctxt_data",
+       .field_bit_size = 14,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
@@ -37100,9 +38473,7 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "tl3_dip.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-       .field_opr1 = {
-       1}
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
        {
        .description = "tl3_dip_selcmp.en",
@@ -37316,7 +38687,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "l2_smac.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
        },
        {
        .description = "l2_dt.en",
@@ -37400,7 +38773,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "l3_sip.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
        },
        {
        .description = "l3_sip_selcmp.en",
@@ -37432,7 +38807,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "l3_prot.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
        },
        {
        .description = "l3_fid.en",
@@ -37516,13 +38893,17 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "l4_src.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
        },
        {
        .description = "l4_dst.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
        },
        {
        .description = "l4_flags.en",
@@ -37743,127 +39124,6 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .field_opr1 = {
        1}
        },
-       /* class_tid: 2, , table: wm.l3_l4.ipv6 */
-       {
-       .description = "ctxt_data",
-       .field_bit_size = 14,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-       },
-       {
-       .description = "meta_prof",
-       .field_bit_size = 3,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-       },
-       {
-       .description = "opcode",
-       .field_bit_size = 3,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-       },
-       {
-       .description = "data",
-       .field_bit_size = 16,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
-       .field_opr1 = {
-       (BNXT_ULP_RF_IDX_MAIN_ACTION_PTR >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_MAIN_ACTION_PTR & 0xff}
-       },
-       {
-       .description = "strength",
-       .field_bit_size = 2,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-       .field_opr1 = {
-       1}
-       },
-       /* class_tid: 3, , table: l2_cntxt_tcam.0 */
-       {
-       .description = "prof_func_id",
-       .field_bit_size = 7,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF,
-       .field_opr1 = {
-       (BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID >> 8) & 0xff,
-       BNXT_ULP_GLB_RF_IDX_L2_PROF_FUNC_ID & 0xff}
-       },
-       {
-       .description = "ctxt_meta_prof",
-       .field_bit_size = 3,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-       },
-       {
-       .description = "def_ctxt_data",
-       .field_bit_size = 16,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
-       .field_opr1 = {
-       (BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR & 0xff}
-       },
-       {
-       .description = "ctxt_opcode",
-       .field_bit_size = 3,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
-       .field_opr1 = {
-       ULP_THOR_SYM_CTXT_OPCODE_NORMAL_FLOW}
-       },
-       {
-       .description = "l2_cntxt_id",
-       .field_bit_size = 10,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
-       .field_opr1 = {
-       (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff}
-       },
-       {
-       .description = "parif",
-       .field_bit_size = 4,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_CF,
-       .field_opr1 = {
-       (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff,
-       BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff}
-       },
-       /* class_tid: 3, , table: mac_addr_cache.wr */
-       {
-       .description = "rid",
-       .field_bit_size = 32,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
-       .field_opr1 = {
-       (BNXT_ULP_RF_IDX_RID >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_RID & 0xff}
-       },
-       {
-       .description = "l2_cntxt_tcam_index",
-       .field_bit_size = 10,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
-       .field_opr1 = {
-       (BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0 >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0 & 0xff}
-       },
-       {
-       .description = "l2_cntxt_id",
-       .field_bit_size = 10,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
-       .field_opr1 = {
-       (BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 >> 8) & 0xff,
-       BNXT_ULP_RF_IDX_L2_CNTXT_ID_0 & 0xff}
-       },
-       {
-       .description = "src_property_ptr",
-       .field_bit_size = 10,
-       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
-       },
        /* class_tid: 3, , table: fkb_select.l2_l3_l4_v6_em */
        {
        .description = "l2_cntxt_id.en",
@@ -38240,7 +39500,10 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "l2_smac.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT,
+       .field_opr1 = {
+       (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff,
+       BNXT_ULP_GLB_HF_ID_O_ETH_SMAC & 0xff}
        },
        {
        .description = "l2_dt.en",
@@ -38374,7 +39637,10 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "l3_prot.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+       .field_opr1 = {
+       (BNXT_ULP_CF_IDX_O_L3_FB_PROTO_ID >> 8) & 0xff,
+       BNXT_ULP_CF_IDX_O_L3_FB_PROTO_ID & 0xff}
        },
        {
        .description = "l3_fid.en",
@@ -39066,7 +40332,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "l2_smac.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
        },
        {
        .description = "l2_dt.en",
@@ -39186,7 +40454,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "l3_prot.en",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
        },
        {
        .description = "l3_fid.en",
@@ -39663,7 +40933,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "stats_op",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
        },
        {
        .description = "stats_ptr",
@@ -39910,7 +41182,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "stats_op",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
        },
        {
        .description = "stats_ptr",
@@ -40050,7 +41324,10 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "parif",
        .field_bit_size = 4,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+       .field_opr1 = {
+       (BNXT_ULP_CF_IDX_DRV_FUNC_PARIF >> 8) & 0xff,
+       BNXT_ULP_CF_IDX_DRV_FUNC_PARIF & 0xff}
        },
        {
        .description = "reserved",
@@ -40238,7 +41515,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "stats_op",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
        },
        {
        .description = "stats_ptr",
@@ -40299,6 +41578,43 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .field_opr1 = {
        1}
        },
+       /* class_tid: 5, , table: port_table.egr_wr */
+       {
+       .description = "rid",
+       .field_bit_size = 32,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "drv_func.mac",
+       .field_bit_size = 48,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "drv_func.parent.mac",
+       .field_bit_size = 48,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_DRV_FUNC_PARENT_MAC >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_DRV_FUNC_PARENT_MAC & 0xff}
+       },
+       {
+       .description = "phy_port",
+       .field_bit_size = 8,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "default_arec_ptr",
+       .field_bit_size = 16,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF,
+       .field_opr1 = {
+       (BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR >> 8) & 0xff,
+       BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR & 0xff}
+       },
        /* class_tid: 5, , table: l2_cntxt_tcam.vf_egr */
        {
        .description = "prof_func_id",
@@ -40450,7 +41766,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "stats_op",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
        },
        {
        .description = "stats_ptr",
@@ -40610,7 +41928,10 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "parif",
        .field_bit_size = 4,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+       .field_opr1 = {
+       (BNXT_ULP_CF_IDX_DRV_FUNC_PARIF >> 8) & 0xff,
+       BNXT_ULP_CF_IDX_DRV_FUNC_PARIF & 0xff}
        },
        {
        .description = "reserved",
@@ -40970,7 +42291,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "stats_op",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
        },
        {
        .description = "stats_ptr",
@@ -41772,6 +43095,34 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
        .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
        },
+       /* class_tid: 5, , table: l2_cntxt_tcam_cache.ing_wr_vfr */
+       {
+       .description = "rid",
+       .field_bit_size = 32,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_RF,
+       .field_opr1 = {
+       (BNXT_ULP_RF_IDX_RID >> 8) & 0xff,
+       BNXT_ULP_RF_IDX_RID & 0xff}
+       },
+       {
+       .description = "l2_cntxt_tcam_index",
+       .field_bit_size = 10,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "l2_cntxt_id",
+       .field_bit_size = 10,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
+       {
+       .description = "src_property_ptr",
+       .field_bit_size = 10,
+       .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
+       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       },
        /* class_tid: 5, , table: int_full_act_record.vfr_ing0 */
        {
        .description = "sp_rec_ptr",
@@ -41819,7 +43170,9 @@ struct bnxt_ulp_mapper_field_info ulp_thor_class_result_field_list[] = {
        .description = "stats_op",
        .field_bit_size = 1,
        .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
-       .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+       .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+       .field_opr1 = {
+       1}
        },
        {
        .description = "stats_ptr",
@@ -42058,7 +43411,13 @@ struct bnxt_ulp_mapper_ident_info ulp_thor_class_ident_list[] = {
        .ident_bit_size = 10,
        .ident_bit_pos = 42
        },
-       /* class_tid: 2, , table: profile_tcam_cache.f2_rd */
+       /* class_tid: 2, , table: profile_tcam_cache.f2_ipv6_rd */
+       {
+       .description = "em_key_id",
+       .regfile_idx = BNXT_ULP_RF_IDX_EM_KEY_ID_0,
+       .ident_bit_size = 8,
+       .ident_bit_pos = 50
+       },
        {
        .description = "em_profile_id",
        .regfile_idx = BNXT_ULP_RF_IDX_EM_PROFILE_ID_0,
@@ -42077,47 +43436,40 @@ struct bnxt_ulp_mapper_ident_info ulp_thor_class_ident_list[] = {
        .ident_bit_size = 10,
        .ident_bit_pos = 32
        },
-       /* class_tid: 3, , table: l2_cntxt_tcam_cache.rd */
+       /* class_tid: 2, , table: profile_tcam.f2_l2_l3_l4_v6_em */
        {
-       .description = "l2_cntxt_id",
-       .regfile_idx = BNXT_ULP_RF_IDX_L2_CNTXT_ID_0,
-       .ident_bit_size = 10,
-       .ident_bit_pos = 42
+       .description = "em_profile_id",
+       .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+       .ident_type = TF_IDENT_TYPE_EM_PROF,
+       .regfile_idx = BNXT_ULP_RF_IDX_EM_PROFILE_ID_0,
+       .ident_bit_size = 8,
+       .ident_bit_pos = 23
        },
-       /* class_tid: 3, , table: mac_addr_cache.rd */
+       /* class_tid: 2, , table: profile_tcam_cache.f2_rd */
        {
-       .description = "l2_cntxt_id",
-       .regfile_idx = BNXT_ULP_RF_IDX_L2_CNTXT_ID_0,
-       .ident_bit_size = 10,
+       .description = "em_profile_id",
+       .regfile_idx = BNXT_ULP_RF_IDX_EM_PROFILE_ID_0,
+       .ident_bit_size = 8,
        .ident_bit_pos = 42
        },
-       /* class_tid: 3, , table: port_table.egr.rd */
-       {
-       .description = "default_arec_ptr",
-       .regfile_idx = BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR,
-       .ident_bit_size = 16,
-       .ident_bit_pos = 136
-       },
        {
-       .description = "drv_func.parent.mac",
-       .regfile_idx = BNXT_ULP_RF_IDX_DRV_FUNC_PARENT_MAC,
-       .ident_bit_size = 48,
-       .ident_bit_pos = 80
+       .description = "flow_sig_id",
+       .regfile_idx = BNXT_ULP_RF_IDX_FLOW_SIG_ID,
+       .ident_bit_size = 64,
+       .ident_bit_pos = 74
        },
        {
-       .description = "phy_port",
-       .regfile_idx = BNXT_ULP_RF_IDX_PHY_PORT,
-       .ident_bit_size = 8,
-       .ident_bit_pos = 128
+       .description = "profile_tcam_index",
+       .regfile_idx = BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0,
+       .ident_bit_size = 10,
+       .ident_bit_pos = 32
        },
-       /* class_tid: 3, , table: l2_cntxt_tcam.0 */
+       /* class_tid: 3, , table: l2_cntxt_tcam_cache.rd */
        {
        .description = "l2_cntxt_id",
-       .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
-       .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH,
        .regfile_idx = BNXT_ULP_RF_IDX_L2_CNTXT_ID_0,
        .ident_bit_size = 10,
-       .ident_bit_pos = 29
+       .ident_bit_pos = 42
        },
        /* class_tid: 3, , table: profile_tcam_cache.ipv6_rd */
        {
@@ -42168,36 +43520,29 @@ struct bnxt_ulp_mapper_ident_info ulp_thor_class_ident_list[] = {
        },
        /* class_tid: 4, , table: l2_cntxt_tcam.ing_0 */
        {
-       .description = "l2_cntxt_id",
+       .description = "l2_cntxt_id_low",
        .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
-       .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH,
+       .ident_type = TF_IDENT_TYPE_L2_CTXT_LOW,
        .regfile_idx = BNXT_ULP_RF_IDX_L2_CNTXT_ID_0,
        .ident_bit_size = 10,
        .ident_bit_pos = 29
        },
        /* class_tid: 4, , table: l2_cntxt_tcam.egr_0 */
        {
-       .description = "l2_cntxt_id",
+       .description = "l2_cntxt_id_low",
        .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
-       .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH,
+       .ident_type = TF_IDENT_TYPE_L2_CTXT_LOW,
        .regfile_idx = BNXT_ULP_RF_IDX_L2_CNTXT_ID_0,
        .ident_bit_size = 10,
        .ident_bit_pos = 29
        },
        /* class_tid: 5, , table: l2_cntxt_tcam.vf_egr */
        {
-       .description = "l2_cntxt_id",
+       .description = "l2_cntxt_id_low",
        .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
-       .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH,
+       .ident_type = TF_IDENT_TYPE_L2_CTXT_LOW,
        .regfile_idx = BNXT_ULP_RF_IDX_L2_CNTXT_ID_0,
        .ident_bit_size = 10,
        .ident_bit_pos = 29
-       },
-       /* class_tid: 5, , table: l2_cntxt_tcam_cache.ing_wr_vfr */
-       {
-       .description = "rid",
-       .regfile_idx = BNXT_ULP_RF_IDX_RID,
-       .ident_bit_size = 32,
-       .ident_bit_pos = 0
        }
 };

diff --git a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_wh_plus_class.c b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_wh_plus_class.c
index 2870a06..4b9cb7f 100644 (file)
--- a/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_wh_plus_class.c
+++ b/drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_wh_plus_class.c
@@ -3,7 +3,7 @@
  * All rights reserved.
  */
 
-/* date: Wed Jun 30 14:36:16 2021 */
+/* date: Wed Aug 11 16:00:16 2021 */
 
 #include "ulp_template_db_enum.h"
 #include "ulp_template_db_field.h"
@@ -16741,27 +16741,27 @@ struct bnxt_ulp_mapper_ident_info ulp_wh_plus_class_ident_list[] = {
        },
        /* class_tid: 4, , table: l2_cntxt_tcam.ing_0 */
        {
-       .description = "l2_cntxt_id",
+       .description = "l2_cntxt_id_low",
        .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
-       .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH,
+       .ident_type = TF_IDENT_TYPE_L2_CTXT_LOW,
        .regfile_idx = BNXT_ULP_RF_IDX_L2_CNTXT_ID_0,
        .ident_bit_size = 10,
        .ident_bit_pos = 0
        },
        /* class_tid: 4, , table: l2_cntxt_tcam.egr_0 */
        {
-       .description = "l2_cntxt_id",
+       .description = "l2_cntxt_id_low",
        .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
-       .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH,
+       .ident_type = TF_IDENT_TYPE_L2_CTXT_LOW,
        .regfile_idx = BNXT_ULP_RF_IDX_L2_CNTXT_ID_0,
        .ident_bit_size = 10,
        .ident_bit_pos = 0
        },
        /* class_tid: 5, , table: l2_cntxt_tcam.vf_egr */
        {
-       .description = "l2_cntxt_id",
+       .description = "l2_cntxt_id_low",
        .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
-       .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH,
+       .ident_type = TF_IDENT_TYPE_L2_CTXT_LOW,
        .regfile_idx = BNXT_ULP_RF_IDX_L2_CNTXT_ID_0,
        .ident_bit_size = 10,
        .ident_bit_pos = 0

diff --git a/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.c b/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.c
index c6b2b16..7b6db7a 100644 (file)
--- a/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_gen_tbl.c
@@ -75,9 +75,9 @@ ulp_mapper_generic_tbl_list_init(struct bnxt_ulp_mapper_data *mapper_data)
                        entry->container.byte_data = &entry->mem_data[size];
                        entry->container.byte_order = tbl->result_byte_order;
                } else {
-                       BNXT_TF_DBG(ERR, "%s:Invalid gen table num of ent %d\n",
+                       BNXT_TF_DBG(DEBUG, "%s: Unused Gen tbl entry is %d\n",
                                    tbl->name, idx);
-                       return -EINVAL;
+                       /* return -EINVAL; */
                }
                if (tbl->hash_tbl_entries) {
                        cparams.key_size = tbl->key_num_bytes;

diff --git a/drivers/net/bnxt/tf_ulp/ulp_mapper.c b/drivers/net/bnxt/tf_ulp/ulp_mapper.c
index 234f7ea..059ee99 100644 (file)
--- a/drivers/net/bnxt/tf_ulp/ulp_mapper.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_mapper.c
@@ -438,6 +438,77 @@ ulp_mapper_ident_fields_get(struct bnxt_ulp_mapper_parms *mparms,
        return &dev_tbls->ident_list[idx];
 }
 
+static enum tf_tbl_type
+ulp_mapper_dyn_tbl_type_get(struct bnxt_ulp_mapper_parms *mparms,
+                           struct bnxt_ulp_mapper_tbl_info *tbl,
+                           struct ulp_blob *bdata,
+                           uint16_t *out_len)
+{
+       struct bnxt_ulp_device_params *d_params = mparms->device_params;
+       uint16_t blob_len = ulp_blob_data_len_get(bdata);
+       struct bnxt_ulp_dyn_size_map *size_map;
+       uint32_t i;
+
+       if (d_params->dynamic_sram_en) {
+               switch (tbl->resource_type) {
+               case TF_TBL_TYPE_ACT_ENCAP_8B:
+               case TF_TBL_TYPE_ACT_ENCAP_16B:
+               case TF_TBL_TYPE_ACT_ENCAP_32B:
+               case TF_TBL_TYPE_ACT_ENCAP_64B:
+                       size_map = d_params->dyn_encap_sizes;
+                       for (i = 0; i < d_params->dyn_encap_list_size; i++) {
+                               if (blob_len <= size_map[i].slab_size) {
+                                       *out_len = size_map[i].slab_size;
+                                       return size_map[i].tbl_type;
+                               }
+                       }
+                       break;
+               case TF_TBL_TYPE_ACT_MODIFY_8B:
+               case TF_TBL_TYPE_ACT_MODIFY_16B:
+               case TF_TBL_TYPE_ACT_MODIFY_32B:
+               case TF_TBL_TYPE_ACT_MODIFY_64B:
+                       size_map = d_params->dyn_modify_sizes;
+                       for (i = 0; i < d_params->dyn_modify_list_size; i++) {
+                               if (blob_len <= size_map[i].slab_size) {
+                                       *out_len = size_map[i].slab_size;
+                                       return size_map[i].tbl_type;
+                               }
+                       }
+                       break;
+               default:
+                       break;
+               }
+       }
+       return tbl->resource_type;
+}
+
+static uint16_t
+ulp_mapper_dyn_blob_size_get(struct bnxt_ulp_mapper_parms *mparms,
+                            struct bnxt_ulp_mapper_tbl_info *tbl)
+{
+       struct bnxt_ulp_device_params *d_params = mparms->device_params;
+
+       if (d_params->dynamic_sram_en) {
+               switch (tbl->resource_type) {
+               case TF_TBL_TYPE_ACT_ENCAP_8B:
+               case TF_TBL_TYPE_ACT_ENCAP_16B:
+               case TF_TBL_TYPE_ACT_ENCAP_32B:
+               case TF_TBL_TYPE_ACT_ENCAP_64B:
+               case TF_TBL_TYPE_ACT_MODIFY_8B:
+               case TF_TBL_TYPE_ACT_MODIFY_16B:
+               case TF_TBL_TYPE_ACT_MODIFY_32B:
+               case TF_TBL_TYPE_ACT_MODIFY_64B:
+                       /* return max size */
+                       return BNXT_ULP_FLMP_BLOB_SIZE_IN_BITS;
+               default:
+                       break;
+               }
+       } else if (tbl->encap_num_fields) {
+               return BNXT_ULP_FLMP_BLOB_SIZE_IN_BITS;
+       }
+       return tbl->result_bit_size;
+}
+
 static inline int32_t
 ulp_mapper_tcam_entry_free(struct bnxt_ulp_context *ulp,
                           struct tf *tfp,
@@ -1562,7 +1633,8 @@ ulp_mapper_tbl_result_build(struct bnxt_ulp_mapper_parms *parms,
        if (encap_flds) {
                uint32_t pad = 0;
                /* Initialize the encap blob */
-               if (!tbl->record_size) {
+               if (!tbl->record_size &&
+                   !parms->device_params->dynamic_sram_en) {
                        BNXT_TF_DBG(ERR, "Encap tbl record size incorrect\n");
                        return -EINVAL;
                }
@@ -1583,9 +1655,21 @@ ulp_mapper_tbl_result_build(struct bnxt_ulp_mapper_parms *parms,
                        }
                }
                /* add the dynamic pad push */
-               pad = ULP_BYTE_2_BITS(tbl->record_size) -
-                       ulp_blob_data_len_get(&encap_blob);
-               ulp_blob_pad_push(&encap_blob, pad);
+               if (parms->device_params->dynamic_sram_en) {
+                       uint16_t rec_s = ULP_BYTE_2_BITS(tbl->record_size);
+
+                       (void)ulp_mapper_dyn_tbl_type_get(parms, tbl,
+                                                         &encap_blob, &rec_s);
+                       pad = rec_s - ulp_blob_data_len_get(&encap_blob);
+               } else {
+                       pad = ULP_BYTE_2_BITS(tbl->record_size) -
+                               ulp_blob_data_len_get(&encap_blob);
+               }
+               if (ulp_blob_pad_push(&encap_blob, pad) < 0) {
+                       BNXT_TF_DBG(ERR, "encap buffer padding failed\n");
+                       return -EINVAL;
+               }
+
 
                /* perform the 64 bit byte swap */
                ulp_blob_perform_64B_byte_swap(&encap_blob);
@@ -2411,13 +2495,11 @@ ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms,
        bool global = false;
        uint64_t act_rec_size;
        bool shared = false;
+       enum tf_tbl_type tbl_type = tbl->resource_type;
 
        tfp = bnxt_ulp_cntxt_tfp_get(parms->ulp_ctx, tbl->shared_session);
-       /* use the max size if encap is enabled */
-       if (tbl->encap_num_fields)
-               bit_size = BNXT_ULP_FLMP_BLOB_SIZE_IN_BITS;
-       else
-               bit_size = tbl->result_bit_size;
+       /* compute the blob size */
+       bit_size = ulp_mapper_dyn_blob_size_get(parms, tbl);
 
        /* Initialize the blob data */
        if (!ulp_blob_init(&data, bit_size,
@@ -2526,7 +2608,7 @@ ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms,
                gparms.dir = tbl->direction;
                gparms.type = tbl->resource_type;
                gparms.data = ulp_blob_data_get(&data, &tmplen);
-               gparms.data_sz_in_bytes = ULP_BITS_2_BYTE(tbl->result_bit_size);
+               gparms.data_sz_in_bytes = ULP_BITS_2_BYTE(tmplen);
                gparms.idx = index;
                rc = tf_get_tbl_entry(tfp, &gparms);
                if (rc) {
@@ -2568,14 +2650,16 @@ ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms,
 
        if (alloc) {
                aparms.dir              = tbl->direction;
-               aparms.type             = tbl->resource_type;
+               tbl_type = ulp_mapper_dyn_tbl_type_get(parms, tbl,
+                                                      &data, &tmplen);
+               aparms.type = tbl_type;
                aparms.tbl_scope_id     = tbl_scope_id;
 
                /* All failures after the alloc succeeds require a free */
                rc = tf_alloc_tbl_entry(tfp, &aparms);
                if (rc) {
                        BNXT_TF_DBG(ERR, "Alloc table[%s][%s] failed rc=%d\n",
-                                   tf_tbl_type_2_str(tbl->resource_type),
+                                   tf_tbl_type_2_str(aparms.type),
                                    tf_dir_2_str(tbl->direction), rc);
                        return rc;
                }
@@ -2619,8 +2703,10 @@ ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms,
 
        if (write) {
                sparms.dir = tbl->direction;
-               sparms.type = tbl->resource_type;
                sparms.data = ulp_blob_data_get(&data, &tmplen);
+               tbl_type = ulp_mapper_dyn_tbl_type_get(parms, tbl, &data,
+                                                      &tmplen);
+               sparms.type = tbl_type;
                sparms.data_sz_in_bytes = ULP_BITS_2_BYTE(tmplen);
                sparms.idx = index;
                sparms.tbl_scope_id = tbl_scope_id;
@@ -2655,7 +2741,7 @@ ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms,
        memset(&fid_parms, 0, sizeof(fid_parms));
        fid_parms.direction     = tbl->direction;
        fid_parms.resource_func = tbl->resource_func;
-       fid_parms.resource_type = tbl->resource_type;
+       fid_parms.resource_type = tbl_type;
        fid_parms.resource_sub_type = tbl->resource_sub_type;
        fid_parms.resource_hndl = index;
        fid_parms.critical_resource = tbl->critical_resource;
@@ -2684,7 +2770,7 @@ error:
         * write to the entry or link the flow
         */
        free_parms.dir  = tbl->direction;
-       free_parms.type = tbl->resource_type;
+       free_parms.type = tbl_type;
        free_parms.idx  = index;
        free_parms.tbl_scope_id = tbl_scope_id;
 
@@ -2862,8 +2948,7 @@ ulp_mapper_gen_tbl_process(struct bnxt_ulp_mapper_parms *parms,
        cache_key = ulp_blob_data_get(&key, &tmplen);
 #ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG
 #ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG_MAPPER
-       BNXT_TF_DBG(DEBUG, "The gen_tbl[%u] key\n", tbl_idx);
-       ulp_mapper_blob_dump(&key);
+       ulp_mapper_gen_tbl_dump(tbl->resource_sub_type, tbl->direction, &key);
 #endif
 #endif
        /* get the generic table  */
@@ -3310,18 +3395,10 @@ ulp_mapper_cond_opc_process(struct bnxt_ulp_mapper_parms *parms,
                *res = regval == 0;
                break;
        case BNXT_ULP_COND_OPC_FLOW_PAT_MATCH:
-               if (parms->flow_pattern_id == operand) {
-                       BNXT_TF_DBG(ERR, "field pattern match failed %x\n",
-                                   parms->flow_pattern_id);
-                       return -EINVAL;
-               }
+               *res = parms->flow_pattern_id == operand;
                break;
        case BNXT_ULP_COND_OPC_ACT_PAT_MATCH:
-               if (parms->act_pattern_id == operand) {
-                       BNXT_TF_DBG(ERR, "act pattern match failed %x\n",
-                                   parms->act_pattern_id);
-                       return -EINVAL;
-               }
+               *res = parms->act_pattern_id == operand;
                break;
        case BNXT_ULP_COND_OPC_EXT_MEM_IS_SET:
                if (bnxt_ulp_cntxt_mem_type_get(parms->ulp_ctx, &mtype)) {
@@ -3507,7 +3584,6 @@ ulp_mapper_func_info_process(struct bnxt_ulp_mapper_parms *parms,
        return rc;
 }
 
-
 /*
  * Processes a list of conditions and returns both a status and result of the
  * list.  The status must be checked prior to verifying the result.
@@ -3863,8 +3939,7 @@ ulp_mapper_resources_free(struct bnxt_ulp_context *ulp_ctx,
         * Set the critical resource on the first resource del, then iterate
         * while status is good
         */
-       if (flow_type != BNXT_ULP_FDB_TYPE_RID)
-               res_parms.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES;
+       res_parms.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES;
 
        rc = ulp_flow_db_resource_del(ulp_ctx, flow_type, fid, &res_parms);
 

diff --git a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c
index dce95de..3a9c9bb 100644 (file)
--- a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c
@@ -1226,20 +1226,66 @@ ulp_rte_ipv6_hdr_handler(const struct rte_flow_item *item,
 
 /* Function to handle the update of proto header based on field values */
 static void
-ulp_rte_l4_proto_type_update(struct ulp_rte_parser_params *param,
-                            uint16_t dst_port)
-{
-       if (dst_port == tfp_cpu_to_be_16(ULP_UDP_PORT_VXLAN)) {
-               ULP_BITMAP_SET(param->hdr_fp_bit.bits,
-                              BNXT_ULP_HDR_BIT_T_VXLAN);
-               ULP_COMP_FLD_IDX_WR(param, BNXT_ULP_CF_IDX_L3_TUN, 1);
+ulp_rte_l4_proto_type_update(struct ulp_rte_parser_params *params,
+                            uint16_t src_port, uint16_t src_mask,
+                            uint16_t dst_port, uint16_t dst_mask,
+                            enum bnxt_ulp_hdr_bit hdr_bit)
+{
+       switch (hdr_bit) {
+       case BNXT_ULP_HDR_BIT_I_UDP:
+       case BNXT_ULP_HDR_BIT_I_TCP:
+               ULP_BITMAP_SET(params->hdr_bitmap.bits, hdr_bit);
+               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_L4, 1);
+               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_L4_SRC_PORT,
+                                   (uint64_t)rte_be_to_cpu_16(src_port));
+               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_L4_DST_PORT,
+                                   (uint64_t)rte_be_to_cpu_16(dst_port));
+               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_L4_SRC_PORT_MASK,
+                                   (uint64_t)rte_be_to_cpu_16(src_mask));
+               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_L4_DST_PORT_MASK,
+                                   (uint64_t)rte_be_to_cpu_16(dst_mask));
+               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_L3_FB_PROTO_ID,
+                                   1);
+               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_L4_FB_SRC_PORT,
+                                   !!(src_port & src_mask));
+               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_L4_FB_DST_PORT,
+                                   !!(dst_port & dst_mask));
+               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_L3_PROTO_ID,
+                                   (hdr_bit == BNXT_ULP_HDR_BIT_I_UDP) ?
+                                   IPPROTO_UDP : IPPROTO_TCP);
+               break;
+       case BNXT_ULP_HDR_BIT_O_UDP:
+       case BNXT_ULP_HDR_BIT_O_TCP:
+               ULP_BITMAP_SET(params->hdr_bitmap.bits, hdr_bit);
+               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L4, 1);
+               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L4_SRC_PORT,
+                                   (uint64_t)rte_be_to_cpu_16(src_port));
+               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L4_DST_PORT,
+                                   (uint64_t)rte_be_to_cpu_16(dst_port));
+               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L4_SRC_PORT_MASK,
+                                   (uint64_t)rte_be_to_cpu_16(src_mask));
+               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L4_DST_PORT_MASK,
+                                   (uint64_t)rte_be_to_cpu_16(dst_mask));
+               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L3_FB_PROTO_ID,
+                                   1);
+               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L4_FB_SRC_PORT,
+                                   !!(src_port & src_mask));
+               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L4_FB_DST_PORT,
+                                   !!(dst_port & dst_mask));
+               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L3_PROTO_ID,
+                                   (hdr_bit == BNXT_ULP_HDR_BIT_O_UDP) ?
+                                   IPPROTO_UDP : IPPROTO_TCP);
+               break;
+       default:
+               break;
        }
 
-       if (ULP_BITMAP_ISSET(param->hdr_bitmap.bits,
-                            BNXT_ULP_HDR_BIT_T_VXLAN) ||
-           ULP_BITMAP_ISSET(param->hdr_bitmap.bits,
-                            BNXT_ULP_HDR_BIT_T_GRE))
-               ULP_COMP_FLD_IDX_WR(param, BNXT_ULP_CF_IDX_L3_TUN, 1);
+       if (hdr_bit == BNXT_ULP_HDR_BIT_O_UDP && dst_port ==
+           tfp_cpu_to_be_16(ULP_UDP_PORT_VXLAN)) {
+               ULP_BITMAP_SET(params->hdr_fp_bit.bits,
+                              BNXT_ULP_HDR_BIT_T_VXLAN);
+               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_L3_TUN, 1);
+       }
 }
 
 /* Function to handle the parsing of RTE Flow item UDP Header. */
@@ -1253,7 +1299,9 @@ ulp_rte_udp_hdr_handler(const struct rte_flow_item *item,
        uint32_t idx = 0;
        uint32_t size;
        uint16_t dport = 0, sport = 0;
+       uint16_t dport_mask = 0, sport_mask = 0;
        uint32_t cnt;
+       enum bnxt_ulp_hdr_bit out_l4 = BNXT_ULP_HDR_BIT_O_UDP;
 
        cnt = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_L4_HDR_CNT);
        if (cnt == 2) {
@@ -1265,6 +1313,10 @@ ulp_rte_udp_hdr_handler(const struct rte_flow_item *item,
                sport = udp_spec->hdr.src_port;
                dport = udp_spec->hdr.dst_port;
        }
+       if (udp_mask) {
+               sport_mask = udp_mask->hdr.src_port;
+               dport_mask = udp_mask->hdr.dst_port;
+       }
 
        if (ulp_rte_prsr_fld_size_validate(params, &idx,
                                           BNXT_ULP_PROTO_HDR_UDP_NUM)) {
@@ -1302,48 +1354,11 @@ ulp_rte_udp_hdr_handler(const struct rte_flow_item *item,
 
        /* Set the udp header bitmap and computed l4 header bitmaps */
        if (ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_UDP) ||
-           ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_TCP)) {
-               ULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_I_UDP);
-               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_L4, 1);
-               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_L4_SRC_PORT,
-                                   (uint32_t)rte_be_to_cpu_16(sport));
-               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_L4_DST_PORT,
-                                   (uint32_t)rte_be_to_cpu_16(dport));
-               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_L3_FB_PROTO_ID,
-                                   1);
-               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_L3_PROTO_ID,
-                                   IPPROTO_UDP);
-               if (udp_mask && udp_mask->hdr.src_port)
-                       ULP_COMP_FLD_IDX_WR(params,
-                                           BNXT_ULP_CF_IDX_I_L4_FB_SRC_PORT,
-                                           1);
-               if (udp_mask && udp_mask->hdr.dst_port)
-                       ULP_COMP_FLD_IDX_WR(params,
-                                           BNXT_ULP_CF_IDX_I_L4_FB_DST_PORT,
-                                           1);
-       } else {
-               ULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_UDP);
-               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L4, 1);
-               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L4_SRC_PORT,
-                                   (uint32_t)rte_be_to_cpu_16(sport));
-               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L4_DST_PORT,
-                                   (uint32_t)rte_be_to_cpu_16(dport));
-               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L3_FB_PROTO_ID,
-                                   1);
-               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L3_PROTO_ID,
-                                   IPPROTO_UDP);
-               if (udp_mask && udp_mask->hdr.src_port)
-                       ULP_COMP_FLD_IDX_WR(params,
-                                           BNXT_ULP_CF_IDX_O_L4_FB_SRC_PORT,
-                                           1);
-               if (udp_mask && udp_mask->hdr.dst_port)
-                       ULP_COMP_FLD_IDX_WR(params,
-                                           BNXT_ULP_CF_IDX_O_L4_FB_DST_PORT,
-                                           1);
+           ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_TCP))
+               out_l4 = BNXT_ULP_HDR_BIT_I_UDP;
 
-               /* Update the field protocol hdr bitmap */
-               ulp_rte_l4_proto_type_update(params, dport);
-       }
+       ulp_rte_l4_proto_type_update(params, sport, sport_mask, dport,
+                                    dport_mask, out_l4);
        ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_L4_HDR_CNT, ++cnt);
        return BNXT_TF_RC_SUCCESS;
 }
@@ -1358,8 +1373,10 @@ ulp_rte_tcp_hdr_handler(const struct rte_flow_item *item,
        struct ulp_rte_hdr_bitmap *hdr_bitmap = &params->hdr_bitmap;
        uint32_t idx = 0;
        uint16_t dport = 0, sport = 0;
+       uint16_t dport_mask = 0, sport_mask = 0;
        uint32_t size;
        uint32_t cnt;
+       enum bnxt_ulp_hdr_bit out_l4 = BNXT_ULP_HDR_BIT_O_TCP;
 
        cnt = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_L4_HDR_CNT);
        if (cnt == 2) {
@@ -1371,6 +1388,10 @@ ulp_rte_tcp_hdr_handler(const struct rte_flow_item *item,
                sport = tcp_spec->hdr.src_port;
                dport = tcp_spec->hdr.dst_port;
        }
+       if (tcp_mask) {
+               sport_mask = tcp_mask->hdr.src_port;
+               dport_mask = tcp_mask->hdr.dst_port;
+       }
 
        if (ulp_rte_prsr_fld_size_validate(params, &idx,
                                           BNXT_ULP_PROTO_HDR_TCP_NUM)) {
@@ -1438,45 +1459,11 @@ ulp_rte_tcp_hdr_handler(const struct rte_flow_item *item,
 
        /* Set the udp header bitmap and computed l4 header bitmaps */
        if (ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_UDP) ||
-           ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_TCP)) {
-               ULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_I_TCP);
-               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_L4, 1);
-               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_L4_SRC_PORT,
-                                   (uint32_t)rte_be_to_cpu_16(sport));
-               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_L4_DST_PORT,
-                                   (uint32_t)rte_be_to_cpu_16(dport));
-               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_L3_FB_PROTO_ID,
-                                   1);
-               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_L3_PROTO_ID,
-                                   IPPROTO_TCP);
-               if (tcp_mask && tcp_mask->hdr.src_port)
-                       ULP_COMP_FLD_IDX_WR(params,
-                                           BNXT_ULP_CF_IDX_I_L4_FB_SRC_PORT,
-                                           1);
-               if (tcp_mask && tcp_mask->hdr.dst_port)
-                       ULP_COMP_FLD_IDX_WR(params,
-                                           BNXT_ULP_CF_IDX_I_L4_FB_DST_PORT,
-                                           1);
-       } else {
-               ULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_TCP);
-               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L4, 1);
-               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L4_SRC_PORT,
-                                   (uint32_t)rte_be_to_cpu_16(sport));
-               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L4_DST_PORT,
-                                   (uint32_t)rte_be_to_cpu_16(dport));
-               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L3_FB_PROTO_ID,
-                                   1);
-               ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_L3_PROTO_ID,
-                                   IPPROTO_TCP);
-               if (tcp_mask && tcp_mask->hdr.src_port)
-                       ULP_COMP_FLD_IDX_WR(params,
-                                           BNXT_ULP_CF_IDX_O_L4_FB_SRC_PORT,
-                                           1);
-               if (tcp_mask && tcp_mask->hdr.dst_port)
-                       ULP_COMP_FLD_IDX_WR(params,
-                                           BNXT_ULP_CF_IDX_O_L4_FB_DST_PORT,
-                                           1);
-       }
+           ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_TCP))
+               out_l4 = BNXT_ULP_HDR_BIT_I_TCP;
+
+       ulp_rte_l4_proto_type_update(params, sport, sport_mask, dport,
+                                    dport_mask, out_l4);
        ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_L4_HDR_CNT, ++cnt);
        return BNXT_TF_RC_SUCCESS;
 }
@@ -1528,7 +1515,7 @@ ulp_rte_vxlan_hdr_handler(const struct rte_flow_item *item,
 
        /* Update the hdr_bitmap with vxlan */
        ULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_T_VXLAN);
-       ulp_rte_l4_proto_type_update(params, 0);
+       ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_L3_TUN, 1);
        return BNXT_TF_RC_SUCCESS;
 }
 
@@ -1563,7 +1550,7 @@ ulp_rte_gre_hdr_handler(const struct rte_flow_item *item,
 
        /* Update the hdr_bitmap with GRE */
        ULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_T_GRE);
-       ulp_rte_l4_proto_type_update(params, 0);
+       ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_L3_TUN, 1);
        return BNXT_TF_RC_SUCCESS;
 }
 

diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_struct.h b/drivers/net/bnxt/tf_ulp/ulp_template_struct.h
index 1683cd7..d3bfb8c 100644 (file)
--- a/drivers/net/bnxt/tf_ulp/ulp_template_struct.h
+++ b/drivers/net/bnxt/tf_ulp/ulp_template_struct.h
@@ -206,6 +206,11 @@ struct bnxt_ulp_template_device_tbls {
        uint32_t cond_list_size;
 };
 
+struct bnxt_ulp_dyn_size_map {
+       uint32_t                slab_size;
+       enum tf_tbl_type        tbl_type;
+};
+
 /* Device specific parameters */
 struct bnxt_ulp_device_params {
        uint8_t                         description[16];
@@ -229,6 +234,11 @@ struct bnxt_ulp_device_params {
        uint32_t                        byte_count_shift;
        uint32_t                        packet_count_shift;
        uint32_t                        dynamic_pad_en;
+       uint32_t                        dynamic_sram_en;
+       uint32_t                        dyn_encap_list_size;
+       struct bnxt_ulp_dyn_size_map    dyn_encap_sizes[4];
+       uint32_t                        dyn_modify_list_size;
+       struct bnxt_ulp_dyn_size_map    dyn_modify_sizes[4];
        uint16_t                        em_blk_size_bits;
        uint16_t                        em_blk_align_bits;
        uint16_t                        em_key_align_bytes;

diff --git a/drivers/net/bnxt/tf_ulp/ulp_utils.c b/drivers/net/bnxt/tf_ulp/ulp_utils.c
index 686b80e..df3afaa 100644 (file)
--- a/drivers/net/bnxt/tf_ulp/ulp_utils.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_utils.c
@@ -882,7 +882,8 @@ ulp_blob_msb_block_merge(struct ulp_blob *dst, struct ulp_blob *src,
 
        for (i = 0; i < num;) {
                if (((dst->write_idx % block_size)  + (num - i)) > block_size)
-                       write_bytes = block_size - dst->write_idx;
+                       write_bytes = block_size -
+                               (dst->write_idx % block_size);
                else
                        write_bytes = num - i;
                for (k = 0; k < ULP_BITS_2_BYTE_NR(write_bytes); k++) {