]> git.droids-corp.org - dpdk.git/commitdiff
net/ice/base: add method to disable FDIR swap option
authorJunfeng Guo <junfeng.guo@intel.com>
Wed, 3 Nov 2021 04:40:00 +0000 (12:40 +0800)
committerQi Zhang <qi.z.zhang@intel.com>
Wed, 3 Nov 2021 12:00:06 +0000 (13:00 +0100)
In this patch, we introduced a new parameter to enable/disable the
FDIR SWAP option by setting the swap and inset register set with
certain values.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
drivers/net/ice/base/ice_flex_pipe.c
drivers/net/ice/base/ice_flex_pipe.h
drivers/net/ice/base/ice_flow.c

index f35d59f4f58e7bef0fa25041b4d5ffc4c9fbf5c6..06a233990fa4e8b0a09b33a650dbac08da1135a7 100644 (file)
@@ -4952,6 +4952,43 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,
        return ICE_SUCCESS;
 }
 
+/**
+ * ice_disable_fd_swap - set register appropriately to disable FD swap
+ * @hw: pointer to the HW struct
+ * @prof_id: profile ID
+ */
+void ice_disable_fd_swap(struct ice_hw *hw, u16 prof_id)
+{
+       u8 swap_val = ICE_SWAP_VALID;
+       u8 i;
+       /* Since the SWAP Flag in the Programming Desc doesn't work,
+        * here add method to disable the SWAP Option via setting
+        * certain SWAP and INSET register set.
+        */
+       for (i = 0; i < hw->blk[ICE_BLK_FD].es.fvw / 4; i++) {
+               u32 raw_swap = 0;
+               u32 raw_in = 0;
+               u8 j;
+
+               for (j = 0; j < 4; j++) {
+                       raw_swap |= (swap_val++) << (j * BITS_PER_BYTE);
+                       raw_in |= ICE_INSET_DFLT << (j * BITS_PER_BYTE);
+               }
+
+               /* write the FDIR swap register set */
+               wr32(hw, GLQF_FDSWAP(prof_id, i), raw_swap);
+
+               ice_debug(hw, ICE_DBG_INIT, "swap wr(%d, %d): %x = %08x\n",
+                               prof_id, i, GLQF_FDSWAP(prof_id, i), raw_swap);
+
+               /* write the FDIR inset register set */
+               wr32(hw, GLQF_FDINSET(prof_id, i), raw_in);
+
+               ice_debug(hw, ICE_DBG_INIT, "inset wr(%d, %d): %x = %08x\n",
+                               prof_id, i, GLQF_FDINSET(prof_id, i), raw_in);
+       }
+}
+
 /**
  * ice_add_prof - add profile
  * @hw: pointer to the HW struct
@@ -4962,6 +4999,7 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,
  * @attr_cnt: number of elements in attrib array
  * @es: extraction sequence (length of array is determined by the block)
  * @masks: mask for extraction sequence
+ * @fd_swap: enable/disable FDIR paired src/dst fields swap option
  *
  * This function registers a profile, which matches a set of PTYPES with a
  * particular extraction sequence. While the hardware profile is allocated
@@ -4971,7 +5009,7 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,
 enum ice_status
 ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
             const struct ice_ptype_attributes *attr, u16 attr_cnt,
-            struct ice_fv_word *es, u16 *masks)
+            struct ice_fv_word *es, u16 *masks, bool fd_swap)
 {
        u32 bytes = DIVIDE_AND_ROUND_UP(ICE_FLOW_PTYPE_MAX, BITS_PER_BYTE);
        ice_declare_bitmap(ptgs_used, ICE_XLT1_CNT);
@@ -4991,7 +5029,7 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
                status = ice_alloc_prof_id(hw, blk, &prof_id);
                if (status)
                        goto err_ice_add_prof;
-               if (blk == ICE_BLK_FD) {
+               if (blk == ICE_BLK_FD && fd_swap) {
                        /* For Flow Director block, the extraction sequence may
                         * need to be altered in the case where there are paired
                         * fields that have no match. This is necessary because
@@ -5002,6 +5040,8 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
                        status = ice_update_fd_swap(hw, prof_id, es);
                        if (status)
                                goto err_ice_add_prof;
+               } else if (blk == ICE_BLK_FD) {
+                       ice_disable_fd_swap(hw, prof_id);
                }
                status = ice_update_prof_masking(hw, blk, prof_id, masks);
                if (status)
index 9733c4b214b5917252918f9d56e175ca9dd2c6a6..dd332312ddafea35d9e4c71a0fd9b1ec375912fa 100644 (file)
@@ -61,10 +61,11 @@ bool ice_hw_ptype_ena(struct ice_hw *hw, u16 ptype);
 /* XLT2/VSI group functions */
 enum ice_status
 ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig);
+void ice_disable_fd_swap(struct ice_hw *hw, u16 prof_id);
 enum ice_status
 ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
             const struct ice_ptype_attributes *attr, u16 attr_cnt,
-            struct ice_fv_word *es, u16 *masks);
+            struct ice_fv_word *es, u16 *masks, bool fd_swap);
 void ice_init_all_prof_masks(struct ice_hw *hw);
 void ice_shutdown_all_prof_masks(struct ice_hw *hw);
 struct ice_prof_map *
index 96d54b494d4e291e0c72ef2550b3c22be2f7b719..77b6b130c1ec68ac5ba46a91ffbb5ea326a7f8c5 100644 (file)
@@ -2244,7 +2244,7 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,
        /* Add a HW profile for this flow profile */
        status = ice_add_prof(hw, blk, prof_id, (u8 *)params->ptypes,
                              params->attr, params->attr_cnt, params->es,
-                             params->mask);
+                             params->mask, true);
        if (status) {
                ice_debug(hw, ICE_DBG_FLOW, "Error adding a HW flow profile\n");
                goto out;