net/ixgbe: support adding TM node
authorWenzhuo Lu <wenzhuo.lu@intel.com>
Thu, 29 Jun 2017 04:23:52 +0000 (12:23 +0800)
committerCristian Dumitrescu <cristian.dumitrescu@intel.com>
Tue, 11 Jul 2017 18:07:14 +0000 (20:07 +0200)
Add the support of the Traffic Management API,
rte_tm_node_add.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
drivers/net/ixgbe/ixgbe_ethdev.c
drivers/net/ixgbe/ixgbe_ethdev.h
drivers/net/ixgbe/ixgbe_tm.c

index bf74c64..3e6105c 100644 (file)
@@ -2715,6 +2715,8 @@ ixgbe_dev_stop(struct rte_eth_dev *dev)
        struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
        struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
        int vf;
+       struct ixgbe_tm_conf *tm_conf =
+               IXGBE_DEV_PRIVATE_TO_TM_CONF(dev->data->dev_private);
 
        PMD_INIT_FUNC_TRACE();
 
@@ -2761,6 +2763,9 @@ ixgbe_dev_stop(struct rte_eth_dev *dev)
                rte_free(intr_handle->intr_vec);
                intr_handle->intr_vec = NULL;
        }
+
+       /* reset hierarchy commit */
+       tm_conf->committed = false;
 }
 
 /*
index 064d427..2082048 100644 (file)
@@ -447,9 +447,56 @@ struct ixgbe_tm_shaper_profile {
 
 TAILQ_HEAD(ixgbe_shaper_profile_list, ixgbe_tm_shaper_profile);
 
+/* node type of Traffic Manager */
+enum ixgbe_tm_node_type {
+       IXGBE_TM_NODE_TYPE_PORT,
+       IXGBE_TM_NODE_TYPE_TC,
+       IXGBE_TM_NODE_TYPE_QUEUE,
+       IXGBE_TM_NODE_TYPE_MAX,
+};
+
+/* Struct to store Traffic Manager node configuration. */
+struct ixgbe_tm_node {
+       TAILQ_ENTRY(ixgbe_tm_node) node;
+       uint32_t id;
+       uint32_t priority;
+       uint32_t weight;
+       uint32_t reference_count;
+       uint16_t no;
+       struct ixgbe_tm_node *parent;
+       struct ixgbe_tm_shaper_profile *shaper_profile;
+       struct rte_tm_node_params params;
+};
+
+TAILQ_HEAD(ixgbe_tm_node_list, ixgbe_tm_node);
+
 /* The configuration of Traffic Manager */
 struct ixgbe_tm_conf {
        struct ixgbe_shaper_profile_list shaper_profile_list;
+       struct ixgbe_tm_node *root; /* root node - port */
+       struct ixgbe_tm_node_list tc_list; /* node list for all the TCs */
+       struct ixgbe_tm_node_list queue_list; /* node list for all the queues */
+       /**
+        * The number of added TC nodes.
+        * It should be no more than the TC number of this port.
+        */
+       uint32_t nb_tc_node;
+       /**
+        * The number of added queue nodes.
+        * It should be no more than the queue number of this port.
+        */
+       uint32_t nb_queue_node;
+       /**
+        * This flag is used to check if APP can change the TM node
+        * configuration.
+        * When it's true, means the configuration is applied to HW,
+        * APP should not change the configuration.
+        * As we don't support on-the-fly configuration, when starting
+        * the port, APP should call the hierarchy_commit API to set this
+        * flag to true. When stopping the port, this flag should be set
+        * to false.
+        */
+       bool committed;
 };
 
 /*
index 628cf13..ab0df75 100644 (file)
@@ -45,11 +45,17 @@ static int ixgbe_shaper_profile_add(struct rte_eth_dev *dev,
 static int ixgbe_shaper_profile_del(struct rte_eth_dev *dev,
                                    uint32_t shaper_profile_id,
                                    struct rte_tm_error *error);
+static int ixgbe_node_add(struct rte_eth_dev *dev, uint32_t node_id,
+                         uint32_t parent_node_id, uint32_t priority,
+                         uint32_t weight, uint32_t level_id,
+                         struct rte_tm_node_params *params,
+                         struct rte_tm_error *error);
 
 const struct rte_tm_ops ixgbe_tm_ops = {
        .capabilities_get = ixgbe_tm_capabilities_get,
        .shaper_profile_add = ixgbe_shaper_profile_add,
        .shaper_profile_delete = ixgbe_shaper_profile_del,
+       .node_add = ixgbe_node_add,
 };
 
 int
@@ -72,6 +78,14 @@ ixgbe_tm_conf_init(struct rte_eth_dev *dev)
 
        /* initialize shaper profile list */
        TAILQ_INIT(&tm_conf->shaper_profile_list);
+
+       /* initialize node configuration */
+       tm_conf->root = NULL;
+       TAILQ_INIT(&tm_conf->queue_list);
+       TAILQ_INIT(&tm_conf->tc_list);
+       tm_conf->nb_tc_node = 0;
+       tm_conf->nb_queue_node = 0;
+       tm_conf->committed = false;
 }
 
 void
@@ -80,6 +94,23 @@ ixgbe_tm_conf_uninit(struct rte_eth_dev *dev)
        struct ixgbe_tm_conf *tm_conf =
                IXGBE_DEV_PRIVATE_TO_TM_CONF(dev->data->dev_private);
        struct ixgbe_tm_shaper_profile *shaper_profile;
+       struct ixgbe_tm_node *tm_node;
+
+       /* clear node configuration */
+       while ((tm_node = TAILQ_FIRST(&tm_conf->queue_list))) {
+               TAILQ_REMOVE(&tm_conf->queue_list, tm_node, node);
+               rte_free(tm_node);
+       }
+       tm_conf->nb_queue_node = 0;
+       while ((tm_node = TAILQ_FIRST(&tm_conf->tc_list))) {
+               TAILQ_REMOVE(&tm_conf->tc_list, tm_node, node);
+               rte_free(tm_node);
+       }
+       tm_conf->nb_tc_node = 0;
+       if (tm_conf->root) {
+               rte_free(tm_conf->root);
+               tm_conf->root = NULL;
+       }
 
        /* Remove all shaper profiles */
        while ((shaper_profile =
@@ -301,3 +332,408 @@ ixgbe_shaper_profile_del(struct rte_eth_dev *dev,
 
        return 0;
 }
+
+static inline struct ixgbe_tm_node *
+ixgbe_tm_node_search(struct rte_eth_dev *dev, uint32_t node_id,
+                    enum ixgbe_tm_node_type *node_type)
+{
+       struct ixgbe_tm_conf *tm_conf =
+               IXGBE_DEV_PRIVATE_TO_TM_CONF(dev->data->dev_private);
+       struct ixgbe_tm_node *tm_node;
+
+       if (tm_conf->root && tm_conf->root->id == node_id) {
+               *node_type = IXGBE_TM_NODE_TYPE_PORT;
+               return tm_conf->root;
+       }
+
+       TAILQ_FOREACH(tm_node, &tm_conf->tc_list, node) {
+               if (tm_node->id == node_id) {
+                       *node_type = IXGBE_TM_NODE_TYPE_TC;
+                       return tm_node;
+               }
+       }
+
+       TAILQ_FOREACH(tm_node, &tm_conf->queue_list, node) {
+               if (tm_node->id == node_id) {
+                       *node_type = IXGBE_TM_NODE_TYPE_QUEUE;
+                       return tm_node;
+               }
+       }
+
+       return NULL;
+}
+
+static void
+ixgbe_queue_base_nb_get(struct rte_eth_dev *dev, uint16_t tc_node_no,
+                       uint16_t *base, uint16_t *nb)
+{
+       uint8_t nb_tcs = ixgbe_tc_nb_get(dev);
+       struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
+       uint16_t vf_num = pci_dev->max_vfs;
+
+       *base = 0;
+       *nb = 0;
+
+       /* VT on */
+       if (vf_num) {
+               /* no DCB */
+               if (nb_tcs == 1) {
+                       if (vf_num >= ETH_32_POOLS) {
+                               *nb = 2;
+                               *base = vf_num * 2;
+                       } else if (vf_num >= ETH_16_POOLS) {
+                               *nb = 4;
+                               *base = vf_num * 4;
+                       } else {
+                               *nb = 8;
+                               *base = vf_num * 8;
+                       }
+               } else {
+                       /* DCB */
+                       *nb = 1;
+                       *base = vf_num * nb_tcs + tc_node_no;
+               }
+       } else {
+               /* VT off */
+               if (nb_tcs == ETH_8_TCS) {
+                       switch (tc_node_no) {
+                       case 0:
+                               *base = 0;
+                               *nb = 32;
+                               break;
+                       case 1:
+                               *base = 32;
+                               *nb = 32;
+                               break;
+                       case 2:
+                               *base = 64;
+                               *nb = 16;
+                               break;
+                       case 3:
+                               *base = 80;
+                               *nb = 16;
+                               break;
+                       case 4:
+                               *base = 96;
+                               *nb = 8;
+                               break;
+                       case 5:
+                               *base = 104;
+                               *nb = 8;
+                               break;
+                       case 6:
+                               *base = 112;
+                               *nb = 8;
+                               break;
+                       case 7:
+                               *base = 120;
+                               *nb = 8;
+                               break;
+                       default:
+                               return;
+                       }
+               } else {
+                       switch (tc_node_no) {
+                       /**
+                        * If no VF and no DCB, only 64 queues can be used.
+                        * This case also be covered by this "case 0".
+                        */
+                       case 0:
+                               *base = 0;
+                               *nb = 64;
+                               break;
+                       case 1:
+                               *base = 64;
+                               *nb = 32;
+                               break;
+                       case 2:
+                               *base = 96;
+                               *nb = 16;
+                               break;
+                       case 3:
+                               *base = 112;
+                               *nb = 16;
+                               break;
+                       default:
+                               return;
+                       }
+               }
+       }
+}
+
+static int
+ixgbe_node_param_check(uint32_t node_id, uint32_t parent_node_id,
+                      uint32_t priority, uint32_t weight,
+                      struct rte_tm_node_params *params,
+                      struct rte_tm_error *error)
+{
+       if (node_id == RTE_TM_NODE_ID_NULL) {
+               error->type = RTE_TM_ERROR_TYPE_NODE_ID;
+               error->message = "invalid node id";
+               return -EINVAL;
+       }
+
+       if (priority) {
+               error->type = RTE_TM_ERROR_TYPE_NODE_PRIORITY;
+               error->message = "priority should be 0";
+               return -EINVAL;
+       }
+
+       if (weight != 1) {
+               error->type = RTE_TM_ERROR_TYPE_NODE_WEIGHT;
+               error->message = "weight must be 1";
+               return -EINVAL;
+       }
+
+       /* not support shared shaper */
+       if (params->shared_shaper_id) {
+               error->type = RTE_TM_ERROR_TYPE_NODE_PARAMS_SHARED_SHAPER_ID;
+               error->message = "shared shaper not supported";
+               return -EINVAL;
+       }
+       if (params->n_shared_shapers) {
+               error->type = RTE_TM_ERROR_TYPE_NODE_PARAMS_N_SHARED_SHAPERS;
+               error->message = "shared shaper not supported";
+               return -EINVAL;
+       }
+
+       /* for root node */
+       if (parent_node_id == RTE_TM_NODE_ID_NULL) {
+               /* check the unsupported parameters */
+               if (params->nonleaf.wfq_weight_mode) {
+                       error->type =
+                               RTE_TM_ERROR_TYPE_NODE_PARAMS_WFQ_WEIGHT_MODE;
+                       error->message = "WFQ not supported";
+                       return -EINVAL;
+               }
+               if (params->nonleaf.n_sp_priorities != 1) {
+                       error->type =
+                               RTE_TM_ERROR_TYPE_NODE_PARAMS_N_SP_PRIORITIES;
+                       error->message = "SP priority not supported";
+                       return -EINVAL;
+               } else if (params->nonleaf.wfq_weight_mode &&
+                          !(*params->nonleaf.wfq_weight_mode)) {
+                       error->type =
+                               RTE_TM_ERROR_TYPE_NODE_PARAMS_WFQ_WEIGHT_MODE;
+                       error->message = "WFP should be byte mode";
+                       return -EINVAL;
+               }
+
+               return 0;
+       }
+
+       /* for TC or queue node */
+       /* check the unsupported parameters */
+       if (params->leaf.cman) {
+               error->type = RTE_TM_ERROR_TYPE_NODE_PARAMS_CMAN;
+               error->message = "Congestion management not supported";
+               return -EINVAL;
+       }
+       if (params->leaf.wred.wred_profile_id !=
+           RTE_TM_WRED_PROFILE_ID_NONE) {
+               error->type =
+                       RTE_TM_ERROR_TYPE_NODE_PARAMS_WRED_PROFILE_ID;
+               error->message = "WRED not supported";
+               return -EINVAL;
+       }
+       if (params->leaf.wred.shared_wred_context_id) {
+               error->type =
+                       RTE_TM_ERROR_TYPE_NODE_PARAMS_SHARED_WRED_CONTEXT_ID;
+               error->message = "WRED not supported";
+               return -EINVAL;
+       }
+       if (params->leaf.wred.n_shared_wred_contexts) {
+               error->type =
+                       RTE_TM_ERROR_TYPE_NODE_PARAMS_N_SHARED_WRED_CONTEXTS;
+               error->message = "WRED not supported";
+               return -EINVAL;
+       }
+
+       return 0;
+}
+
+/**
+ * Now the TC and queue configuration is controlled by DCB.
+ * We need check if the node configuration follows the DCB configuration.
+ * In the future, we may use TM to cover DCB.
+ */
+static int
+ixgbe_node_add(struct rte_eth_dev *dev, uint32_t node_id,
+              uint32_t parent_node_id, uint32_t priority,
+              uint32_t weight, uint32_t level_id,
+              struct rte_tm_node_params *params,
+              struct rte_tm_error *error)
+{
+       struct ixgbe_tm_conf *tm_conf =
+               IXGBE_DEV_PRIVATE_TO_TM_CONF(dev->data->dev_private);
+       enum ixgbe_tm_node_type node_type = IXGBE_TM_NODE_TYPE_MAX;
+       enum ixgbe_tm_node_type parent_node_type = IXGBE_TM_NODE_TYPE_MAX;
+       struct ixgbe_tm_shaper_profile *shaper_profile;
+       struct ixgbe_tm_node *tm_node;
+       struct ixgbe_tm_node *parent_node;
+       uint8_t nb_tcs;
+       uint16_t q_base = 0;
+       uint16_t q_nb = 0;
+       int ret;
+
+       if (!params || !error)
+               return -EINVAL;
+
+       /* if already committed */
+       if (tm_conf->committed) {
+               error->type = RTE_TM_ERROR_TYPE_UNSPECIFIED;
+               error->message = "already committed";
+               return -EINVAL;
+       }
+
+       ret = ixgbe_node_param_check(node_id, parent_node_id, priority, weight,
+                                    params, error);
+       if (ret)
+               return ret;
+
+       /* check if the node ID is already used */
+       if (ixgbe_tm_node_search(dev, node_id, &node_type)) {
+               error->type = RTE_TM_ERROR_TYPE_NODE_ID;
+               error->message = "node id already used";
+               return -EINVAL;
+       }
+
+       /* check the shaper profile id */
+       shaper_profile = ixgbe_shaper_profile_search(dev,
+                                                    params->shaper_profile_id);
+       if (!shaper_profile) {
+               error->type = RTE_TM_ERROR_TYPE_NODE_PARAMS_SHAPER_PROFILE_ID;
+               error->message = "shaper profile not exist";
+               return -EINVAL;
+       }
+
+       /* root node if not have a parent */
+       if (parent_node_id == RTE_TM_NODE_ID_NULL) {
+               /* check level */
+               if (level_id != RTE_TM_NODE_LEVEL_ID_ANY &&
+                   level_id > IXGBE_TM_NODE_TYPE_PORT) {
+                       error->type = RTE_TM_ERROR_TYPE_NODE_PARAMS;
+                       error->message = "Wrong level";
+                       return -EINVAL;
+               }
+
+               /* obviously no more than one root */
+               if (tm_conf->root) {
+                       error->type = RTE_TM_ERROR_TYPE_NODE_PARENT_NODE_ID;
+                       error->message = "already have a root";
+                       return -EINVAL;
+               }
+
+               /* add the root node */
+               tm_node = rte_zmalloc("ixgbe_tm_node",
+                                     sizeof(struct ixgbe_tm_node),
+                                     0);
+               if (!tm_node)
+                       return -ENOMEM;
+               tm_node->id = node_id;
+               tm_node->priority = priority;
+               tm_node->weight = weight;
+               tm_node->reference_count = 0;
+               tm_node->no = 0;
+               tm_node->parent = NULL;
+               tm_node->shaper_profile = shaper_profile;
+               (void)rte_memcpy(&tm_node->params, params,
+                                sizeof(struct rte_tm_node_params));
+               tm_conf->root = tm_node;
+
+               /* increase the reference counter of the shaper profile */
+               shaper_profile->reference_count++;
+
+               return 0;
+       }
+
+       /* TC or queue node */
+       /* check the parent node */
+       parent_node = ixgbe_tm_node_search(dev, parent_node_id,
+                                          &parent_node_type);
+       if (!parent_node) {
+               error->type = RTE_TM_ERROR_TYPE_NODE_PARENT_NODE_ID;
+               error->message = "parent not exist";
+               return -EINVAL;
+       }
+       if (parent_node_type != IXGBE_TM_NODE_TYPE_PORT &&
+           parent_node_type != IXGBE_TM_NODE_TYPE_TC) {
+               error->type = RTE_TM_ERROR_TYPE_NODE_PARENT_NODE_ID;
+               error->message = "parent is not port or TC";
+               return -EINVAL;
+       }
+       /* check level */
+       if (level_id != RTE_TM_NODE_LEVEL_ID_ANY &&
+           level_id != parent_node_type + 1) {
+               error->type = RTE_TM_ERROR_TYPE_NODE_PARAMS;
+               error->message = "Wrong level";
+               return -EINVAL;
+       }
+
+       /* check the node number */
+       if (parent_node_type == IXGBE_TM_NODE_TYPE_PORT) {
+               /* check TC number */
+               nb_tcs = ixgbe_tc_nb_get(dev);
+               if (tm_conf->nb_tc_node >= nb_tcs) {
+                       error->type = RTE_TM_ERROR_TYPE_NODE_ID;
+                       error->message = "too many TCs";
+                       return -EINVAL;
+               }
+       } else {
+               /* check queue number */
+               if (tm_conf->nb_queue_node >= dev->data->nb_tx_queues) {
+                       error->type = RTE_TM_ERROR_TYPE_NODE_ID;
+                       error->message = "too many queues";
+                       return -EINVAL;
+               }
+
+               ixgbe_queue_base_nb_get(dev, parent_node->no, &q_base, &q_nb);
+               if (parent_node->reference_count >= q_nb) {
+                       error->type = RTE_TM_ERROR_TYPE_NODE_ID;
+                       error->message = "too many queues than TC supported";
+                       return -EINVAL;
+               }
+
+               /**
+                * check the node id.
+                * For queue, the node id means queue id.
+                */
+               if (node_id >= dev->data->nb_tx_queues) {
+                       error->type = RTE_TM_ERROR_TYPE_NODE_ID;
+                       error->message = "too large queue id";
+                       return -EINVAL;
+               }
+       }
+
+       /* add the TC or queue node */
+       tm_node = rte_zmalloc("ixgbe_tm_node",
+                             sizeof(struct ixgbe_tm_node),
+                             0);
+       if (!tm_node)
+               return -ENOMEM;
+       tm_node->id = node_id;
+       tm_node->priority = priority;
+       tm_node->weight = weight;
+       tm_node->reference_count = 0;
+       tm_node->parent = parent_node;
+       tm_node->shaper_profile = shaper_profile;
+       (void)rte_memcpy(&tm_node->params, params,
+                        sizeof(struct rte_tm_node_params));
+       if (parent_node_type == IXGBE_TM_NODE_TYPE_PORT) {
+               tm_node->no = parent_node->reference_count;
+               TAILQ_INSERT_TAIL(&tm_conf->tc_list,
+                                 tm_node, node);
+               tm_conf->nb_tc_node++;
+       } else {
+               tm_node->no = q_base + parent_node->reference_count;
+               TAILQ_INSERT_TAIL(&tm_conf->queue_list,
+                                 tm_node, node);
+               tm_conf->nb_queue_node++;
+       }
+       tm_node->parent->reference_count++;
+
+       /* increase the reference counter of the shaper profile */
+       shaper_profile->reference_count++;
+
+       return 0;
+}