net/cxgbe: fix supported speed capabilities

Use port type to determine the supported speed capabilities.

Fixes: e274f5732225 ("ethdev: add speed capabilities")

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>

diff --git a/doc/guides/nics/features/cxgbe.ini b/doc/guides/nics/features/cxgbe.ini
index 2cf0af3..3d0fde2 100644 (file)
--- a/doc/guides/nics/features/cxgbe.ini
+++ b/doc/guides/nics/features/cxgbe.ini
@@ -4,7 +4,7 @@
 ; Refer to default.ini for the full list of available PMD features.
 ;
 [Features]
-Speed capabilities   = P
+Speed capabilities   = Y
 Link status          = Y
 Queue start/stop     = Y
 MTU update           = Y

diff --git a/drivers/net/cxgbe/cxgbe.h b/drivers/net/cxgbe/cxgbe.h
index 9120c43..f989154 100644 (file)
--- a/drivers/net/cxgbe/cxgbe.h
+++ b/drivers/net/cxgbe/cxgbe.h
@@ -47,6 +47,7 @@
 #define CXGBE_MAX_RX_PKTLEN (9000 + ETHER_HDR_LEN + ETHER_CRC_LEN) /* max pkt */
 
 int cxgbe_probe(struct adapter *adapter);
+void cxgbe_get_speed_caps(struct port_info *pi, u32 *speed_caps);
 int cxgbe_up(struct adapter *adap);
 int cxgbe_down(struct port_info *pi);
 void cxgbe_close(struct adapter *adapter);

diff --git a/drivers/net/cxgbe/cxgbe_ethdev.c b/drivers/net/cxgbe/cxgbe_ethdev.c
index b622d25..981dd47 100644 (file)
--- a/drivers/net/cxgbe/cxgbe_ethdev.c
+++ b/drivers/net/cxgbe/cxgbe_ethdev.c
@@ -175,7 +175,7 @@ static void cxgbe_dev_info_get(struct rte_eth_dev *eth_dev,
 
        device_info->rx_desc_lim = cxgbe_desc_lim;
        device_info->tx_desc_lim = cxgbe_desc_lim;
-       device_info->speed_capa = ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G;
+       cxgbe_get_speed_caps(pi, &device_info->speed_capa);
 }
 
 static void cxgbe_dev_promiscuous_enable(struct rte_eth_dev *eth_dev)

diff --git a/drivers/net/cxgbe/cxgbe_main.c b/drivers/net/cxgbe/cxgbe_main.c
index eead7c0..0edac2b 100644 (file)
--- a/drivers/net/cxgbe/cxgbe_main.c
+++ b/drivers/net/cxgbe/cxgbe_main.c
@@ -1033,6 +1033,110 @@ void cxgbe_enable_rx_queues(struct port_info *pi)
                enable_rx(adap, &s->ethrxq[pi->first_qset + i].rspq);
 }
 
+/**
+ * fw_caps_to_speed_caps - translate Firmware Port Caps to Speed Caps.
+ * @port_type: Firmware Port Type
+ * @fw_caps: Firmware Port Capabilities
+ * @speed_caps: Device Info Speed Capabilities
+ *
+ * Translate a Firmware Port Capabilities specification to Device Info
+ * Speed Capabilities.
+ */
+static void fw_caps_to_speed_caps(enum fw_port_type port_type,
+                                 unsigned int fw_caps,
+                                 u32 *speed_caps)
+{
+#define SET_SPEED(__speed_name) \
+       do { \
+               *speed_caps |= ETH_LINK_ ## __speed_name; \
+       } while (0)
+
+#define FW_CAPS_TO_SPEED(__fw_name) \
+       do { \
+               if (fw_caps & FW_PORT_CAP_ ## __fw_name) \
+                       SET_SPEED(__fw_name); \
+       } while (0)
+
+       switch (port_type) {
+       case FW_PORT_TYPE_BT_SGMII:
+       case FW_PORT_TYPE_BT_XFI:
+       case FW_PORT_TYPE_BT_XAUI:
+               FW_CAPS_TO_SPEED(SPEED_100M);
+               FW_CAPS_TO_SPEED(SPEED_1G);
+               FW_CAPS_TO_SPEED(SPEED_10G);
+               break;
+
+       case FW_PORT_TYPE_KX4:
+       case FW_PORT_TYPE_KX:
+       case FW_PORT_TYPE_FIBER_XFI:
+       case FW_PORT_TYPE_FIBER_XAUI:
+       case FW_PORT_TYPE_SFP:
+       case FW_PORT_TYPE_QSFP_10G:
+       case FW_PORT_TYPE_QSA:
+               FW_CAPS_TO_SPEED(SPEED_1G);
+               FW_CAPS_TO_SPEED(SPEED_10G);
+               break;
+
+       case FW_PORT_TYPE_KR:
+               SET_SPEED(SPEED_10G);
+               break;
+
+       case FW_PORT_TYPE_BP_AP:
+       case FW_PORT_TYPE_BP4_AP:
+               SET_SPEED(SPEED_1G);
+               SET_SPEED(SPEED_10G);
+               break;
+
+       case FW_PORT_TYPE_BP40_BA:
+       case FW_PORT_TYPE_QSFP:
+               SET_SPEED(SPEED_40G);
+               break;
+
+       case FW_PORT_TYPE_CR_QSFP:
+       case FW_PORT_TYPE_SFP28:
+       case FW_PORT_TYPE_KR_SFP28:
+               FW_CAPS_TO_SPEED(SPEED_1G);
+               FW_CAPS_TO_SPEED(SPEED_10G);
+               FW_CAPS_TO_SPEED(SPEED_25G);
+               break;
+
+       case FW_PORT_TYPE_CR2_QSFP:
+               SET_SPEED(SPEED_50G);
+               break;
+
+       case FW_PORT_TYPE_KR4_100G:
+       case FW_PORT_TYPE_CR4_QSFP:
+               FW_CAPS_TO_SPEED(SPEED_25G);
+               FW_CAPS_TO_SPEED(SPEED_40G);
+               FW_CAPS_TO_SPEED(SPEED_100G);
+               break;
+
+       default:
+               break;
+       }
+
+#undef FW_CAPS_TO_SPEED
+#undef SET_SPEED
+}
+
+/**
+ * cxgbe_get_speed_caps - Fetch supported speed capabilities
+ * @pi: Underlying port's info
+ * @speed_caps: Device Info speed capabilities
+ *
+ * Fetch supported speed capabilities of the underlying port.
+ */
+void cxgbe_get_speed_caps(struct port_info *pi, u32 *speed_caps)
+{
+       *speed_caps = 0;
+
+       fw_caps_to_speed_caps(pi->port_type, pi->link_cfg.supported,
+                             speed_caps);
+
+       if (!(pi->link_cfg.supported & FW_PORT_CAP_ANEG))
+               *speed_caps |= ETH_LINK_SPEED_FIXED;
+}
+
 /**
  * cxgb_up - enable the adapter
  * @adap: adapter being enabled