net/cnxk: enable flow control by default on device configure

Enable flow control by default on device configuration
instead of basing it on Kernel behaviour.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>

diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c
index 847307e2dbea3e438bf2ce4c6ac4e7f784e3c6c5..df4179c83d9a38350270803c36ac84698bbc379a 100644 (file)
--- a/drivers/net/cnxk/cnxk_ethdev.c
+++ b/drivers/net/cnxk/cnxk_ethdev.c
@@ -306,24 +306,22 @@ static int
 nix_init_flow_ctrl_config(struct rte_eth_dev *eth_dev)
 {
        struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
+       enum roc_nix_fc_mode fc_mode = ROC_NIX_FC_FULL;
        struct cnxk_fc_cfg *fc = &dev->fc_cfg;
-       struct rte_eth_fc_conf fc_conf = {0};
        int rc;
 
-       /* Both Rx & Tx flow ctrl get enabled(RTE_ETH_FC_FULL) in HW
-        * by AF driver, update those info in PMD structure.
-        */
-       rc = cnxk_nix_flow_ctrl_get(eth_dev, &fc_conf);
-       if (rc)
-               goto exit;
+       /* To avoid Link credit deadlock on Ax, disable Tx FC if it's enabled */
+       if (roc_model_is_cn96_ax() &&
+           dev->npc.switch_header_type != ROC_PRIV_FLAGS_HIGIG)
+               fc_mode = ROC_NIX_FC_TX;
 
-       fc->mode = fc_conf.mode;
-       fc->rx_pause = (fc_conf.mode == RTE_ETH_FC_FULL) ||
-                       (fc_conf.mode == RTE_ETH_FC_RX_PAUSE);
-       fc->tx_pause = (fc_conf.mode == RTE_ETH_FC_FULL) ||
-                       (fc_conf.mode == RTE_ETH_FC_TX_PAUSE);
+       /* By default enable flow control */
+       rc = roc_nix_fc_mode_set(&dev->nix, fc_mode);
+       if (rc)
+               return rc;
 
-exit:
+       fc->mode = (fc_mode == ROC_NIX_FC_FULL) ? RTE_ETH_FC_FULL :
+                                                 RTE_ETH_FC_TX_PAUSE;
        return rc;
 }