ixgbe/base: abstract out link read/write

It's more valuable to abstract the link read/write interface. As such,
change the following method names, and add them to a new link info
structure:
  read_i2c_combined               => read_link
  read_i2c_combined_unlocked      => read_link_unlocked
  write_i2c_combined              => write_link
  write_i2c_combined_unlocked     => write_link_unlocked

This will allow X550EM_a to override these methods for MDIO access
while X550EM_x provides methods to use I2C combined access.
Initially the structure is just method pointers and a bus
address.

Two functions involved in combined I2C accesses were moved from
ixgbe_phy.c to ixgbe_x550.c. The underlying functions that carry
out the combined I2C accesses were left in ixgbe_phy.c because
they share some functions with other I2C methods.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>

diff --git a/drivers/net/ixgbe/base/ixgbe_api.c b/drivers/net/ixgbe/base/ixgbe_api.c
index 18f7cbd..cf1e516 100644 (file)
--- a/drivers/net/ixgbe/base/ixgbe_api.c
+++ b/drivers/net/ixgbe/base/ixgbe_api.c
@@ -1435,35 +1435,33 @@ s32 ixgbe_read_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
 }
 
 /**
- * ixgbe_read_i2c_combined - Perform I2C read combined operation
+ * ixgbe_read_link - Perform read operation on link device
  * @hw: pointer to the hardware structure
- * @addr: I2C bus address to read from
- * @reg: I2C device register to read from
+ * @addr: bus address to read from
+ * @reg: device register to read from
  * @val: pointer to location to receive read value
  *
  * Returns an error code on error.
  */
-s32 ixgbe_read_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
+s32 ixgbe_read_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
 {
-       return ixgbe_call_func(hw, hw->phy.ops.read_i2c_combined, (hw, addr,
+       return ixgbe_call_func(hw, hw->link.ops.read_link, (hw, addr,
                               reg, val), IXGBE_NOT_IMPLEMENTED);
 }
 
 /**
- * ixgbe_read_i2c_combined_unlocked - Perform I2C read combined operation
+ * ixgbe_read_link_unlocked - Perform read operation on link device
  * @hw: pointer to the hardware structure
- * @addr: I2C bus address to read from
- * @reg: I2C device register to read from
+ * @addr: bus address to read from
+ * @reg: device register to read from
  * @val: pointer to location to receive read value
  *
  * Returns an error code on error.
  **/
-s32 ixgbe_read_i2c_combined_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg,
-                                    u16 *val)
+s32 ixgbe_read_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
 {
-       return ixgbe_call_func(hw, hw->phy.ops.read_i2c_combined_unlocked,
-                              (hw, addr, reg, val),
-                              IXGBE_NOT_IMPLEMENTED);
+       return ixgbe_call_func(hw, hw->link.ops.read_link_unlocked,
+                              (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
 }
 
 /**
@@ -1502,33 +1500,32 @@ s32 ixgbe_write_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
 }
 
 /**
- * ixgbe_write_i2c_combined - Perform I2C write combined operation
+ * ixgbe_write_link - Perform write operation on link device
  * @hw: pointer to the hardware structure
- * @addr: I2C bus address to write to
- * @reg: I2C device register to write to
+ * @addr: bus address to write to
+ * @reg: device register to write to
  * @val: value to write
  *
  * Returns an error code on error.
  */
-s32 ixgbe_write_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
+s32 ixgbe_write_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
 {
-       return ixgbe_call_func(hw, hw->phy.ops.write_i2c_combined, (hw, addr,
-                              reg, val), IXGBE_NOT_IMPLEMENTED);
+       return ixgbe_call_func(hw, hw->link.ops.write_link,
+                              (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
 }
 
 /**
- * ixgbe_write_i2c_combined_unlocked - Perform I2C write combined operation
+ * ixgbe_write_link_unlocked - Perform write operation on link device
  * @hw: pointer to the hardware structure
- * @addr: I2C bus address to write to
- * @reg: I2C device register to write to
+ * @addr: bus address to write to
+ * @reg: device register to write to
  * @val: value to write
  *
  * Returns an error code on error.
  **/
-s32 ixgbe_write_i2c_combined_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg,
-                                     u16 val)
+s32 ixgbe_write_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
 {
-       return ixgbe_call_func(hw, hw->phy.ops.write_i2c_combined_unlocked,
+       return ixgbe_call_func(hw, hw->link.ops.write_link_unlocked,
                               (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
 }
 

diff --git a/drivers/net/ixgbe/base/ixgbe_api.h b/drivers/net/ixgbe/base/ixgbe_api.h
index d915f9b..ae26a6a 100644 (file)
--- a/drivers/net/ixgbe/base/ixgbe_api.h
+++ b/drivers/net/ixgbe/base/ixgbe_api.h
@@ -176,17 +176,15 @@ s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
                        u8 *data);
 s32 ixgbe_read_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
                                 u8 dev_addr, u8 *data);
-s32 ixgbe_read_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val);
-s32 ixgbe_read_i2c_combined_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg,
-                                    u16 *val);
+s32 ixgbe_read_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val);
+s32 ixgbe_read_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val);
 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
                         u8 data);
 void ixgbe_set_fdir_drop_queue_82599(struct ixgbe_hw *hw, u8 dropqueue);
 s32 ixgbe_write_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
                                  u8 dev_addr, u8 data);
-s32 ixgbe_write_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val);
-s32 ixgbe_write_i2c_combined_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg,
-                                     u16 val);
+s32 ixgbe_write_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val);
+s32 ixgbe_write_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val);
 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 eeprom_data);
 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr);
 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr);

diff --git a/drivers/net/ixgbe/base/ixgbe_phy.c b/drivers/net/ixgbe/base/ixgbe_phy.c
index bc4d88c..6ed685e 100644 (file)
--- a/drivers/net/ixgbe/base/ixgbe_phy.c
+++ b/drivers/net/ixgbe/base/ixgbe_phy.c
@@ -109,8 +109,8 @@ STATIC u8 ixgbe_ones_comp_byte_add(u8 add1, u8 add2)
  *
  * Returns an error code on error.
  */
-STATIC s32 ixgbe_read_i2c_combined_generic_int(struct ixgbe_hw *hw, u8 addr,
-                                              u16 reg, u16 *val, bool lock)
+s32 ixgbe_read_i2c_combined_generic_int(struct ixgbe_hw *hw, u8 addr, u16 reg,
+                                       u16 *val, bool lock)
 {
        u32 swfw_mask = hw->phy.phy_semaphore_mask;
        int max_retry = 10;
@@ -179,37 +179,6 @@ fail:
        return IXGBE_ERR_I2C;
 }
 
-/**
- * ixgbe_read_i2c_combined_generic - Perform I2C read combined operation
- * @hw: pointer to the hardware structure
- * @addr: I2C bus address to read from
- * @reg: I2C device register to read from
- * @val: pointer to location to receive read value
- *
- * Returns an error code on error.
- **/
-STATIC s32 ixgbe_read_i2c_combined_generic(struct ixgbe_hw *hw, u8 addr,
-                                          u16 reg, u16 *val)
-{
-       return ixgbe_read_i2c_combined_generic_int(hw, addr, reg, val, true);
-}
-
-/**
- * ixgbe_read_i2c_combined_generic_unlocked - Do I2C read combined operation
- * @hw: pointer to the hardware structure
- * @addr: I2C bus address to read from
- * @reg: I2C device register to read from
- * @val: pointer to location to receive read value
- *
- * Returns an error code on error.
- **/
-STATIC s32
-ixgbe_read_i2c_combined_generic_unlocked(struct ixgbe_hw *hw, u8 addr,
-                                        u16 reg, u16 *val)
-{
-       return ixgbe_read_i2c_combined_generic_int(hw, addr, reg, val, false);
-}
-
 /**
  * ixgbe_write_i2c_combined_generic_int - Perform I2C write combined operation
  * @hw: pointer to the hardware structure
@@ -220,8 +189,8 @@ ixgbe_read_i2c_combined_generic_unlocked(struct ixgbe_hw *hw, u8 addr,
  *
  * Returns an error code on error.
  */
-STATIC s32 ixgbe_write_i2c_combined_generic_int(struct ixgbe_hw *hw, u8 addr,
-                                               u16 reg, u16 val, bool lock)
+s32 ixgbe_write_i2c_combined_generic_int(struct ixgbe_hw *hw, u8 addr, u16 reg,
+                                        u16 val, bool lock)
 {
        u32 swfw_mask = hw->phy.phy_semaphore_mask;
        int max_retry = 1;
@@ -275,37 +244,6 @@ fail:
        return IXGBE_ERR_I2C;
 }
 
-/**
- * ixgbe_write_i2c_combined_generic - Perform I2C write combined operation
- * @hw: pointer to the hardware structure
- * @addr: I2C bus address to write to
- * @reg: I2C device register to write to
- * @val: value to write
- *
- * Returns an error code on error.
- **/
-STATIC s32 ixgbe_write_i2c_combined_generic(struct ixgbe_hw *hw,
-                                           u8 addr, u16 reg, u16 val)
-{
-       return ixgbe_write_i2c_combined_generic_int(hw, addr, reg, val, true);
-}
-
-/**
- * ixgbe_write_i2c_combined_generic_unlocked - Do I2C write combined operation
- * @hw: pointer to the hardware structure
- * @addr: I2C bus address to write to
- * @reg: I2C device register to write to
- * @val: value to write
- *
- * Returns an error code on error.
- **/
-STATIC s32
-ixgbe_write_i2c_combined_generic_unlocked(struct ixgbe_hw *hw,
-                                         u8 addr, u16 reg, u16 val)
-{
-       return ixgbe_write_i2c_combined_generic_int(hw, addr, reg, val, false);
-}
-
 /**
  *  ixgbe_init_phy_ops_generic - Inits PHY function ptrs
  *  @hw: pointer to the hardware structure
@@ -337,12 +275,6 @@ s32 ixgbe_init_phy_ops_generic(struct ixgbe_hw *hw)
        phy->ops.i2c_bus_clear = ixgbe_i2c_bus_clear;
        phy->ops.identify_sfp = ixgbe_identify_module_generic;
        phy->sfp_type = ixgbe_sfp_type_unknown;
-       phy->ops.read_i2c_combined = ixgbe_read_i2c_combined_generic;
-       phy->ops.write_i2c_combined = ixgbe_write_i2c_combined_generic;
-       phy->ops.read_i2c_combined_unlocked =
-                               ixgbe_read_i2c_combined_generic_unlocked;
-       phy->ops.write_i2c_combined_unlocked =
-                               ixgbe_write_i2c_combined_generic_unlocked;
        phy->ops.read_i2c_byte_unlocked = ixgbe_read_i2c_byte_generic_unlocked;
        phy->ops.write_i2c_byte_unlocked =
                                ixgbe_write_i2c_byte_generic_unlocked;

diff --git a/drivers/net/ixgbe/base/ixgbe_phy.h b/drivers/net/ixgbe/base/ixgbe_phy.h
index afed7bd..1a5affe 100644 (file)
--- a/drivers/net/ixgbe/base/ixgbe_phy.h
+++ b/drivers/net/ixgbe/base/ixgbe_phy.h
@@ -151,8 +151,6 @@ POSSIBILITY OF SUCH DAMAGE.
 /* SFP+ SFF-8472 Compliance */
 #define IXGBE_SFF_SFF_8472_UNSUP       0x00
 
-#ident "$Id: ixgbe_phy.h,v 1.56 2013/09/05 23:59:49 jtkirshe Exp $"
-
 s32 ixgbe_init_phy_ops_generic(struct ixgbe_hw *hw);
 bool ixgbe_validate_phy_addr(struct ixgbe_hw *hw, u32 phy_addr);
 enum ixgbe_phy_type ixgbe_get_phy_type_from_id(u32 phy_id);
@@ -209,4 +207,8 @@ s32 ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset,
 s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset,
                                   u8 eeprom_data);
 void ixgbe_i2c_bus_clear(struct ixgbe_hw *hw);
+s32 ixgbe_read_i2c_combined_generic_int(struct ixgbe_hw *, u8 addr, u16 reg,
+                                       u16 *val, bool lock);
+s32 ixgbe_write_i2c_combined_generic_int(struct ixgbe_hw *, u8 addr, u16 reg,
+                                        u16 val, bool lock);
 #endif /* _IXGBE_PHY_H_ */

diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h
index daa4182..4dce2ac 100644 (file)
--- a/drivers/net/ixgbe/base/ixgbe_type.h
+++ b/drivers/net/ixgbe/base/ixgbe_type.h
@@ -3857,22 +3857,30 @@ struct ixgbe_phy_operations {
        s32 (*read_i2c_eeprom)(struct ixgbe_hw *, u8 , u8 *);
        s32 (*write_i2c_eeprom)(struct ixgbe_hw *, u8, u8);
        void (*i2c_bus_clear)(struct ixgbe_hw *);
-       s32 (*read_i2c_combined)(struct ixgbe_hw *, u8 addr, u16 reg, u16 *val);
-       s32 (*write_i2c_combined)(struct ixgbe_hw *, u8 addr, u16 reg, u16 val);
        s32 (*check_overtemp)(struct ixgbe_hw *);
        s32 (*set_phy_power)(struct ixgbe_hw *, bool on);
        s32 (*enter_lplu)(struct ixgbe_hw *);
        s32 (*handle_lasi)(struct ixgbe_hw *hw);
-       s32 (*read_i2c_combined_unlocked)(struct ixgbe_hw *, u8 addr, u16 reg,
-                                         u16 *value);
-       s32 (*write_i2c_combined_unlocked)(struct ixgbe_hw *, u8 addr, u16 reg,
-                                         u16 value);
        s32 (*read_i2c_byte_unlocked)(struct ixgbe_hw *, u8 offset, u8 addr,
                                      u8 *value);
        s32 (*write_i2c_byte_unlocked)(struct ixgbe_hw *, u8 offset, u8 addr,
                                       u8 value);
 };
 
+struct ixgbe_link_operations {
+       s32 (*read_link)(struct ixgbe_hw *, u8 addr, u16 reg, u16 *val);
+       s32 (*read_link_unlocked)(struct ixgbe_hw *, u8 addr, u16 reg,
+                                 u16 *val);
+       s32 (*write_link)(struct ixgbe_hw *, u8 addr, u16 reg, u16 val);
+       s32 (*write_link_unlocked)(struct ixgbe_hw *, u8 addr, u16 reg,
+                                  u16 val);
+};
+
+struct ixgbe_link_info {
+       struct ixgbe_link_operations ops;
+       u8 addr;
+};
+
 struct ixgbe_eeprom_info {
        struct ixgbe_eeprom_operations ops;
        enum ixgbe_eeprom_type type;
@@ -3979,6 +3987,7 @@ struct ixgbe_hw {
        struct ixgbe_addr_filter_info addr_ctrl;
        struct ixgbe_fc_info fc;
        struct ixgbe_phy_info phy;
+       struct ixgbe_link_info link;
        struct ixgbe_eeprom_info eeprom;
        struct ixgbe_bus_info bus;
        struct ixgbe_mbx_info mbx;

diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c
index e4416d3..0bbaa55 100644 (file)
--- a/drivers/net/ixgbe/base/ixgbe_x550.c
+++ b/drivers/net/ixgbe/base/ixgbe_x550.c
@@ -104,7 +104,7 @@ s32 ixgbe_init_ops_X550(struct ixgbe_hw *hw)
  **/
 STATIC s32 ixgbe_read_cs4227(struct ixgbe_hw *hw, u16 reg, u16 *value)
 {
-       return ixgbe_read_i2c_combined_unlocked(hw, IXGBE_CS4227, reg, value);
+       return hw->link.ops.read_link_unlocked(hw, hw->link.addr, reg, value);
 }
 
 /**
@@ -117,7 +117,7 @@ STATIC s32 ixgbe_read_cs4227(struct ixgbe_hw *hw, u16 reg, u16 *value)
  **/
 STATIC s32 ixgbe_write_cs4227(struct ixgbe_hw *hw, u16 reg, u16 value)
 {
-       return ixgbe_write_i2c_combined_unlocked(hw, IXGBE_CS4227, reg, value);
+       return hw->link.ops.write_link_unlocked(hw, hw->link.addr, reg, value);
 }
 
 /**
@@ -388,6 +388,68 @@ STATIC s32 ixgbe_write_phy_reg_x550em(struct ixgbe_hw *hw, u32 reg_addr,
        return IXGBE_NOT_IMPLEMENTED;
 }
 
+/**
+ * ixgbe_read_i2c_combined_generic - Perform I2C read combined operation
+ * @hw: pointer to the hardware structure
+ * @addr: I2C bus address to read from
+ * @reg: I2C device register to read from
+ * @val: pointer to location to receive read value
+ *
+ * Returns an error code on error.
+ **/
+static s32 ixgbe_read_i2c_combined_generic(struct ixgbe_hw *hw, u8 addr,
+                                          u16 reg, u16 *val)
+{
+       return ixgbe_read_i2c_combined_generic_int(hw, addr, reg, val, true);
+}
+
+/**
+ * ixgbe_read_i2c_combined_generic_unlocked - Do I2C read combined operation
+ * @hw: pointer to the hardware structure
+ * @addr: I2C bus address to read from
+ * @reg: I2C device register to read from
+ * @val: pointer to location to receive read value
+ *
+ * Returns an error code on error.
+ **/
+static s32
+ixgbe_read_i2c_combined_generic_unlocked(struct ixgbe_hw *hw, u8 addr,
+                                        u16 reg, u16 *val)
+{
+       return ixgbe_read_i2c_combined_generic_int(hw, addr, reg, val, false);
+}
+
+/**
+ * ixgbe_write_i2c_combined_generic - Perform I2C write combined operation
+ * @hw: pointer to the hardware structure
+ * @addr: I2C bus address to write to
+ * @reg: I2C device register to write to
+ * @val: value to write
+ *
+ * Returns an error code on error.
+ **/
+static s32 ixgbe_write_i2c_combined_generic(struct ixgbe_hw *hw,
+                                           u8 addr, u16 reg, u16 val)
+{
+       return ixgbe_write_i2c_combined_generic_int(hw, addr, reg, val, true);
+}
+
+/**
+ * ixgbe_write_i2c_combined_generic_unlocked - Do I2C write combined operation
+ * @hw: pointer to the hardware structure
+ * @addr: I2C bus address to write to
+ * @reg: I2C device register to write to
+ * @val: value to write
+ *
+ * Returns an error code on error.
+ **/
+static s32
+ixgbe_write_i2c_combined_generic_unlocked(struct ixgbe_hw *hw,
+                                         u8 addr, u16 reg, u16 val)
+{
+       return ixgbe_write_i2c_combined_generic_int(hw, addr, reg, val, false);
+}
+
 /**
 *  ixgbe_init_ops_X550EM - Inits func ptrs and MAC type
 *  @hw: pointer to hardware structure
@@ -400,6 +462,7 @@ s32 ixgbe_init_ops_X550EM(struct ixgbe_hw *hw)
        struct ixgbe_mac_info *mac = &hw->mac;
        struct ixgbe_eeprom_info *eeprom = &hw->eeprom;
        struct ixgbe_phy_info *phy = &hw->phy;
+       struct ixgbe_link_info *link = &hw->link;
        s32 ret_val;
 
        DEBUGFUNC("ixgbe_init_ops_X550EM");
@@ -440,6 +503,13 @@ s32 ixgbe_init_ops_X550EM(struct ixgbe_hw *hw)
                mac->ops.write_iosf_sb_reg = ixgbe_write_iosf_sb_reg_x550;
                mac->ops.acquire_swfw_sync = ixgbe_acquire_swfw_sync_X550em;
                mac->ops.release_swfw_sync = ixgbe_release_swfw_sync_X550em;
+               link->ops.read_link = ixgbe_read_i2c_combined_generic;
+               link->ops.read_link_unlocked =
+                               ixgbe_read_i2c_combined_generic_unlocked;
+               link->ops.write_link = ixgbe_write_i2c_combined_generic;
+               link->ops.write_link_unlocked =
+                               ixgbe_write_i2c_combined_generic_unlocked;
+               link->addr = IXGBE_CS4227;
        }
        if (hw->mac.type == ixgbe_mac_X550EM_a) {
                mac->ops.read_iosf_sb_reg = ixgbe_read_iosf_sb_reg_x550a;
@@ -1903,22 +1973,22 @@ s32 ixgbe_setup_mac_link_sfp_x550em(struct ixgbe_hw *hw,
                reg_slice = IXGBE_CS4227_LINE_SPARE22_MSB +
                            (hw->bus.lan_id << 12);
                reg_val = IXGBE_CS4227_SPEED_10G;
-               ret_val = ixgbe_write_i2c_combined(hw, IXGBE_CS4227, reg_slice,
-                                                  reg_val);
+               ret_val = hw->link.ops.write_link(hw, hw->link.addr, reg_slice,
+                                                 reg_val);
 
                reg_slice = IXGBE_CS4227_LINE_SPARE24_LSB +
                            (hw->bus.lan_id << 12);
                reg_val = (IXGBE_CS4227_EDC_MODE_SR << 1) | 0x1;
-               ret_val = ixgbe_write_i2c_combined(hw, IXGBE_CS4227, reg_slice,
-                                                  reg_val);
+               ret_val = hw->link.ops.write_link(hw, hw->link.addr, reg_slice,
+                                                 reg_val);
 
                /* Configure CS4227 for HOST connection rate then type. */
                reg_slice = IXGBE_CS4227_HOST_SPARE22_MSB +
                            (hw->bus.lan_id << 12);
                reg_val = (speed & IXGBE_LINK_SPEED_10GB_FULL) ?
                IXGBE_CS4227_SPEED_10G : IXGBE_CS4227_SPEED_1G;
-               ret_val = ixgbe_write_i2c_combined(hw, IXGBE_CS4227, reg_slice,
-                                                  reg_val);
+               ret_val = hw->link.ops.write_link(hw, hw->link.addr, reg_slice,
+                                                 reg_val);
 
                reg_slice = IXGBE_CS4227_HOST_SPARE24_LSB +
                            (hw->bus.lan_id << 12);
@@ -1926,8 +1996,8 @@ s32 ixgbe_setup_mac_link_sfp_x550em(struct ixgbe_hw *hw,
                        reg_val = (IXGBE_CS4227_EDC_MODE_CX1 << 1) | 0x1;
                else
                        reg_val = (IXGBE_CS4227_EDC_MODE_SR << 1) | 0x1;
-               ret_val = ixgbe_write_i2c_combined(hw, IXGBE_CS4227, reg_slice,
-                                                  reg_val);
+               ret_val = hw->link.ops.write_link(hw, hw->link.addr, reg_slice,
+                                                 reg_val);
 
                /* Setup XFI internal link. */
                ret_val = ixgbe_setup_ixfi_x550em(hw, &speed);
@@ -1942,8 +2012,8 @@ s32 ixgbe_setup_mac_link_sfp_x550em(struct ixgbe_hw *hw,
                        reg_val = (IXGBE_CS4227_EDC_MODE_CX1 << 1) | 0x1;
                else
                        reg_val = (IXGBE_CS4227_EDC_MODE_SR << 1) | 0x1;
-               ret_val = ixgbe_write_i2c_combined(hw, IXGBE_CS4227, reg_slice,
-                                                  reg_val);
+               ret_val = hw->link.ops.write_link(hw, hw->link.addr, reg_slice,
+                                                 reg_val);
        }
        return ret_val;
 }