The memory barrier is used to ensure that the response is returned
only after the Tx/Rx function is set, it should place after the Rx/Tx
function is set.
Fixes:
0203d33a1059 ("net/mlx4: support secondary process")
Cc: stable@dpdk.org
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
switch (param->type) {
case MLX4_MP_REQ_START_RXTX:
INFO("port %u starting datapath", dev->data->port_id);
- rte_mb();
dev->tx_pkt_burst = mlx4_tx_burst;
dev->rx_pkt_burst = mlx4_rx_burst;
#ifdef HAVE_IBV_MLX4_UAR_MMAP_OFFSET
}
}
#endif
+ rte_mb();
mp_init_msg(dev, &mp_res, param->type);
res->result = 0;
ret = rte_mp_reply(&mp_res, peer);