]> git.droids-corp.org - dpdk.git/commitdiff
net/mlx5: set representor to first PF in bonding mode
authorXueming Li <xuemingl@nvidia.com>
Tue, 17 Nov 2020 11:01:38 +0000 (11:01 +0000)
committerFerruh Yigit <ferruh.yigit@intel.com>
Fri, 20 Nov 2020 20:10:05 +0000 (21:10 +0100)
When the representor device was set to PF1 in bonding mode, iterating
device iterator that looking for representors by bonding device failed
to match PF0 pci address with PF1 address. So detaching PF bonding
device only detached all representors on PF0.

This patch registers all representors of PF1 with PF0 as PCI device.

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
drivers/net/mlx5/linux/mlx5_os.c
drivers/net/mlx5/mlx5.c
drivers/net/mlx5/mlx5.h

index ce25108b90efac5ab36cd1317277502c82ba1e05..4b7fff4eff5badeb2409d25d510e0f35c2125e4c 100644 (file)
@@ -757,7 +757,13 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
                        rte_errno = ENOMEM;
                        return NULL;
                }
-               eth_dev->device = dpdk_dev;
+               priv = eth_dev->data->dev_private;
+               if (priv->sh->bond_dev != UINT16_MAX)
+                       /* For bonding port, use primary PCI device. */
+                       eth_dev->device =
+                               rte_eth_devices[priv->sh->bond_dev].device;
+               else
+                       eth_dev->device = dpdk_dev;
                eth_dev->dev_ops = &mlx5_os_dev_sec_ops;
                eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
                eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
@@ -1373,7 +1379,17 @@ err_secondary:
        eth_dev->data->dev_private = priv;
        priv->dev_data = eth_dev->data;
        eth_dev->data->mac_addrs = priv->mac;
-       eth_dev->device = dpdk_dev;
+       if (spawn->pf_bond < 0) {
+               eth_dev->device = dpdk_dev;
+       } else {
+               /* Use primary bond PCI as device. */
+               if (sh->bond_dev == UINT16_MAX) {
+                       sh->bond_dev = eth_dev->data->port_id;
+                       eth_dev->device = dpdk_dev;
+               } else {
+                       eth_dev->device = rte_eth_devices[sh->bond_dev].device;
+               }
+       }
        eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
        /* Configure the first MAC address by default. */
        if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
index 31011c3a72edb337704332eae7a97c9b6c945183..ede5fd44ab5e2c5513157555d25d76a356dfcbd3 100644 (file)
@@ -915,6 +915,7 @@ mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn,
                goto error;
        }
        sh->refcnt = 1;
+       sh->bond_dev = UINT16_MAX;
        sh->max_port = spawn->max_port;
        strncpy(sh->ibdev_name, mlx5_os_get_ctx_device_name(sh->ctx),
                sizeof(sh->ibdev_name) - 1);
index 0155f5ca23ca04a8962179f513fe1dcdcf1a972f..b0c3a2286d51e6d8b8ecd77fc5630b312c6d9fe6 100644 (file)
@@ -705,6 +705,7 @@ struct mlx5_flex_parser_profiles {
 struct mlx5_dev_ctx_shared {
        LIST_ENTRY(mlx5_dev_ctx_shared) next;
        uint32_t refcnt;
+       uint16_t bond_dev; /* Bond primary device id. */
        uint32_t devx:1; /* Opened with DV. */
        uint32_t flow_hit_aso_en:1; /* Flow Hit ASO is supported. */
        uint32_t eqn; /* Event Queue number. */