#ifdef RTE_LIBRTE_PMD_BBDEV_FPGA_LTE_FEC
if ((get_init_device() == true) &&
(!strcmp(info->drv.driver_name, FPGA_LTE_PF_DRIVER_NAME))) {
- struct fpga_lte_fec_conf conf;
+ struct rte_fpga_lte_fec_conf conf;
unsigned int i;
printf("Configure FPGA LTE FEC Driver %s with default values\n",
info->drv.driver_name);
/* clear default configuration before initialization */
- memset(&conf, 0, sizeof(struct fpga_lte_fec_conf));
+ memset(&conf, 0, sizeof(struct rte_fpga_lte_fec_conf));
/* Set PF mode :
* true if PF is used for data plane
conf.flr_time_out = FLR_4G_TIMEOUT;
/* setup FPGA PF with configuration information */
- ret = fpga_lte_fec_configure(info->dev_name, &conf);
+ ret = rte_fpga_lte_fec_configure(info->dev_name, &conf);
TEST_ASSERT_SUCCESS(ret,
"Failed to configure 4G FPGA PF for bbdev %s",
info->dev_name);
device to perform FEC functions.
This configuration needs to be executed at least once after reboot or PCI FLR and can
-be achieved by using the function ``fpga_lte_fec_configure()``, which sets up the
-parameters defined in ``fpga_lte_fec_conf`` structure:
+be achieved by using the function ``rte_fpga_lte_fec_configure()``, which sets up the
+parameters defined in ``rte_fpga_lte_fec_conf`` structure:
.. code-block:: c
- struct fpga_lte_fec_conf {
+ struct rte_fpga_lte_fec_conf {
bool pf_mode_en;
uint8_t vf_ul_queues_number[FPGA_LTE_FEC_NUM_VFS];
uint8_t vf_dl_queues_number[FPGA_LTE_FEC_NUM_VFS];
the FLR time out then set this setting to 0x262=610.
-An example configuration code calling the function ``fpga_lte_fec_configure()`` is shown
+An example configuration code calling the function ``rte_fpga_lte_fec_configure()`` is shown
below:
.. code-block:: c
- struct fpga_lte_fec_conf conf;
+ struct rte_fpga_lte_fec_conf conf;
unsigned int i;
- memset(&conf, 0, sizeof(struct fpga_lte_fec_conf));
+ memset(&conf, 0, sizeof(struct rte_fpga_lte_fec_conf));
conf.pf_mode_en = 1;
for (i = 0; i < FPGA_LTE_FEC_NUM_VFS; ++i) {
conf.ul_load_balance = 64;
/* setup FPGA PF */
- ret = fpga_lte_fec_configure(info->dev_name, &conf);
+ ret = rte_fpga_lte_fec_configure(info->dev_name, &conf);
TEST_ASSERT_SUCCESS(ret,
"Failed to configure 4G FPGA PF for bbdev %s",
info->dev_name);
* ipsec: ``RTE_SATP_LOG2_NUM`` has been dropped from ``enum`` and
subsequently moved ``rte_ipsec`` lib from experimental to stable.
+* baseband/fpga_lte_fec: Renamed function ``fpga_lte_fec_configure`` to
+ ``rte_fpga_lte_fec_configure`` and structure ``fpga_lte_fec_conf`` to
+ ``rte_fpga_lte_fec_conf``.
+
* baseband/fpga_5gnr_fec: Renamed function ``fpga_5gnr_fec_configure`` to
``rte_fpga_5gnr_fec_configure`` and structure ``fpga_5gnr_fec_conf`` to
``rte_fpga_5gnr_fec_conf``.
}
static inline void
-set_default_fpga_conf(struct fpga_lte_fec_conf *def_conf)
+set_default_fpga_conf(struct rte_fpga_lte_fec_conf *def_conf)
{
/* clear default configuration before initialization */
- memset(def_conf, 0, sizeof(struct fpga_lte_fec_conf));
+ memset(def_conf, 0, sizeof(struct rte_fpga_lte_fec_conf));
/* Set pf mode to true */
def_conf->pf_mode_en = true;
/* Initial configuration of FPGA LTE FEC device */
int
-fpga_lte_fec_configure(const char *dev_name,
- const struct fpga_lte_fec_conf *conf)
+rte_fpga_lte_fec_configure(const char *dev_name,
+ const struct rte_fpga_lte_fec_conf *conf)
{
uint32_t payload_32, address;
uint16_t payload_16;
uint8_t payload_8;
uint16_t q_id, vf_id, total_q_id, total_ul_q_id, total_dl_q_id;
struct rte_bbdev *bbdev = rte_bbdev_get_named_dev(dev_name);
- struct fpga_lte_fec_conf def_conf;
+ struct rte_fpga_lte_fec_conf def_conf;
if (bbdev == NULL) {
rte_bbdev_log(ERR,
/**
* Structure to pass FPGA 4G FEC configuration.
*/
-struct fpga_lte_fec_conf {
+struct rte_fpga_lte_fec_conf {
/**< 1 if PF is used for dataplane, 0 for VFs */
bool pf_mode_en;
/**< Number of UL queues per VF */
*/
__rte_experimental
int
-fpga_lte_fec_configure(const char *dev_name,
- const struct fpga_lte_fec_conf *conf);
+rte_fpga_lte_fec_configure(const char *dev_name,
+ const struct rte_fpga_lte_fec_conf *conf);
#ifdef __cplusplus
}
EXPERIMENTAL {
global:
- fpga_lte_fec_configure;
+ rte_fpga_lte_fec_configure;
};