CFLAGS += -I$(RTE_SDK)/lib/librte_eal/common
LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_ring
LDLIBS += -lrte_ethdev
+LDLIBS += -lrte_common_dpaax
# versioning export map
EXPORT_MAP := rte_bus_fslmc_version.map
#include <fslmc_vfio.h>
#include "fslmc_logs.h"
+#include <dpaax_iova_table.h>
+
int dpaa2_logtype_bus;
#define VFIO_IOMMU_GROUP_PATH "/sys/kernel/iommu_groups"
probe_all = rte_fslmc_bus.bus.conf.scan_mode != RTE_BUS_SCAN_WHITELIST;
+ /* In case of PA, the FD addresses returned by qbman APIs are physical
+ * addresses, which need conversion into equivalent VA address for
+ * rte_mbuf. For that, a table (a serial array, in memory) is used to
+ * increase translation efficiency.
+ * This has to be done before probe as some device initialization
+ * (during) probe allocate memory (dpaa2_sec) which needs to be pinned
+ * to this table.
+ */
+ ret = dpaax_iova_table_populate();
+ if (ret) {
+ DPAA2_BUS_WARN("PA->VA Translation table not available;");
+ }
+
TAILQ_FOREACH(dev, &rte_fslmc_bus.device_list, next) {
TAILQ_FOREACH(drv, &rte_fslmc_bus.driver_list, next) {
ret = rte_fslmc_match(drv, dev);
fslmc_bus = driver->fslmc_bus;
+ /* Cleanup the PA->VA Translation table; From whereever this function
+ * is called from.
+ */
+ dpaax_iova_table_depopulate();
+
TAILQ_REMOVE(&fslmc_bus->driver_list, driver, next);
/* Update Bus references */
driver->fslmc_bus = NULL;
build = false
endif
-deps += ['eventdev', 'kvargs']
+deps += ['common_dpaax', 'eventdev', 'kvargs']
sources = files('fslmc_bus.c',
'fslmc_vfio.c',
'mc/dpbp.c',
#define _DPAA2_HW_PVT_H_
#include <rte_eventdev.h>
+#include <dpaax_iova_table.h>
#include <mc/fsl_mc_sys.h>
#include <fsl_qbman_portal.h>
#ifdef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA
extern uint8_t dpaa2_virt_mode;
static void *dpaa2_mem_ptov(phys_addr_t paddr) __attribute__((unused));
-/* todo - this is costly, need to write a fast coversion routine */
+
static void *dpaa2_mem_ptov(phys_addr_t paddr)
{
- struct dpaa2_memseg *ms;
+ void *va;
if (dpaa2_virt_mode)
return (void *)(size_t)paddr;
- /* Check if the address is already part of the memseg list internally
- * maintained by the dpaa2 driver.
- */
- TAILQ_FOREACH(ms, &rte_dpaa2_memsegs, next) {
- if (paddr >= ms->iova && paddr <
- ms->iova + ms->len)
- return RTE_PTR_ADD(ms->vaddr, (uintptr_t)(paddr - ms->iova));
- }
+ va = (void *)dpaax_iova_table_get_va(paddr);
+ if (likely(va != NULL))
+ return va;
/* If not, Fallback to full memseg list searching */
- return rte_mem_iova2virt(paddr);
+ va = rte_mem_iova2virt(paddr);
+
+ return va;
}
static phys_addr_t dpaa2_mem_vtop(uint64_t vaddr) __attribute__((unused));
+
static phys_addr_t dpaa2_mem_vtop(uint64_t vaddr)
{
const struct rte_memseg *memseg;
LDLIBS += -lrte_mempool_dpaa2
LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_ring
LDLIBS += -lrte_cryptodev
+LDLIBS += -lrte_common_dpaax
include $(RTE_SDK)/mk/rte.lib.mk
LDLIBS += -lrte_eal -lrte_eventdev
LDLIBS += -lrte_bus_fslmc -lrte_mempool_dpaa2 -lrte_pmd_dpaa2
LDLIBS += -lrte_bus_vdev
+LDLIBS += -lrte_common_dpaax
CFLAGS += -I$(RTE_SDK)/drivers/net/dpaa2
CFLAGS += -I$(RTE_SDK)/drivers/net/dpaa2/mc
LDLIBS += -lrte_bus_fslmc
LDLIBS += -lrte_eal -lrte_mempool -lrte_ring
+LDLIBS += -lrte_common_dpaax
SYMLINK-$(CONFIG_RTE_LIBRTE_DPAA2_MEMPOOL)-include := rte_dpaa2_mempool.h
#include "dpaa2_hw_mempool.h"
#include "dpaa2_hw_mempool_logs.h"
+#include <dpaax_iova_table.h>
+
struct dpaa2_bp_info rte_dpaa2_bpid_info[MAX_BPID];
static struct dpaa2_bp_list *h_bp_list;
void *vaddr, rte_iova_t paddr, size_t len,
rte_mempool_populate_obj_cb_t *obj_cb, void *obj_cb_arg)
{
- struct dpaa2_memseg *ms;
-
- /* For each memory chunk pinned to the Mempool, a linked list of the
- * contained memsegs is created for searching when PA to VA
- * conversion is required.
- */
- ms = rte_zmalloc(NULL, sizeof(struct dpaa2_memseg), 0);
- if (!ms) {
- DPAA2_MEMPOOL_ERR("Unable to allocate internal memory.");
- DPAA2_MEMPOOL_WARN("Fast Physical to Virtual Addr translation would not be available.");
- /* If the element is not added, it would only lead to failure
- * in searching for the element and the logic would Fallback
- * to traditional DPDK memseg traversal code. So, this is not
- * a blocking error - but, error would be printed on screen.
- */
- return 0;
- }
-
- ms->vaddr = vaddr;
- ms->iova = paddr;
- ms->len = len;
- /* Head insertions are generally faster than tail insertions as the
- * buffers pinned are picked from rear end.
- */
- TAILQ_INSERT_HEAD(&rte_dpaa2_memsegs, ms, next);
+ /* Insert entry into the PA->VA Table */
+ dpaax_iova_table_update(paddr, vaddr, len);
return rte_mempool_op_populate_default(mp, max_objs, vaddr, paddr, len,
obj_cb, obj_cb_arg);
LDLIBS += -lrte_mempool_dpaa2
LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_ring
LDLIBS += -lrte_ethdev -lrte_net -lrte_kvargs
+LDLIBS += -lrte_common_dpaax
include $(RTE_SDK)/mk/rte.lib.mk
LDLIBS += -lrte_kvargs
LDLIBS += -lrte_mempool_dpaa2
LDLIBS += -lrte_rawdev
+LDLIBS += -lrte_common_dpaax
EXPORT_MAP := rte_pmd_dpaa2_cmdif_version.map
LDLIBS += -lrte_mempool_dpaa2
LDLIBS += -lrte_rawdev
LDLIBS += -lrte_ring
+LDLIBS += -lrte_common_dpaax
EXPORT_MAP := rte_pmd_dpaa2_qdma_version.map
ifeq ($(CONFIG_RTE_LIBRTE_DPAA_BUS),y)
_LDLIBS-$(CONFIG_RTE_LIBRTE_COMMON_DPAAX) += -lrte_common_dpaax
endif
+ifeq ($(CONFIG_RTE_LIBRTE_FSLMC_BUS),y)
+_LDLIBS-$(CONFIG_RTE_LIBRTE_COMMON_DPAAX) += -lrte_common_dpaax
+endif
_LDLIBS-$(CONFIG_RTE_LIBRTE_PCI_BUS) += -lrte_bus_pci
_LDLIBS-$(CONFIG_RTE_LIBRTE_VDEV_BUS) += -lrte_bus_vdev