* **[provides] rte_eth_dev_info**: ``dev_capa:RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP``.
* **[related] API**: ``rte_eth_dev_info_get()``.
+.. _nic_features_burst_mode_info:
+
+Burst mode info
+---------------
+
+Supports to get Rx/Tx packet burst mode information.
+
+* **[implements] eth_dev_ops**: ``rx_burst_mode_get``, ``tx_burst_mode_get``.
+* **[related] API**: ``rte_eth_rx_burst_mode_get()``, ``rte_eth_tx_burst_mode_get()``,
+ ``rte_eth_burst_mode_option_name()``.
+
.. _nic_features_other:
Other dev ops not represented by a Feature
Queue start/stop =
Runtime Rx queue setup =
Runtime Tx queue setup =
+Burst mode info =
MTU update =
Jumbo frame =
Scattered Rx =
Added support for the ``RTE_ETH_DEV_CLOSE_REMOVE`` flag.
+* **Added RX/TX packet burst mode get API.**
+
+ Added two new functions ``rte_eth_rx_burst_mode_get`` and
+ ``rte_eth_tx_burst_mode_get`` that allow an application
+ to retrieve the mode information about RX/TX packet burst
+ such as Scalar or Vector, and Vector technology like AVX2.
+ Another new function ``rte_eth_burst_mode_option_name`` is
+ provided for burst mode options stringification.
+
* **Updated the Intel ice driver.**
Updated the Intel ice driver with new features and improvements, including:
#undef RTE_TX_OFFLOAD_BIT2STR
+static const struct {
+ uint64_t option;
+ const char *name;
+} rte_burst_option_names[] = {
+ { RTE_ETH_BURST_SCALAR, "Scalar" },
+ { RTE_ETH_BURST_VECTOR, "Vector" },
+
+ { RTE_ETH_BURST_ALTIVEC, "AltiVec" },
+ { RTE_ETH_BURST_NEON, "Neon" },
+ { RTE_ETH_BURST_SSE, "SSE" },
+ { RTE_ETH_BURST_AVX2, "AVX2" },
+ { RTE_ETH_BURST_AVX512, "AVX512" },
+
+ { RTE_ETH_BURST_SCATTERED, "Scattered" },
+ { RTE_ETH_BURST_BULK_ALLOC, "Bulk Alloc" },
+ { RTE_ETH_BURST_SIMPLE, "Simple" },
+ { RTE_ETH_BURST_PER_QUEUE, "Per Queue" },
+};
+
/**
* The user application callback description.
*
return 0;
}
+int
+rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
+ struct rte_eth_burst_mode *mode)
+{
+ struct rte_eth_dev *dev;
+
+ RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
+
+ if (mode == NULL)
+ return -EINVAL;
+
+ dev = &rte_eth_devices[port_id];
+
+ if (queue_id >= dev->data->nb_rx_queues) {
+ RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
+ return -EINVAL;
+ }
+
+ RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
+ memset(mode, 0, sizeof(*mode));
+ return eth_err(port_id,
+ dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
+}
+
+int
+rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
+ struct rte_eth_burst_mode *mode)
+{
+ struct rte_eth_dev *dev;
+
+ RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
+
+ if (mode == NULL)
+ return -EINVAL;
+
+ dev = &rte_eth_devices[port_id];
+
+ if (queue_id >= dev->data->nb_tx_queues) {
+ RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
+ return -EINVAL;
+ }
+
+ RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
+ memset(mode, 0, sizeof(*mode));
+ return eth_err(port_id,
+ dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
+}
+
+const char *
+rte_eth_burst_mode_option_name(uint64_t option)
+{
+ const char *name = "";
+ unsigned int i;
+
+ for (i = 0; i < RTE_DIM(rte_burst_option_names); ++i) {
+ if (option == rte_burst_option_names[i].option) {
+ name = rte_burst_option_names[i].name;
+ break;
+ }
+ }
+
+ return name;
+}
+
int
rte_eth_dev_set_mc_addr_list(uint16_t port_id,
struct rte_ether_addr *mc_addr_set,
uint16_t nb_desc; /**< configured number of TXDs. */
} __rte_cache_min_aligned;
+/**
+ * Burst mode types, values can be ORed to define the burst mode of a driver.
+ */
+enum rte_eth_burst_mode_option {
+ RTE_ETH_BURST_SCALAR = (1 << 0),
+ RTE_ETH_BURST_VECTOR = (1 << 1),
+
+ /**< bits[15:2] are reserved for each vector type */
+ RTE_ETH_BURST_ALTIVEC = (1 << 2),
+ RTE_ETH_BURST_NEON = (1 << 3),
+ RTE_ETH_BURST_SSE = (1 << 4),
+ RTE_ETH_BURST_AVX2 = (1 << 5),
+ RTE_ETH_BURST_AVX512 = (1 << 6),
+
+ RTE_ETH_BURST_SCATTERED = (1 << 16), /**< Support scattered packets */
+ RTE_ETH_BURST_BULK_ALLOC = (1 << 17), /**< Support mbuf bulk alloc */
+ RTE_ETH_BURST_SIMPLE = (1 << 18),
+
+ RTE_ETH_BURST_PER_QUEUE = (1 << 19), /**< Support per queue burst */
+};
+
+/**
+ * Ethernet device RX/TX queue packet burst mode information structure.
+ * Used to retrieve information about packet burst mode setting.
+ */
+struct rte_eth_burst_mode {
+ uint64_t options;
+};
+
/** Maximum name length for extended statistics counters */
#define RTE_ETH_XSTATS_NAME_SIZE 64
int rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
struct rte_eth_txq_info *qinfo);
+/**
+ * Retrieve information about the Rx packet burst mode.
+ *
+ * @param port_id
+ * The port identifier of the Ethernet device.
+ * @param queue_id
+ * The Rx queue on the Ethernet device for which information
+ * will be retrieved.
+ * @param mode
+ * A pointer to a structure of type *rte_eth_burst_mode* to be filled
+ * with the information of the packet burst mode.
+ *
+ * @return
+ * - 0: Success
+ * - -ENOTSUP: routine is not supported by the device PMD.
+ * - -EINVAL: The port_id or the queue_id is out of range.
+ */
+__rte_experimental
+int rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
+ struct rte_eth_burst_mode *mode);
+
+/**
+ * Retrieve information about the Tx packet burst mode.
+ *
+ * @param port_id
+ * The port identifier of the Ethernet device.
+ * @param queue_id
+ * The Tx queue on the Ethernet device for which information
+ * will be retrieved.
+ * @param mode
+ * A pointer to a structure of type *rte_eth_burst_mode* to be filled
+ * with the information of the packet burst mode.
+ *
+ * @return
+ * - 0: Success
+ * - -ENOTSUP: routine is not supported by the device PMD.
+ * - -EINVAL: The port_id or the queue_id is out of range.
+ */
+__rte_experimental
+int rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
+ struct rte_eth_burst_mode *mode);
+
+/**
+ * Retrieve name about burst mode option.
+ *
+ * @param option
+ * The burst mode option of type *rte_eth_burst_mode_option*.
+ *
+ * @return
+ * - "": Not found
+ * - "xxx": name of the mode option.
+ */
+__rte_experimental
+const char *
+rte_eth_burst_mode_option_name(uint64_t option);
+
/**
* Retrieve device registers and register attributes (number of registers and
* register size)
typedef void (*eth_txq_info_get_t)(struct rte_eth_dev *dev,
uint16_t tx_queue_id, struct rte_eth_txq_info *qinfo);
+typedef int (*eth_burst_mode_get_t)(struct rte_eth_dev *dev,
+ uint16_t queue_id, struct rte_eth_burst_mode *mode);
+
typedef int (*mtu_set_t)(struct rte_eth_dev *dev, uint16_t mtu);
/**< @internal Set MTU. */
eth_dev_infos_get_t dev_infos_get; /**< Get device info. */
eth_rxq_info_get_t rxq_info_get; /**< retrieve RX queue information. */
eth_txq_info_get_t txq_info_get; /**< retrieve TX queue information. */
+ eth_burst_mode_get_t rx_burst_mode_get; /**< Get RX burst mode */
+ eth_burst_mode_get_t tx_burst_mode_get; /**< Get TX burst mode */
eth_fw_version_get_t fw_version_get; /**< Get firmware version. */
eth_dev_supported_ptypes_get_t dev_supported_ptypes_get;
/**< Get packet types supported and identified by device. */
# added in 19.08
rte_eth_read_clock;
+
+ # added in 19.11
+ rte_eth_rx_burst_mode_get;
+ rte_eth_tx_burst_mode_get;
+ rte_eth_burst_mode_option_name;
};
git.droids-corp.org / dpdk.git / commitdiff