examples/l3fwd: add event device configuration
authorPavan Nikhilesh <pbhagavatula@marvell.com>
Tue, 28 Jan 2020 05:34:57 +0000 (11:04 +0530)
committerJerin Jacob <jerinj@marvell.com>
Tue, 28 Jan 2020 09:04:51 +0000 (10:04 +0100)
Add event device configuration based on the capabilities of the
probed event device.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
examples/l3fwd/l3fwd_event.c
examples/l3fwd/l3fwd_event.h
examples/l3fwd/l3fwd_event_generic.c
examples/l3fwd/l3fwd_event_internal_port.c

index 62218f3..9cb46c7 100644 (file)
@@ -68,4 +68,7 @@ l3fwd_event_resource_setup(void)
 
        /* Setup eventdev capability callbacks */
        l3fwd_event_capability_setup();
+
+       /* Event device configuration */
+       evt_rsrc->ops.event_device_setup();
 }
index d25c8d2..fc3862e 100644 (file)
@@ -8,6 +8,7 @@
 #include <rte_common.h>
 #include <rte_eventdev.h>
 #include <rte_event_eth_tx_adapter.h>
+#include <rte_service.h>
 #include <rte_spinlock.h>
 
 #include "l3fwd.h"
@@ -18,6 +19,29 @@ typedef void (*event_port_setup_cb)(void);
 typedef void (*adapter_setup_cb)(void);
 typedef int (*event_loop_cb)(void *);
 
+struct l3fwd_event_queues {
+       uint8_t *event_q_id;
+       uint8_t nb_queues;
+};
+
+struct l3fwd_event_ports {
+       uint8_t *event_p_id;
+       uint8_t nb_ports;
+       rte_spinlock_t lock;
+};
+
+struct l3fwd_event_rx_adptr {
+       uint32_t service_id;
+       uint8_t nb_rx_adptr;
+       uint8_t *rx_adptr;
+};
+
+struct l3fwd_event_tx_adptr {
+       uint32_t service_id;
+       uint8_t nb_tx_adptr;
+       uint8_t *tx_adptr;
+};
+
 struct l3fwd_event_setup_ops {
        event_device_setup_cb event_device_setup;
        event_queue_setup_cb event_queue_setup;
@@ -28,9 +52,21 @@ struct l3fwd_event_setup_ops {
 };
 
 struct l3fwd_event_resources {
+       struct rte_event_port_conf def_p_conf;
+       struct l3fwd_event_rx_adptr rx_adptr;
+       struct l3fwd_event_tx_adptr tx_adptr;
+       uint8_t disable_implicit_release;
        struct l3fwd_event_setup_ops ops;
+       struct rte_mempool * (*pkt_pool)[NB_SOCKETS];
+       struct l3fwd_event_queues evq;
+       struct l3fwd_event_ports evp;
+       uint32_t port_mask;
+       uint8_t per_port_pool;
+       uint8_t event_d_id;
        uint8_t sched_type;
        uint8_t tx_mode_q;
+       uint8_t deq_depth;
+       uint8_t has_burst;
        uint8_t enabled;
        uint8_t eth_rx_queues;
 };
index 7fff850..ce06fa0 100644 (file)
@@ -7,8 +7,82 @@
 #include "l3fwd.h"
 #include "l3fwd_event.h"
 
+static uint32_t
+l3fwd_event_device_setup_generic(void)
+{
+       struct l3fwd_event_resources *evt_rsrc = l3fwd_get_eventdev_rsrc();
+       struct rte_event_dev_config event_d_conf = {
+               .nb_events_limit  = 4096,
+               .nb_event_queue_flows = 1024,
+               .nb_event_port_dequeue_depth = 128,
+               .nb_event_port_enqueue_depth = 128
+       };
+       struct rte_event_dev_info dev_info;
+       const uint8_t event_d_id = 0; /* Always use first event device only */
+       uint32_t event_queue_cfg = 0;
+       uint16_t ethdev_count = 0;
+       uint16_t num_workers = 0;
+       uint16_t port_id;
+       int ret;
+
+       RTE_ETH_FOREACH_DEV(port_id) {
+               if ((evt_rsrc->port_mask & (1 << port_id)) == 0)
+                       continue;
+               ethdev_count++;
+       }
+
+       /* Event device configuration */
+       rte_event_dev_info_get(event_d_id, &dev_info);
+       /* Enable implicit release */
+       if (dev_info.event_dev_cap & RTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE)
+               evt_rsrc->disable_implicit_release = 0;
+
+       if (dev_info.event_dev_cap & RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES)
+               event_queue_cfg |= RTE_EVENT_QUEUE_CFG_ALL_TYPES;
+
+       /* One queue for each ethdev port + one Tx adapter Single link queue. */
+       event_d_conf.nb_event_queues = ethdev_count + 1;
+       if (dev_info.max_event_queues < event_d_conf.nb_event_queues)
+               event_d_conf.nb_event_queues = dev_info.max_event_queues;
+
+       if (dev_info.max_num_events < event_d_conf.nb_events_limit)
+               event_d_conf.nb_events_limit = dev_info.max_num_events;
+
+       if (dev_info.max_event_queue_flows < event_d_conf.nb_event_queue_flows)
+               event_d_conf.nb_event_queue_flows =
+                                               dev_info.max_event_queue_flows;
+
+       if (dev_info.max_event_port_dequeue_depth <
+                               event_d_conf.nb_event_port_dequeue_depth)
+               event_d_conf.nb_event_port_dequeue_depth =
+                               dev_info.max_event_port_dequeue_depth;
+
+       if (dev_info.max_event_port_enqueue_depth <
+                               event_d_conf.nb_event_port_enqueue_depth)
+               event_d_conf.nb_event_port_enqueue_depth =
+                               dev_info.max_event_port_enqueue_depth;
+
+       num_workers = rte_lcore_count() - rte_service_lcore_count();
+       if (dev_info.max_event_ports < num_workers)
+               num_workers = dev_info.max_event_ports;
+
+       event_d_conf.nb_event_ports = num_workers;
+       evt_rsrc->evp.nb_ports = num_workers;
+       evt_rsrc->evq.nb_queues = event_d_conf.nb_event_queues;
+
+       evt_rsrc->has_burst = !!(dev_info.event_dev_cap &
+                                   RTE_EVENT_DEV_CAP_BURST_MODE);
+
+       ret = rte_event_dev_configure(event_d_id, &event_d_conf);
+       if (ret < 0)
+               rte_panic("Error in configuring event device\n");
+
+       evt_rsrc->event_d_id = event_d_id;
+       return event_queue_cfg;
+}
+
 void
 l3fwd_event_set_generic_ops(struct l3fwd_event_setup_ops *ops)
 {
-       RTE_SET_USED(ops);
+       ops->event_device_setup = l3fwd_event_device_setup_generic;
 }
index 085e9c8..242bd0f 100644 (file)
@@ -7,8 +7,82 @@
 #include "l3fwd.h"
 #include "l3fwd_event.h"
 
+static uint32_t
+l3fwd_event_device_setup_internal_port(void)
+{
+       struct l3fwd_event_resources *evt_rsrc = l3fwd_get_eventdev_rsrc();
+       struct rte_event_dev_config event_d_conf = {
+               .nb_events_limit  = 4096,
+               .nb_event_queue_flows = 1024,
+               .nb_event_port_dequeue_depth = 128,
+               .nb_event_port_enqueue_depth = 128
+       };
+       struct rte_event_dev_info dev_info;
+       const uint8_t event_d_id = 0; /* Always use first event device only */
+       uint32_t event_queue_cfg = 0;
+       uint16_t ethdev_count = 0;
+       uint16_t num_workers = 0;
+       uint16_t port_id;
+       int ret;
+
+       RTE_ETH_FOREACH_DEV(port_id) {
+               if ((evt_rsrc->port_mask & (1 << port_id)) == 0)
+                       continue;
+               ethdev_count++;
+       }
+
+       /* Event device configuration */
+       rte_event_dev_info_get(event_d_id, &dev_info);
+
+       /* Enable implicit release */
+       if (dev_info.event_dev_cap & RTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE)
+               evt_rsrc->disable_implicit_release = 0;
+
+       if (dev_info.event_dev_cap & RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES)
+               event_queue_cfg |= RTE_EVENT_QUEUE_CFG_ALL_TYPES;
+
+       event_d_conf.nb_event_queues = ethdev_count;
+       if (dev_info.max_event_queues < event_d_conf.nb_event_queues)
+               event_d_conf.nb_event_queues = dev_info.max_event_queues;
+
+       if (dev_info.max_num_events < event_d_conf.nb_events_limit)
+               event_d_conf.nb_events_limit = dev_info.max_num_events;
+
+       if (dev_info.max_event_queue_flows < event_d_conf.nb_event_queue_flows)
+               event_d_conf.nb_event_queue_flows =
+                                               dev_info.max_event_queue_flows;
+
+       if (dev_info.max_event_port_dequeue_depth <
+                               event_d_conf.nb_event_port_dequeue_depth)
+               event_d_conf.nb_event_port_dequeue_depth =
+                               dev_info.max_event_port_dequeue_depth;
+
+       if (dev_info.max_event_port_enqueue_depth <
+                               event_d_conf.nb_event_port_enqueue_depth)
+               event_d_conf.nb_event_port_enqueue_depth =
+                               dev_info.max_event_port_enqueue_depth;
+
+       num_workers = rte_lcore_count();
+       if (dev_info.max_event_ports < num_workers)
+               num_workers = dev_info.max_event_ports;
+
+       event_d_conf.nb_event_ports = num_workers;
+       evt_rsrc->evp.nb_ports = num_workers;
+       evt_rsrc->evq.nb_queues = event_d_conf.nb_event_queues;
+       evt_rsrc->has_burst = !!(dev_info.event_dev_cap &
+                                   RTE_EVENT_DEV_CAP_BURST_MODE);
+
+       ret = rte_event_dev_configure(event_d_id, &event_d_conf);
+       if (ret < 0)
+               rte_panic("Error in configuring event device\n");
+
+       evt_rsrc->event_d_id = event_d_id;
+       return event_queue_cfg;
+}
+
+
 void
 l3fwd_event_set_internal_port_ops(struct l3fwd_event_setup_ops *ops)
 {
-       RTE_SET_USED(ops);
+       ops->event_device_setup = l3fwd_event_device_setup_internal_port;
 }