net/ice/base: add SFF EEPROM AQ command
authorQi Zhang <qi.z.zhang@intel.com>
Thu, 29 Aug 2019 02:36:02 +0000 (10:36 +0800)
committerFerruh Yigit <ferruh.yigit@intel.com>
Mon, 7 Oct 2019 13:00:53 +0000 (15:00 +0200)
read/write module eeprom on i2c bus.

Signed-off-by: Scott W Taylor <scott.w.taylor@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
drivers/net/ice/base/ice_adminq_cmd.h
drivers/net/ice/base/ice_common.c
drivers/net/ice/base/ice_common.h

index 9e5853c..4de69dd 100644 (file)
@@ -1660,6 +1660,33 @@ struct ice_aqc_set_port_id_led {
 
 
 
+/* Read/Write SFF EEPROM command (indirect 0x06EE) */
+struct ice_aqc_sff_eeprom {
+       u8 lport_num;
+       u8 lport_num_valid;
+#define ICE_AQC_SFF_PORT_NUM_VALID     BIT(0)
+       __le16 i2c_bus_addr;
+#define ICE_AQC_SFF_I2CBUS_7BIT_M      0x7F
+#define ICE_AQC_SFF_I2CBUS_10BIT_M     0x3FF
+#define ICE_AQC_SFF_I2CBUS_TYPE_M      BIT(10)
+#define ICE_AQC_SFF_I2CBUS_TYPE_7BIT   0
+#define ICE_AQC_SFF_I2CBUS_TYPE_10BIT  ICE_AQC_SFF_I2CBUS_TYPE_M
+#define ICE_AQC_SFF_SET_EEPROM_PAGE_S  11
+#define ICE_AQC_SFF_SET_EEPROM_PAGE_M  (0x3 << ICE_AQC_SFF_SET_EEPROM_PAGE_S)
+#define ICE_AQC_SFF_NO_PAGE_CHANGE     0
+#define ICE_AQC_SFF_SET_23_ON_MISMATCH 1
+#define ICE_AQC_SFF_SET_22_ON_MISMATCH 2
+#define ICE_AQC_SFF_IS_WRITE           BIT(15)
+       __le16 i2c_mem_addr;
+       __le16 eeprom_page;
+#define  ICE_AQC_SFF_EEPROM_BANK_S 0
+#define  ICE_AQC_SFF_EEPROM_BANK_M (0xFF << ICE_AQC_SFF_EEPROM_BANK_S)
+#define  ICE_AQC_SFF_EEPROM_PAGE_S 8
+#define  ICE_AQC_SFF_EEPROM_PAGE_M (0xFF << ICE_AQC_SFF_EEPROM_PAGE_S)
+       __le32 addr_high;
+       __le32 addr_low;
+};
+
 /* NVM Read command (indirect 0x0701)
  * NVM Erase commands (direct 0x0702)
  * NVM Update commands (indirect 0x0703)
@@ -2218,6 +2245,7 @@ struct ice_aq_desc {
                struct ice_aqc_get_phy_caps get_phy;
                struct ice_aqc_set_phy_cfg set_phy;
                struct ice_aqc_restart_an restart_an;
+               struct ice_aqc_sff_eeprom read_write_sff_param;
                struct ice_aqc_set_port_id_led set_port_id_led;
                struct ice_aqc_get_sw_cfg get_sw_conf;
                struct ice_aqc_sw_rules sw_rules;
@@ -2431,6 +2459,7 @@ enum ice_adminq_opc {
        ice_aqc_opc_set_port_option                     = 0x06EB,
        ice_aqc_opc_set_gpio                            = 0x06EC,
        ice_aqc_opc_get_gpio                            = 0x06ED,
+       ice_aqc_opc_sff_eeprom                          = 0x06EE,
 
        /* NVM commands */
        ice_aqc_opc_nvm_read                            = 0x0701,
index 43c0694..cd94995 100644 (file)
@@ -2859,6 +2859,52 @@ ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
        return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
 }
 
+/**
+ * ice_aq_sff_eeprom
+ * @hw: pointer to the HW struct
+ * @lport: bits [7:0] = logical port, bit [8] = logical port valid
+ * @bus_addr: I2C bus address of the eeprom (typically 0xA0, 0=topo default)
+ * @mem_addr: I2C offset. lower 8 bits for address, 8 upper bits zero padding.
+ * @page: QSFP page
+ * @set_page: set or ignore the page
+ * @data: pointer to data buffer to be read/written to the I2C device.
+ * @length: 1-16 for read, 1 for write.
+ * @write: 0 read, 1 for write.
+ * @cd: pointer to command details structure or NULL
+ *
+ * Read/Write SFF EEPROM (0x06EE)
+ */
+enum ice_status
+ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr,
+                 u16 mem_addr, u8 page, u8 set_page, u8 *data, u8 length,
+                 bool write, struct ice_sq_cd *cd)
+{
+       struct ice_aqc_sff_eeprom *cmd;
+       struct ice_aq_desc desc;
+       enum ice_status status;
+
+       if (!data || (mem_addr & 0xff00))
+               return ICE_ERR_PARAM;
+
+       ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_sff_eeprom);
+       cmd = &desc.params.read_write_sff_param;
+       desc.flags = CPU_TO_LE16(ICE_AQ_FLAG_RD | ICE_AQ_FLAG_BUF);
+       cmd->lport_num = (u8)(lport & 0xff);
+       cmd->lport_num_valid = (u8)((lport >> 8) & 0x01);
+       cmd->i2c_bus_addr = CPU_TO_LE16(((bus_addr >> 1) &
+                                        ICE_AQC_SFF_I2CBUS_7BIT_M) |
+                                       ((set_page <<
+                                         ICE_AQC_SFF_SET_EEPROM_PAGE_S) &
+                                        ICE_AQC_SFF_SET_EEPROM_PAGE_M));
+       cmd->i2c_mem_addr = CPU_TO_LE16(mem_addr & 0xff);
+       cmd->eeprom_page = CPU_TO_LE16((u16)page << ICE_AQC_SFF_EEPROM_PAGE_S);
+       if (write)
+               cmd->i2c_bus_addr |= CPU_TO_LE16(ICE_AQC_SFF_IS_WRITE);
+
+       status = ice_aq_send_cmd(hw, &desc, data, length, cd);
+       return status;
+}
+
 /**
  * __ice_aq_get_set_rss_lut
  * @hw: pointer to the hardware structure
index 4e44c2f..d865021 100644 (file)
@@ -163,7 +163,10 @@ ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd);
 enum ice_status
 ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
                       struct ice_sq_cd *cd);
-
+enum ice_status
+ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr,
+                 u16 mem_addr, u8 page, u8 set_page, u8 *data, u8 length,
+                 bool write, struct ice_sq_cd *cd);
 
 
 enum ice_status