else
encp->enc_no_cont_ev_mode_supported = B_FALSE;
+ /*
+ * Check if buffer size may and must be specified on INIT_RXQ.
+ * It may be always specified to efx_rx_qcreate(), but will be
+ * just kept libefx internal if MCDI does not support it.
+ */
+ if (CAP_FLAGS2(req, INIT_RXQ_WITH_BUFFER_SIZE))
+ encp->enc_init_rxq_with_buffer_size = B_TRUE;
+ else
+ encp->enc_init_rxq_with_buffer_size = B_FALSE;
+
/*
* Check if firmware-verified NVRAM updates must be used.
*
__in efsys_mem_t *esmp,
__in boolean_t disable_scatter,
__in boolean_t want_inner_classes,
+ __in uint32_t buf_size,
__in uint32_t ps_bufsize,
__in uint32_t es_bufs_per_desc,
__in uint32_t es_max_dma_len,
{
efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
efx_mcdi_req_t req;
- EFX_MCDI_DECLARE_BUF(payload, MC_CMD_INIT_RXQ_V3_IN_LEN,
- MC_CMD_INIT_RXQ_V3_OUT_LEN);
+ EFX_MCDI_DECLARE_BUF(payload, MC_CMD_INIT_RXQ_V4_IN_LEN,
+ MC_CMD_INIT_RXQ_V4_OUT_LEN);
int npages = efx_rxq_nbufs(enp, ndescs);
int i;
efx_qword_t *dma_addr;
req.emr_cmd = MC_CMD_INIT_RXQ;
req.emr_in_buf = payload;
- req.emr_in_length = MC_CMD_INIT_RXQ_V3_IN_LEN;
+ req.emr_in_length = MC_CMD_INIT_RXQ_V4_IN_LEN;
req.emr_out_buf = payload;
- req.emr_out_length = MC_CMD_INIT_RXQ_V3_OUT_LEN;
+ req.emr_out_length = MC_CMD_INIT_RXQ_V4_OUT_LEN;
MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_SIZE, ndescs);
MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_TARGET_EVQ, eep->ee_index);
hol_block_timeout);
}
+ if (encp->enc_init_rxq_with_buffer_size)
+ MCDI_IN_SET_DWORD(req, INIT_RXQ_V4_IN_BUFFER_SIZE_BYTES,
+ buf_size);
+
dma_addr = MCDI_IN2(req, efx_qword_t, INIT_RXQ_IN_DMA_ADDR);
addr = EFSYS_MEM_ADDR(esmp);
want_inner_classes = B_FALSE;
if ((rc = efx_mcdi_init_rxq(enp, ndescs, eep, label, index,
- esmp, disable_scatter, want_inner_classes,
+ esmp, disable_scatter, want_inner_classes, erp->er_buf_size,
ps_buf_size, es_bufs_per_desc, es_max_dma_len,
es_buf_stride, hol_block_timeout)) != 0)
goto fail12;