]> git.droids-corp.org - dpdk.git/commitdiff
net/mlx5: support fine grain dynamic flag
authorOri Kam <orika@mellanox.com>
Wed, 29 Jan 2020 12:21:06 +0000 (12:21 +0000)
committerFerruh Yigit <ferruh.yigit@intel.com>
Wed, 5 Feb 2020 08:51:20 +0000 (09:51 +0100)
The inline feature is designed to save PCI bandwidth by copying some
of the data to the wqe. This feature if enabled works for all packets.

In some cases when using external memory, the PCI bandwidth is not
relevant since the memory can be accessed by other means.

This commit introduce the ability to control the inline with mbuf
granularity.

In order to use this feature the application should register the field
name, and restart the port.

Signed-off-by: Ori Kam <orika@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
drivers/net/mlx5/mlx5.c
drivers/net/mlx5/mlx5_rxtx.c
drivers/net/mlx5/mlx5_rxtx.h
drivers/net/mlx5/mlx5_trigger.c
drivers/net/mlx5/rte_pmd_mlx5.h [new file with mode: 0644]
drivers/net/mlx5/rte_pmd_mlx5_version.map

index 3b8de8f859ad669df2516f2bdc594fe2017792d5..e5fc1d38f69747cd21f0f97110400152ff78fec6 100644 (file)
@@ -48,6 +48,7 @@
 #include "mlx5_autoconf.h"
 #include "mlx5_mr.h"
 #include "mlx5_flow.h"
+#include "rte_pmd_mlx5.h"
 
 /* Device parameter to enable RX completion queue compression. */
 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
@@ -1999,6 +2000,25 @@ mlx5_release_dbr(struct rte_eth_dev *dev, uint32_t umem_id, uint64_t offset)
        return ret;
 }
 
+int
+rte_pmd_mlx5_get_dyn_flag_names(char *names[], unsigned int n)
+{
+       static const char *const dynf_names[] = {
+               RTE_PMD_MLX5_FINE_GRANULARITY_INLINE,
+               RTE_MBUF_DYNFLAG_METADATA_NAME
+       };
+       unsigned int i;
+
+       if (n < RTE_DIM(dynf_names))
+               return -ENOMEM;
+       for (i = 0; i < RTE_DIM(dynf_names); i++) {
+               if (names[i] == NULL)
+                       return -EINVAL;
+               strcpy(names[i], dynf_names[i]);
+       }
+       return RTE_DIM(dynf_names);
+}
+
 /**
  * Check sibling device configurations.
  *
index b14ae311d75c4dfc1ac4d7cd617a619ad5fd131b..b9ecc308a31cd7baeb35765766dfde78aad838cc 100644 (file)
@@ -129,6 +129,8 @@ uint32_t mlx5_ptype_table[] __rte_cache_aligned = {
 uint8_t mlx5_cksum_table[1 << 10] __rte_cache_aligned;
 uint8_t mlx5_swp_types_table[1 << 10] __rte_cache_aligned;
 
+uint64_t rte_net_mlx5_dynf_inline_mask;
+
 /**
  * Build a table to translate Rx completion flags to packet type.
  *
index c2cd23b2be47ad8799be710abcbcbc60a2c6d8eb..f9b611a5fbea98235d09147131180a4e7810ec05 100644 (file)
@@ -44,6 +44,9 @@
 /* Support tunnel matching. */
 #define MLX5_FLOW_TUNNEL 10
 
+/* Mbuf dynamic flag offset for inline. */
+extern uint64_t rte_net_mlx5_dynf_inline_mask;
+
 struct mlx5_rxq_stats {
 #ifdef MLX5_PMD_SOFT_COUNTERS
        uint64_t ipackets; /**< Total of successfully received packets. */
index 7e12cd5e8bfca2be0e83226f56307604b9dbb6fc..be47df529ff0f5cf940368e608db15174fe70fb8 100644 (file)
@@ -13,6 +13,7 @@
 #include "mlx5.h"
 #include "mlx5_rxtx.h"
 #include "mlx5_utils.h"
+#include "rte_pmd_mlx5.h"
 
 /**
  * Stop traffic on Tx queues.
@@ -270,8 +271,15 @@ mlx5_dev_start(struct rte_eth_dev *dev)
 {
        struct mlx5_priv *priv = dev->data->dev_private;
        int ret;
+       int fine_inline;
 
        DRV_LOG(DEBUG, "port %u starting device", dev->data->port_id);
+       fine_inline = rte_mbuf_dynflag_lookup
+               (RTE_PMD_MLX5_FINE_GRANULARITY_INLINE, NULL);
+       if (fine_inline > 0)
+               rte_net_mlx5_dynf_inline_mask = 1UL << fine_inline;
+       else
+               rte_net_mlx5_dynf_inline_mask = 0;
        ret = mlx5_dev_configure_rss_reta(dev);
        if (ret) {
                DRV_LOG(ERR, "port %u reta config failed: %s",
diff --git a/drivers/net/mlx5/rte_pmd_mlx5.h b/drivers/net/mlx5/rte_pmd_mlx5.h
new file mode 100644 (file)
index 0000000..8c69228
--- /dev/null
@@ -0,0 +1,35 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2020 Mellanox Technologies, Ltd
+ */
+
+#ifndef RTE_PMD_PRIVATE_MLX5_H_
+#define RTE_PMD_PRIVATE_MLX5_H_
+
+/**
+ * @file
+ * MLX5 public header.
+ *
+ * This interface provides the ability to support private PMD
+ * dynamic flags.
+ */
+
+#define RTE_PMD_MLX5_FINE_GRANULARITY_INLINE "mlx5_fine_granularity_inline"
+
+/**
+ * Returns the dynamic flags name, that are supported.
+ *
+ * @param[out] names
+ *   Array that is used to return the supported dynamic flags names.
+ * @param[in] n
+ *   The number of elements in the names array.
+ *
+ * @return
+ *   The number of dynamic flags that were copied if not negative.
+ *   Otherwise:
+ *   - ENOMEM - not enough entries in the array
+ *   - EINVAL - invalid array entry
+ */
+__rte_experimental
+int rte_pmd_mlx5_get_dyn_flag_names(char *names[], unsigned int n);
+
+#endif
index f9f17e4f6efa5806fc64ef7d24e29e34ae7fa194..c8b1031b02a5de7d08c4bcdcca5997d2055629bf 100644 (file)
@@ -1,3 +1,10 @@
 DPDK_20.0 {
        local: *;
 };
+
+EXPERIMENTAL {
+        global:
+
+        # added in 20.02
+       rte_pmd_mlx5_get_dyn_flag_names;
+};