]> git.droids-corp.org - dpdk.git/commitdiff
crypto/qat: enable asymmetric crypto on GEN4 device
authorArek Kusztal <arkadiuszx.kusztal@intel.com>
Thu, 7 Apr 2022 09:47:14 +0000 (10:47 +0100)
committerAkhil Goyal <gakhil@marvell.com>
Wed, 1 Jun 2022 14:26:35 +0000 (16:26 +0200)
This commit enables asymmetric crypto in generation four
devices (4xxx).

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Kai Ji <kai.ji@intel.com>
doc/guides/cryptodevs/qat.rst
drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c

index 785e04132487e493deafe2517327aac569dd2c6f..18ad1646a4c7d75bd2aededada37749f8c9d1008 100644 (file)
@@ -169,6 +169,7 @@ poll mode crypto driver support for the following hardware accelerator devices:
 * ``Intel QuickAssist Technology C3xxx``
 * ``Intel QuickAssist Technology D15xx``
 * ``Intel QuickAssist Technology C4xxx``
+* ``Intel QuickAssist Technology 4xxx``
 
 The QAT ASYM PMD has support for:
 
index 3d8b2e377c8b13b53835ec15603ecae8a0e4ebf8..a9457d9278604e9a5bbf33d919c15b8dd459efc1 100644 (file)
@@ -375,8 +375,12 @@ RTE_INIT(qat_sym_crypto_gen4_init)
 
 RTE_INIT(qat_asym_crypto_gen4_init)
 {
-       qat_asym_gen_dev_ops[QAT_GEN4].cryptodev_ops = NULL;
-       qat_asym_gen_dev_ops[QAT_GEN4].get_capabilities = NULL;
-       qat_asym_gen_dev_ops[QAT_GEN4].get_feature_flags = NULL;
-       qat_asym_gen_dev_ops[QAT_GEN4].set_session = NULL;
+       qat_asym_gen_dev_ops[QAT_GEN4].cryptodev_ops =
+                       &qat_asym_crypto_ops_gen1;
+       qat_asym_gen_dev_ops[QAT_GEN4].get_capabilities =
+                       qat_asym_crypto_cap_get_gen1;
+       qat_asym_gen_dev_ops[QAT_GEN4].get_feature_flags =
+                       qat_asym_crypto_feature_flags_get_gen1;
+       qat_asym_gen_dev_ops[QAT_GEN4].set_session =
+                       qat_asym_crypto_set_session_gen1;
 }