common/cnxk: use aggregate level RR priority from mbox

Use aggregate level Round Robin Priority from mbox response instead of
fixing it to single macro. This is useful when kernel AF driver
changes the constant.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>

diff --git a/drivers/common/cnxk/roc_nix_priv.h b/drivers/common/cnxk/roc_nix_priv.h
index 9b9ffae80b8a1e2dc159de36ceaf9e7308665e2a..cc69d71c9cc421ff33b7435a6af75939e70c5fe2 100644 (file)
--- a/drivers/common/cnxk/roc_nix_priv.h
+++ b/drivers/common/cnxk/roc_nix_priv.h
@@ -181,6 +181,7 @@ struct nix {
        uint16_t tm_root_lvl;
        uint16_t tm_flags;
        uint16_t tm_link_cfg_lvl;
+       uint8_t tm_aggr_lvl_rr_prio;
        uint16_t contig_rsvd[NIX_TXSCH_LVL_CNT];
        uint16_t discontig_rsvd[NIX_TXSCH_LVL_CNT];
        uint64_t tm_markfmt_en;
@@ -284,7 +285,6 @@ void nix_unregister_irqs(struct nix *nix);
 
 /* Default TL1 priority and Quantum from AF */
 #define NIX_TM_TL1_DFLT_RR_QTM ((1 << 24) - 1)
-#define NIX_TM_TL1_DFLT_RR_PRIO 1
 
 struct nix_tm_shaper_data {
        uint64_t burst_exponent;
@@ -432,7 +432,8 @@ bool nix_tm_child_res_valid(struct nix_tm_node_list *list,
                            struct nix_tm_node *parent);
 uint16_t nix_tm_resource_estimate(struct nix *nix, uint16_t *schq_contig,
                                  uint16_t *schq, enum roc_nix_tm_tree tree);
-uint8_t nix_tm_tl1_default_prep(uint32_t schq, volatile uint64_t *reg,
+uint8_t nix_tm_tl1_default_prep(struct nix *nix, uint32_t schq,
+                               volatile uint64_t *reg,
                                volatile uint64_t *regval);
 uint8_t nix_tm_topology_reg_prep(struct nix *nix, struct nix_tm_node *node,
                                 volatile uint64_t *reg,

diff --git a/drivers/common/cnxk/roc_nix_tm.c b/drivers/common/cnxk/roc_nix_tm.c
index 42d3abd070e898bbf298f705b5ff16cb316f322c..7fd54efbb935eaf212498a9ab2f48a95672b8915 100644 (file)
--- a/drivers/common/cnxk/roc_nix_tm.c
+++ b/drivers/common/cnxk/roc_nix_tm.c
@@ -55,7 +55,7 @@ nix_tm_node_reg_conf(struct nix *nix, struct nix_tm_node *node)
                req = mbox_alloc_msg_nix_txschq_cfg(mbox);
                req->lvl = NIX_TXSCH_LVL_TL1;
 
-               k = nix_tm_tl1_default_prep(node->parent_hw_id, req->reg,
+               k = nix_tm_tl1_default_prep(nix, node->parent_hw_id, req->reg,
                                            req->regval);
                req->num_regs = k;
                rc = mbox_process(mbox);
@@ -1288,6 +1288,7 @@ nix_tm_alloc_txschq(struct nix *nix, enum roc_nix_tm_tree tree)
        } while (pend);
 
        nix->tm_link_cfg_lvl = rsp->link_cfg_lvl;
+       nix->tm_aggr_lvl_rr_prio = rsp->aggr_lvl_rr_prio;
        return 0;
 alloc_err:
        for (i = 0; i < NIX_TXSCH_LVL_CNT; i++) {

diff --git a/drivers/common/cnxk/roc_nix_tm_utils.c b/drivers/common/cnxk/roc_nix_tm_utils.c
index bcdf990d6aadf4beda2bc196e7034ea0487c1392..b9b605f8b1a0dc6cb9fc89dc3f5860307c0e7f98 100644 (file)
--- a/drivers/common/cnxk/roc_nix_tm_utils.c
+++ b/drivers/common/cnxk/roc_nix_tm_utils.c
@@ -478,7 +478,7 @@ nix_tm_child_res_valid(struct nix_tm_node_list *list,
 }
 
 uint8_t
-nix_tm_tl1_default_prep(uint32_t schq, volatile uint64_t *reg,
+nix_tm_tl1_default_prep(struct nix *nix, uint32_t schq, volatile uint64_t *reg,
                        volatile uint64_t *regval)
 {
        uint8_t k = 0;
@@ -496,7 +496,7 @@ nix_tm_tl1_default_prep(uint32_t schq, volatile uint64_t *reg,
        k++;
 
        reg[k] = NIX_AF_TL1X_TOPOLOGY(schq);
-       regval[k] = (NIX_TM_TL1_DFLT_RR_PRIO << 1);
+       regval[k] = (nix->tm_aggr_lvl_rr_prio << 1);
        k++;
 
        reg[k] = NIX_AF_TL1X_CIR(schq);
@@ -540,7 +540,7 @@ nix_tm_topology_reg_prep(struct nix *nix, struct nix_tm_node *node,
         * Static Priority is disabled
         */
        if (hw_lvl == NIX_TXSCH_LVL_TL1 && nix->tm_flags & NIX_TM_TL1_NO_SP) {
-               rr_prio = NIX_TM_TL1_DFLT_RR_PRIO;
+               rr_prio = nix->tm_aggr_lvl_rr_prio;
                child = 0;
        }
 
@@ -662,7 +662,7 @@ nix_tm_sched_reg_prep(struct nix *nix, struct nix_tm_node *node,
         */
        if (hw_lvl == NIX_TXSCH_LVL_TL2 &&
            (!nix_tm_have_tl1_access(nix) || nix->tm_flags & NIX_TM_TL1_NO_SP))
-               strict_prio = NIX_TM_TL1_DFLT_RR_PRIO;
+               strict_prio = nix->tm_aggr_lvl_rr_prio;
 
        plt_tm_dbg("Schedule config node %s(%u) lvl %u id %u, "
                   "prio 0x%" PRIx64 ", rr_quantum/rr_wt 0x%" PRIx64 " (%p)",