event/octeontx2: add TIM bucket operations

Add TIM bucket operations used for event timer arm and cancel.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>

diff --git a/drivers/event/octeontx2/Makefile b/drivers/event/octeontx2/Makefile
index 87eb946..aac238b 100644 (file)
--- a/drivers/event/octeontx2/Makefile
+++ b/drivers/event/octeontx2/Makefile
@@ -35,6 +35,7 @@ LIBABIVER := 1
 
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_worker_dual.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_worker.c
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_tim_worker.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_evdev.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_evdev_adptr.c
 SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_tim_evdev.c

diff --git a/drivers/event/octeontx2/meson.build b/drivers/event/octeontx2/meson.build
index c709b5e..bdb5bee 100644 (file)
--- a/drivers/event/octeontx2/meson.build
+++ b/drivers/event/octeontx2/meson.build
@@ -9,6 +9,7 @@ sources = files('otx2_worker.c',
                'otx2_evdev_irq.c',
                'otx2_evdev_selftest.c',
                'otx2_tim_evdev.c',
+               'otx2_tim_worker.c'
                )
 
 allow_experimental_apis = true

diff --git a/drivers/event/octeontx2/otx2_tim_evdev.h b/drivers/event/octeontx2/otx2_tim_evdev.h
index aac7dc7..2be5d5f 100644 (file)
--- a/drivers/event/octeontx2/otx2_tim_evdev.h
+++ b/drivers/event/octeontx2/otx2_tim_evdev.h
@@ -25,6 +25,42 @@
 #define TIM_LF_RAS_INT_ENA_W1S         (0x310)
 #define TIM_LF_RAS_INT_ENA_W1C         (0x318)
 
+#define TIM_BUCKET_W1_S_CHUNK_REMAINDER        (48)
+#define TIM_BUCKET_W1_M_CHUNK_REMAINDER        ((1ULL << (64 - \
+                                        TIM_BUCKET_W1_S_CHUNK_REMAINDER)) - 1)
+#define TIM_BUCKET_W1_S_LOCK           (40)
+#define TIM_BUCKET_W1_M_LOCK           ((1ULL <<       \
+                                        (TIM_BUCKET_W1_S_CHUNK_REMAINDER - \
+                                         TIM_BUCKET_W1_S_LOCK)) - 1)
+#define TIM_BUCKET_W1_S_RSVD           (35)
+#define TIM_BUCKET_W1_S_BSK            (34)
+#define TIM_BUCKET_W1_M_BSK            ((1ULL <<       \
+                                        (TIM_BUCKET_W1_S_RSVD -            \
+                                         TIM_BUCKET_W1_S_BSK)) - 1)
+#define TIM_BUCKET_W1_S_HBT            (33)
+#define TIM_BUCKET_W1_M_HBT            ((1ULL <<       \
+                                        (TIM_BUCKET_W1_S_BSK -             \
+                                         TIM_BUCKET_W1_S_HBT)) - 1)
+#define TIM_BUCKET_W1_S_SBT            (32)
+#define TIM_BUCKET_W1_M_SBT            ((1ULL <<       \
+                                        (TIM_BUCKET_W1_S_HBT -             \
+                                         TIM_BUCKET_W1_S_SBT)) - 1)
+#define TIM_BUCKET_W1_S_NUM_ENTRIES    (0)
+#define TIM_BUCKET_W1_M_NUM_ENTRIES    ((1ULL <<       \
+                                        (TIM_BUCKET_W1_S_SBT -             \
+                                         TIM_BUCKET_W1_S_NUM_ENTRIES)) - 1)
+
+#define TIM_BUCKET_SEMA                        (TIM_BUCKET_CHUNK_REMAIN)
+
+#define TIM_BUCKET_CHUNK_REMAIN \
+       (TIM_BUCKET_W1_M_CHUNK_REMAINDER << TIM_BUCKET_W1_S_CHUNK_REMAINDER)
+
+#define TIM_BUCKET_LOCK \
+       (TIM_BUCKET_W1_M_LOCK << TIM_BUCKET_W1_S_LOCK)
+
+#define TIM_BUCKET_SEMA_WLOCK \
+       (TIM_BUCKET_CHUNK_REMAIN | (1ull << TIM_BUCKET_W1_S_LOCK))
+
 #define OTX2_MAX_TIM_RINGS             (256)
 #define OTX2_TIM_MAX_BUCKETS           (0xFFFFF)
 #define OTX2_TIM_RING_DEF_CHUNK_SZ     (4096)

diff --git a/drivers/event/octeontx2/otx2_tim_worker.c b/drivers/event/octeontx2/otx2_tim_worker.c
new file mode 100644 (file)
index 0000000..29ed1fd
--- /dev/null
+++ b/drivers/event/octeontx2/otx2_tim_worker.c
@@ -0,0 +1,7 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#include "otx2_tim_evdev.h"
+#include "otx2_tim_worker.h"
+

diff --git a/drivers/event/octeontx2/otx2_tim_worker.h b/drivers/event/octeontx2/otx2_tim_worker.h
new file mode 100644 (file)
index 0000000..ccb137d
--- /dev/null
+++ b/drivers/event/octeontx2/otx2_tim_worker.h
@@ -0,0 +1,111 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#ifndef __OTX2_TIM_WORKER_H__
+#define __OTX2_TIM_WORKER_H__
+
+#include "otx2_tim_evdev.h"
+
+static inline int16_t
+tim_bkt_fetch_rem(uint64_t w1)
+{
+       return (w1 >> TIM_BUCKET_W1_S_CHUNK_REMAINDER) &
+               TIM_BUCKET_W1_M_CHUNK_REMAINDER;
+}
+
+static inline int16_t
+tim_bkt_get_rem(struct otx2_tim_bkt *bktp)
+{
+       return __atomic_load_n(&bktp->chunk_remainder, __ATOMIC_ACQUIRE);
+}
+
+static inline void
+tim_bkt_set_rem(struct otx2_tim_bkt *bktp, uint16_t v)
+{
+       __atomic_store_n(&bktp->chunk_remainder, v, __ATOMIC_RELAXED);
+}
+
+static inline void
+tim_bkt_sub_rem(struct otx2_tim_bkt *bktp, uint16_t v)
+{
+       __atomic_fetch_sub(&bktp->chunk_remainder, v, __ATOMIC_RELAXED);
+}
+
+static inline uint8_t
+tim_bkt_get_hbt(uint64_t w1)
+{
+       return (w1 >> TIM_BUCKET_W1_S_HBT) & TIM_BUCKET_W1_M_HBT;
+}
+
+static inline uint8_t
+tim_bkt_get_bsk(uint64_t w1)
+{
+       return (w1 >> TIM_BUCKET_W1_S_BSK) & TIM_BUCKET_W1_M_BSK;
+}
+
+static inline uint64_t
+tim_bkt_clr_bsk(struct otx2_tim_bkt *bktp)
+{
+       /* Clear everything except lock. */
+       const uint64_t v = TIM_BUCKET_W1_M_LOCK << TIM_BUCKET_W1_S_LOCK;
+
+       return __atomic_fetch_and(&bktp->w1, v, __ATOMIC_ACQ_REL);
+}
+
+static inline uint64_t
+tim_bkt_fetch_sema_lock(struct otx2_tim_bkt *bktp)
+{
+       return __atomic_fetch_add(&bktp->w1, TIM_BUCKET_SEMA_WLOCK,
+                       __ATOMIC_ACQUIRE);
+}
+
+static inline uint64_t
+tim_bkt_fetch_sema(struct otx2_tim_bkt *bktp)
+{
+       return __atomic_fetch_add(&bktp->w1, TIM_BUCKET_SEMA, __ATOMIC_RELAXED);
+}
+
+static inline uint64_t
+tim_bkt_inc_lock(struct otx2_tim_bkt *bktp)
+{
+       const uint64_t v = 1ull << TIM_BUCKET_W1_S_LOCK;
+
+       return __atomic_fetch_add(&bktp->w1, v, __ATOMIC_ACQUIRE);
+}
+
+static inline void
+tim_bkt_dec_lock(struct otx2_tim_bkt *bktp)
+{
+       __atomic_add_fetch(&bktp->lock, 0xff, __ATOMIC_RELEASE);
+}
+
+static inline uint32_t
+tim_bkt_get_nent(uint64_t w1)
+{
+       return (w1 >> TIM_BUCKET_W1_S_NUM_ENTRIES) &
+               TIM_BUCKET_W1_M_NUM_ENTRIES;
+}
+
+static inline void
+tim_bkt_inc_nent(struct otx2_tim_bkt *bktp)
+{
+       __atomic_add_fetch(&bktp->nb_entry, 1, __ATOMIC_RELAXED);
+}
+
+static inline void
+tim_bkt_add_nent(struct otx2_tim_bkt *bktp, uint32_t v)
+{
+       __atomic_add_fetch(&bktp->nb_entry, v, __ATOMIC_RELAXED);
+}
+
+static inline uint64_t
+tim_bkt_clr_nent(struct otx2_tim_bkt *bktp)
+{
+       const uint64_t v = ~(TIM_BUCKET_W1_M_NUM_ENTRIES <<
+                       TIM_BUCKET_W1_S_NUM_ENTRIES);
+
+       return __atomic_and_fetch(&bktp->w1, v, __ATOMIC_ACQ_REL);
+}
+
+#endif /* __OTX2_TIM_WORKER_H__ */