common/cnxk: enable RVUM interrupt errata
authorHarman Kalra <hkalra@marvell.com>
Tue, 21 Sep 2021 11:00:37 +0000 (16:30 +0530)
committerJerin Jacob <jerinj@marvell.com>
Fri, 1 Oct 2021 05:31:39 +0000 (07:31 +0200)
As per an known HW issue RVUM interrupts may get dropped, If an RVUM
interrupt event occurs when PCCPF_XXX_MSIX_CAP_HDR[MSIXEN]=0 then no
interrupt is triggered, which is expected. But after MSIXEN is set to
1, subsequently if same interrupts event occurs again, still no
interrupt will be triggered.

As a workaround, all RVUM interrupt lines should be cleared between
MSIXEN=0 and MSIXEN=1.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
drivers/common/cnxk/roc_dev.c

index 4e20437..ce6980c 100644 (file)
@@ -884,6 +884,38 @@ vf_flr_register_irqs(struct plt_pci_device *pci_dev, struct dev *dev)
        return 0;
 }
 
+static void
+clear_rvum_interrupts(struct dev *dev)
+{
+       uint64_t intr;
+       int i;
+
+       if (dev_is_vf(dev)) {
+               /* Clear VF mbox interrupt */
+               intr = plt_read64(dev->bar2 + RVU_VF_INT);
+               if (intr)
+                       plt_write64(intr, dev->bar2 + RVU_VF_INT);
+       } else {
+               /* Clear AF PF interrupt line */
+               intr = plt_read64(dev->bar2 + RVU_PF_INT);
+               if (intr)
+                       plt_write64(intr, dev->bar2 + RVU_PF_INT);
+               for (i = 0; i < MAX_VFPF_DWORD_BITS; ++i) {
+                       /* Clear MBOX interrupts */
+                       intr = plt_read64(dev->bar2 + RVU_PF_VFPF_MBOX_INTX(i));
+                       if (intr)
+                               plt_write64(intr,
+                                           dev->bar2 +
+                                                   RVU_PF_VFPF_MBOX_INTX(i));
+                       /* Clear VF FLR interrupts */
+                       intr = plt_read64(dev->bar2 + RVU_PF_VFFLR_INTX(i));
+                       if (intr)
+                               plt_write64(intr,
+                                           dev->bar2 + RVU_PF_VFFLR_INTX(i));
+               }
+       }
+}
+
 int
 dev_active_vfs(struct dev *dev)
 {
@@ -1090,6 +1122,9 @@ dev_init(struct dev *dev, struct plt_pci_device *pci_dev)
                intr_offset = RVU_PF_INT;
        }
 
+       /* Clear all RVUM interrupts */
+       clear_rvum_interrupts(dev);
+
        /* Initialize the local mbox */
        rc = mbox_init(&dev->mbox_local, mbox, bar2, direction, 1, intr_offset);
        if (rc)