'mlx5dv_dr_action_create_aso' ],
[ 'HAVE_INFINIBAND_VERBS_H', 'infiniband/verbs.h',
'INFINIBAND_VERBS_H' ],
+ [ 'HAVE_MLX5_UMR_IMKEY', 'infiniband/mlx5dv.h',
+ 'MLX5_WQE_UMR_CTRL_FLAG_INLINE' ],
]
config = configuration_data()
foreach arg:has_sym_args
MLX5_SET(mkc, mkc, qpn, 0xffffff);
MLX5_SET(mkc, mkc, pd, attr->pd);
MLX5_SET(mkc, mkc, mkey_7_0, attr->umem_id & 0xFF);
+ MLX5_SET(mkc, mkc, umr_en, attr->umr_en);
MLX5_SET(mkc, mkc, translations_octword_size, translation_size);
MLX5_SET(mkc, mkc, relaxed_ordering_write,
attr->relaxed_ordering_write);
mini_cqe_resp_flow_tag);
attr->mini_cqe_resp_l3_l4_tag = MLX5_GET(cmd_hca_cap, hcattr,
mini_cqe_resp_l3_l4_tag);
+ attr->umr_indirect_mkey_disabled =
+ MLX5_GET(cmd_hca_cap, hcattr, umr_indirect_mkey_disabled);
+ attr->umr_modify_entity_size_disabled =
+ MLX5_GET(cmd_hca_cap, hcattr, umr_modify_entity_size_disabled);
if (attr->qos.sup) {
MLX5_SET(query_hca_cap_in, in, op_mod,
MLX5_GET_HCA_CAP_OP_MOD_QOS_CAP |
uint32_t pg_access:1;
uint32_t relaxed_ordering_write:1;
uint32_t relaxed_ordering_read:1;
+ uint32_t umr_en:1;
struct mlx5_klm *klm_array;
int klm_num;
};
uint32_t log_max_mmo_dma:5;
uint32_t log_max_mmo_compress:5;
uint32_t log_max_mmo_decompress:5;
+ uint32_t umr_modify_entity_size_disabled:1;
+ uint32_t umr_indirect_mkey_disabled:1;
};
struct mlx5_devx_wq_attr {