common/mlx5: add user memory registration bits
authorSuanming Mou <suanmingm@nvidia.com>
Wed, 7 Apr 2021 07:21:38 +0000 (10:21 +0300)
committerThomas Monjalon <thomas@monjalon.net>
Thu, 8 Apr 2021 20:42:48 +0000 (22:42 +0200)
This commit adds the UMR capability bits.

Signed-off-by: Suanming Mou <suanmingm@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
drivers/common/mlx5/linux/meson.build
drivers/common/mlx5/mlx5_devx_cmds.c
drivers/common/mlx5/mlx5_devx_cmds.h

index 220de35..5d6a861 100644 (file)
@@ -186,6 +186,8 @@ has_sym_args = [
        'mlx5dv_dr_action_create_aso' ],
        [ 'HAVE_INFINIBAND_VERBS_H', 'infiniband/verbs.h',
        'INFINIBAND_VERBS_H' ],
+        [ 'HAVE_MLX5_UMR_IMKEY', 'infiniband/mlx5dv.h',
+        'MLX5_WQE_UMR_CTRL_FLAG_INLINE' ],
 ]
 config = configuration_data()
 foreach arg:has_sym_args
index c90e020..268bcd0 100644 (file)
@@ -266,6 +266,7 @@ mlx5_devx_cmd_mkey_create(void *ctx,
        MLX5_SET(mkc, mkc, qpn, 0xffffff);
        MLX5_SET(mkc, mkc, pd, attr->pd);
        MLX5_SET(mkc, mkc, mkey_7_0, attr->umem_id & 0xFF);
+       MLX5_SET(mkc, mkc, umr_en, attr->umr_en);
        MLX5_SET(mkc, mkc, translations_octword_size, translation_size);
        MLX5_SET(mkc, mkc, relaxed_ordering_write,
                 attr->relaxed_ordering_write);
@@ -752,6 +753,10 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
                                                mini_cqe_resp_flow_tag);
        attr->mini_cqe_resp_l3_l4_tag = MLX5_GET(cmd_hca_cap, hcattr,
                                                 mini_cqe_resp_l3_l4_tag);
+       attr->umr_indirect_mkey_disabled =
+               MLX5_GET(cmd_hca_cap, hcattr, umr_indirect_mkey_disabled);
+       attr->umr_modify_entity_size_disabled =
+               MLX5_GET(cmd_hca_cap, hcattr, umr_modify_entity_size_disabled);
        if (attr->qos.sup) {
                MLX5_SET(query_hca_cap_in, in, op_mod,
                         MLX5_GET_HCA_CAP_OP_MOD_QOS_CAP |
index 2826c0b..67b5f77 100644 (file)
@@ -31,6 +31,7 @@ struct mlx5_devx_mkey_attr {
        uint32_t pg_access:1;
        uint32_t relaxed_ordering_write:1;
        uint32_t relaxed_ordering_read:1;
+       uint32_t umr_en:1;
        struct mlx5_klm *klm_array;
        int klm_num;
 };
@@ -151,6 +152,8 @@ struct mlx5_hca_attr {
        uint32_t log_max_mmo_dma:5;
        uint32_t log_max_mmo_compress:5;
        uint32_t log_max_mmo_decompress:5;
+       uint32_t umr_modify_entity_size_disabled:1;
+       uint32_t umr_indirect_mkey_disabled:1;
 };
 
 struct mlx5_devx_wq_attr {