}
if (!strcmp(res->name, "txpt"))
- tx_thresh.pthresh = res->value;
+ tx_pthresh = res->value;
else if(!strcmp(res->name, "txht"))
- tx_thresh.hthresh = res->value;
+ tx_hthresh = res->value;
else if(!strcmp(res->name, "txwt"))
- tx_thresh.wthresh = res->value;
+ tx_wthresh = res->value;
else if(!strcmp(res->name, "rxpt"))
- rx_thresh.pthresh = res->value;
+ rx_pthresh = res->value;
else if(!strcmp(res->name, "rxht"))
- rx_thresh.hthresh = res->value;
+ rx_hthresh = res->value;
else if(!strcmp(res->name, "rxwt"))
- rx_thresh.wthresh = res->value;
+ rx_wthresh = res->value;
else {
printf("Unknown parameter\n");
return;
printf(" packet len=%u - nb packet segments=%d\n",
(unsigned)tx_pkt_length, (int) tx_pkt_nb_segs);
+ struct rte_eth_rxconf *rx_conf = &ports[0].rx_conf;
+ struct rte_eth_txconf *tx_conf = &ports[0].tx_conf;
+
printf(" nb forwarding cores=%d - nb forwarding ports=%d\n",
nb_fwd_lcores, nb_fwd_ports);
printf(" RX queues=%d - RX desc=%d - RX free threshold=%d\n",
- nb_rxq, nb_rxd, rx_free_thresh);
+ nb_rxq, nb_rxd, rx_conf->rx_free_thresh);
printf(" RX threshold registers: pthresh=%d hthresh=%d wthresh=%d\n",
- rx_thresh.pthresh, rx_thresh.hthresh, rx_thresh.wthresh);
+ rx_conf->rx_thresh.pthresh, rx_conf->rx_thresh.hthresh,
+ rx_conf->rx_thresh.wthresh);
printf(" TX queues=%d - TX desc=%d - TX free threshold=%d\n",
- nb_txq, nb_txd, tx_free_thresh);
+ nb_txq, nb_txd, tx_conf->tx_free_thresh);
printf(" TX threshold registers: pthresh=%d hthresh=%d wthresh=%d\n",
- tx_thresh.pthresh, tx_thresh.hthresh, tx_thresh.wthresh);
+ tx_conf->tx_thresh.pthresh, tx_conf->tx_thresh.hthresh,
+ tx_conf->tx_thresh.wthresh);
printf(" TX RS bit threshold=%d - TXQ flags=0x%"PRIx32"\n",
- tx_rs_thresh, txq_flags);
+ tx_conf->tx_rs_thresh, tx_conf->txq_flags);
}
void
if (!strcmp(lgopts[opt_idx].name, "txfreet")) {
n = atoi(optarg);
if (n >= 0)
- tx_free_thresh = (uint16_t)n;
+ tx_free_thresh = (int16_t)n;
else
rte_exit(EXIT_FAILURE, "txfreet must be >= 0\n");
}
if (!strcmp(lgopts[opt_idx].name, "txrst")) {
n = atoi(optarg);
if (n >= 0)
- tx_rs_thresh = (uint16_t)n;
+ tx_rs_thresh = (int16_t)n;
else
rte_exit(EXIT_FAILURE, "txrst must be >= 0\n");
}
char *end = NULL;
n = strtoul(optarg, &end, 16);
if (n >= 0)
- txq_flags = (uint32_t)n;
+ txq_flags = (int32_t)n;
else
rte_exit(EXIT_FAILURE,
"txqflags must be >= 0\n");
if (!strcmp(lgopts[opt_idx].name, "txpt")) {
n = atoi(optarg);
if (n >= 0)
- tx_thresh.pthresh = (uint8_t)n;
+ tx_pthresh = (int8_t)n;
else
rte_exit(EXIT_FAILURE, "txpt must be >= 0\n");
}
if (!strcmp(lgopts[opt_idx].name, "txht")) {
n = atoi(optarg);
if (n >= 0)
- tx_thresh.hthresh = (uint8_t)n;
+ tx_hthresh = (int8_t)n;
else
rte_exit(EXIT_FAILURE, "txht must be >= 0\n");
}
if (!strcmp(lgopts[opt_idx].name, "txwt")) {
n = atoi(optarg);
if (n >= 0)
- tx_thresh.wthresh = (uint8_t)n;
+ tx_wthresh = (int8_t)n;
else
rte_exit(EXIT_FAILURE, "txwt must be >= 0\n");
}
if (!strcmp(lgopts[opt_idx].name, "rxpt")) {
n = atoi(optarg);
if (n >= 0)
- rx_thresh.pthresh = (uint8_t)n;
+ rx_pthresh = (int8_t)n;
else
rte_exit(EXIT_FAILURE, "rxpt must be >= 0\n");
}
if (!strcmp(lgopts[opt_idx].name, "rxht")) {
n = atoi(optarg);
if (n >= 0)
- rx_thresh.hthresh = (uint8_t)n;
+ rx_hthresh = (int8_t)n;
else
rte_exit(EXIT_FAILURE, "rxht must be >= 0\n");
}
if (!strcmp(lgopts[opt_idx].name, "rxwt")) {
n = atoi(optarg);
if (n >= 0)
- rx_thresh.wthresh = (uint8_t)n;
+ rx_wthresh = (int8_t)n;
else
rte_exit(EXIT_FAILURE, "rxwt must be >= 0\n");
}
if (!strcmp(lgopts[opt_idx].name, "rxfreet")) {
n = atoi(optarg);
if (n >= 0)
- rx_free_thresh = (uint16_t)n;
+ rx_free_thresh = (int16_t)n;
else
rte_exit(EXIT_FAILURE, "rxfreet must be >= 0\n");
}
uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT; /**< Number of RX descriptors. */
uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT; /**< Number of TX descriptors. */
+#define RTE_PMD_PARAM_UNSET -1
/*
* Configurable values of RX and TX ring threshold registers.
*/
-#define RX_PTHRESH 8 /**< Default value of RX prefetch threshold register. */
-#define RX_HTHRESH 8 /**< Default value of RX host threshold register. */
-#define RX_WTHRESH 0 /**< Default value of RX write-back threshold register. */
-
-#define TX_PTHRESH 32 /**< Default value of TX prefetch threshold register. */
-#define TX_HTHRESH 0 /**< Default value of TX host threshold register. */
-#define TX_WTHRESH 0 /**< Default value of TX write-back threshold register. */
-
-struct rte_eth_thresh rx_thresh = {
- .pthresh = RX_PTHRESH,
- .hthresh = RX_HTHRESH,
- .wthresh = RX_WTHRESH,
-};
-struct rte_eth_thresh tx_thresh = {
- .pthresh = TX_PTHRESH,
- .hthresh = TX_HTHRESH,
- .wthresh = TX_WTHRESH,
-};
+int8_t rx_pthresh = RTE_PMD_PARAM_UNSET;
+int8_t rx_hthresh = RTE_PMD_PARAM_UNSET;
+int8_t rx_wthresh = RTE_PMD_PARAM_UNSET;
+
+int8_t tx_pthresh = RTE_PMD_PARAM_UNSET;
+int8_t tx_hthresh = RTE_PMD_PARAM_UNSET;
+int8_t tx_wthresh = RTE_PMD_PARAM_UNSET;
/*
* Configurable value of RX free threshold.
*/
-uint16_t rx_free_thresh = 32; /* Refill RX descriptors once every 32 packets,
- This setting is needed for ixgbe to enable bulk alloc or vector
- receive functionality. */
+int16_t rx_free_thresh = RTE_PMD_PARAM_UNSET;
/*
* Configurable value of RX drop enable.
*/
-uint8_t rx_drop_en = 0; /* Drop packets when no descriptors for queue. */
+int8_t rx_drop_en = RTE_PMD_PARAM_UNSET;
/*
* Configurable value of TX free threshold.
*/
-uint16_t tx_free_thresh = 0; /* Use default values. */
+int16_t tx_free_thresh = RTE_PMD_PARAM_UNSET;
/*
* Configurable value of TX RS bit threshold.
*/
-uint16_t tx_rs_thresh = 0; /* Use default values. */
+int16_t tx_rs_thresh = RTE_PMD_PARAM_UNSET;
/*
* Configurable value of TX queue flags.
*/
-uint32_t txq_flags = 0; /* No flags set. */
+int32_t txq_flags = RTE_PMD_PARAM_UNSET;
/*
* Receive Side Scaling (RSS) configuration.
}
}
+static void
+rxtx_port_config(struct rte_port *port)
+{
+ port->rx_conf = port->dev_info.default_rxconf;
+ port->tx_conf = port->dev_info.default_txconf;
+
+ /* Check if any RX/TX parameters have been passed */
+ if (rx_pthresh != RTE_PMD_PARAM_UNSET)
+ port->rx_conf.rx_thresh.pthresh = rx_pthresh;
+
+ if (rx_hthresh != RTE_PMD_PARAM_UNSET)
+ port->rx_conf.rx_thresh.hthresh = rx_hthresh;
+
+ if (rx_wthresh != RTE_PMD_PARAM_UNSET)
+ port->rx_conf.rx_thresh.wthresh = rx_wthresh;
+
+ if (rx_free_thresh != RTE_PMD_PARAM_UNSET)
+ port->rx_conf.rx_free_thresh = rx_free_thresh;
+
+ if (rx_drop_en != RTE_PMD_PARAM_UNSET)
+ port->rx_conf.rx_drop_en = rx_drop_en;
+
+ if (tx_pthresh != RTE_PMD_PARAM_UNSET)
+ port->tx_conf.tx_thresh.pthresh = tx_pthresh;
+
+ if (tx_hthresh != RTE_PMD_PARAM_UNSET)
+ port->tx_conf.tx_thresh.hthresh = tx_hthresh;
+
+ if (tx_wthresh != RTE_PMD_PARAM_UNSET)
+ port->tx_conf.tx_thresh.wthresh = tx_wthresh;
+
+ if (tx_rs_thresh != RTE_PMD_PARAM_UNSET)
+ port->tx_conf.tx_rs_thresh = tx_rs_thresh;
+
+ if (tx_free_thresh != RTE_PMD_PARAM_UNSET)
+ port->tx_conf.tx_free_thresh = tx_free_thresh;
+
+ if (txq_flags != RTE_PMD_PARAM_UNSET)
+ port->tx_conf.txq_flags = txq_flags;
+}
+
void
init_port_config(void)
{
port->dev_conf.txmode.mq_mode = ETH_MQ_TX_NONE;
}
- port->rx_conf.rx_thresh = rx_thresh;
- port->rx_conf.rx_free_thresh = rx_free_thresh;
- port->rx_conf.rx_drop_en = rx_drop_en;
- port->tx_conf.tx_thresh = tx_thresh;
- port->tx_conf.tx_rs_thresh = tx_rs_thresh;
- port->tx_conf.tx_free_thresh = tx_free_thresh;
- port->tx_conf.txq_flags = txq_flags;
+ rxtx_port_config(port);
rte_eth_macaddr_get(pid, &port->eth_addr);
rte_port = &ports[pid];
memcpy(&rte_port->dev_conf, &port_conf,sizeof(struct rte_eth_conf));
- rte_port->rx_conf.rx_thresh = rx_thresh;
- rte_port->rx_conf.rx_free_thresh = rx_free_thresh;
- rte_port->tx_conf.tx_thresh = tx_thresh;
- rte_port->tx_conf.tx_rs_thresh = tx_rs_thresh;
- rte_port->tx_conf.tx_free_thresh = tx_free_thresh;
+ rxtx_port_config(rte_port);
/* VLAN filter */
rte_port->dev_conf.rxmode.hw_vlan_filter = 1;
for (i = 0; i < nb_vlan; i++){
extern uint16_t nb_rxd;
extern uint16_t nb_txd;
-extern uint16_t rx_free_thresh;
-extern uint8_t rx_drop_en;
-extern uint16_t tx_free_thresh;
-extern uint16_t tx_rs_thresh;
-extern uint32_t txq_flags;
+extern int16_t rx_free_thresh;
+extern int8_t rx_drop_en;
+extern int16_t tx_free_thresh;
+extern int16_t tx_rs_thresh;
+extern int32_t txq_flags;
extern uint8_t dcb_config;
extern uint8_t dcb_test;
extern uint16_t nb_pkt_per_burst;
extern uint16_t mb_mempool_cache;
-extern struct rte_eth_thresh rx_thresh;
-extern struct rte_eth_thresh tx_thresh;
+extern int8_t rx_pthresh;
+extern int8_t rx_hthresh;
+extern int8_t rx_wthresh;
+extern int8_t tx_pthresh;
+extern int8_t tx_hthresh;
+extern int8_t tx_wthresh;
extern struct fwd_config cur_fwd_config;
extern struct fwd_engine *cur_fwd_eng;