net/mlx5: fix modify field action endianness
authorAlexander Kozyrev <akozyrev@nvidia.com>
Fri, 2 Apr 2021 02:07:41 +0000 (02:07 +0000)
committerRaslan Darawsheh <rasland@nvidia.com>
Tue, 13 Apr 2021 11:22:57 +0000 (13:22 +0200)
Converting modify_field action masks to the big endian format is wrong
for small (less than 4 bytes) fields. Use the BE conversions appropriate
for a field size, not rte_cpu_to_be_32 for everything.

Fixes: 144127ba5660 ("net/mlx5: adjust modify field action endianness")
Cc: stable@dpdk.org
Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
drivers/net/mlx5/mlx5_flow_dv.c

index f1b06d0..139e604 100644 (file)
@@ -1360,8 +1360,7 @@ mlx5_flow_field_id_to_modify_info
                        }
                        info[idx] = (struct field_modify_info){2, 4 * idx,
                                                MLX5_MODI_OUT_DMAC_15_0};
-                       mask[idx] = rte_cpu_to_be_32(0x0000ffff >>
-                                                    (16 - width));
+                       mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
                } else {
                        if (data->offset < 32)
                                info[idx++] = (struct field_modify_info){4, 0,
@@ -1390,8 +1389,7 @@ mlx5_flow_field_id_to_modify_info
                        }
                        info[idx] = (struct field_modify_info){2, 4 * idx,
                                                MLX5_MODI_OUT_SMAC_15_0};
-                       mask[idx] = rte_cpu_to_be_32(0x0000ffff >>
-                                                    (16 - width));
+                       mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
                } else {
                        if (data->offset < 32)
                                info[idx++] = (struct field_modify_info){4, 0,
@@ -1407,29 +1405,25 @@ mlx5_flow_field_id_to_modify_info
                info[idx] = (struct field_modify_info){2, 0,
                                        MLX5_MODI_OUT_FIRST_VID};
                if (mask)
-                       mask[idx] = rte_cpu_to_be_32(0x00000fff >>
-                                                    (12 - width));
+                       mask[idx] = rte_cpu_to_be_16(0x0fff >> (12 - width));
                break;
        case RTE_FLOW_FIELD_MAC_TYPE:
                info[idx] = (struct field_modify_info){2, 0,
                                        MLX5_MODI_OUT_ETHERTYPE};
                if (mask)
-                       mask[idx] = rte_cpu_to_be_32(0x0000ffff >>
-                                                    (16 - width));
+                       mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
                break;
        case RTE_FLOW_FIELD_IPV4_DSCP:
                info[idx] = (struct field_modify_info){1, 0,
                                        MLX5_MODI_OUT_IP_DSCP};
                if (mask)
-                       mask[idx] = rte_cpu_to_be_32(0x0000003f >>
-                                                    (6 - width));
+                       mask[idx] = 0x3f >> (6 - width);
                break;
        case RTE_FLOW_FIELD_IPV4_TTL:
                info[idx] = (struct field_modify_info){1, 0,
                                        MLX5_MODI_OUT_IPV4_TTL};
                if (mask)
-                       mask[idx] = rte_cpu_to_be_32(0x000000ff >>
-                                                    (8 - width));
+                       mask[idx] = 0xff >> (8 - width);
                break;
        case RTE_FLOW_FIELD_IPV4_SRC:
                info[idx] = (struct field_modify_info){4, 0,
@@ -1449,15 +1443,13 @@ mlx5_flow_field_id_to_modify_info
                info[idx] = (struct field_modify_info){1, 0,
                                        MLX5_MODI_OUT_IP_DSCP};
                if (mask)
-                       mask[idx] = rte_cpu_to_be_32(0x0000003f >>
-                                                    (6 - width));
+                       mask[idx] = 0x3f >> (6 - width);
                break;
        case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
                info[idx] = (struct field_modify_info){1, 0,
                                        MLX5_MODI_OUT_IPV6_HOPLIMIT};
                if (mask)
-                       mask[idx] = rte_cpu_to_be_32(0x000000ff >>
-                                                    (8 - width));
+                       mask[idx] = 0xff >> (8 - width);
                break;
        case RTE_FLOW_FIELD_IPV6_SRC:
                if (mask) {
@@ -1607,15 +1599,13 @@ mlx5_flow_field_id_to_modify_info
                info[idx] = (struct field_modify_info){2, 0,
                                        MLX5_MODI_OUT_TCP_SPORT};
                if (mask)
-                       mask[idx] = rte_cpu_to_be_32(0x0000ffff >>
-                                                    (16 - width));
+                       mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
                break;
        case RTE_FLOW_FIELD_TCP_PORT_DST:
                info[idx] = (struct field_modify_info){2, 0,
                                        MLX5_MODI_OUT_TCP_DPORT};
                if (mask)
-                       mask[idx] = rte_cpu_to_be_32(0x0000ffff >>
-                                                    (16 - width));
+                       mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
                break;
        case RTE_FLOW_FIELD_TCP_SEQ_NUM:
                info[idx] = (struct field_modify_info){4, 0,
@@ -1635,22 +1625,19 @@ mlx5_flow_field_id_to_modify_info
                info[idx] = (struct field_modify_info){1, 0,
                                        MLX5_MODI_OUT_TCP_FLAGS};
                if (mask)
-                       mask[idx] = rte_cpu_to_be_32(0x0000003f >>
-                                                    (6 - width));
+                       mask[idx] = 0x3f >> (6 - width);
                break;
        case RTE_FLOW_FIELD_UDP_PORT_SRC:
                info[idx] = (struct field_modify_info){2, 0,
                                        MLX5_MODI_OUT_UDP_SPORT};
                if (mask)
-                       mask[idx] = rte_cpu_to_be_32(0x0000ffff >>
-                                                    (16 - width));
+                       mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
                break;
        case RTE_FLOW_FIELD_UDP_PORT_DST:
                info[idx] = (struct field_modify_info){2, 0,
                                        MLX5_MODI_OUT_UDP_DPORT};
                if (mask)
-                       mask[idx] = rte_cpu_to_be_32(0x0000ffff >>
-                                                    (16 - width));
+                       mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
                break;
        case RTE_FLOW_FIELD_VXLAN_VNI:
                /* not supported yet */