#
LIB = librte_pmd_avf.a
-CFLAGS += -O3 $(WERROR_FLAGS) -Wno-strict-aliasing
+CFLAGS += -O3 $(WERROR_FLAGS) -Wno-strict-aliasing -DALLOW_EXPERIMENTAL_API
LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_ring
LDLIBS += -lrte_ethdev -lrte_net -lrte_kvargs -lrte_hash
LDLIBS += -lrte_bus_pci
#define avf_memset(a, b, c, d) memset((a), (b), (c))
#define avf_memcpy(a, b, c, d) rte_memcpy((a), (b), (c))
-#define avf_usec_delay(x) rte_delay_us(x)
-#define avf_msec_delay(x) rte_delay_us(1000*(x))
+#define avf_usec_delay(x) rte_delay_us_sleep(x)
+#define avf_msec_delay(x) avf_usec_delay(1000 * (x))
#define AVF_PCI_REG(reg) rte_read32(reg)
#define AVF_PCI_REG_ADDR(a, reg) \
cflags += ['-Wno-strict-aliasing']
+allow_experimental_apis = true
+
subdir('base')
objs = [base_objs]
CFLAGS += -O3
CFLAGS += $(WERROR_FLAGS)
+CFLAGS += -DALLOW_EXPERIMENTAL_API
LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_ring
LDLIBS += -lrte_ethdev -lrte_net -lrte_kvargs
LDLIBS += -lrte_bus_pci
#include "../e1000_logs.h"
-#define DELAY(x) rte_delay_us(x)
+#define DELAY(x) rte_delay_us_sleep(x)
#define usec_delay(x) DELAY(x)
#define usec_delay_irq(x) DELAY(x)
#define msec_delay(x) DELAY(1000*(x))
# SPDX-License-Identifier: BSD-3-Clause
# Copyright(c) 2017 Intel Corporation
+allow_experimental_apis = true
+
subdir('base')
objs = [base_objs]
#define i40e_memcpy(a, b, c, d) rte_memcpy((a), (b), (c))
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
-#define DELAY(x) rte_delay_us(x)
-#define i40e_usec_delay(x) rte_delay_us(x)
-#define i40e_msec_delay(x) rte_delay_us(1000*(x))
+#define DELAY(x) rte_delay_us_sleep(x)
+#define i40e_usec_delay(x) DELAY(x)
+#define i40e_msec_delay(x) DELAY(1000 * (x))
#define udelay(x) DELAY(x)
#define msleep(x) DELAY(1000*(x))
#define usleep_range(min, max) msleep(DIV_ROUND_UP(min, 1000))
#define DEBUGOUT(S, args...) RTE_LOG(DEBUG, PMD, S, ##args)
#define STATIC static
-#define msec_delay rte_delay_ms
+#define msec_delay(x) rte_delay_us_sleep(1000 * (x))
#define IFCVF_READ_REG8(reg) rte_read8(reg)
#define IFCVF_WRITE_REG8(val, reg) rte_write8((val), (reg))
#define ASSERT(x) if(!(x)) rte_panic("IXGBE: x")
-#define DELAY(x) rte_delay_us(x)
+#define DELAY(x) rte_delay_us_sleep(x)
#define usec_delay(x) DELAY(x)
#define msec_delay(x) DELAY(1000*(x))
cflags += ['-DRTE_LIBRTE_IXGBE_BYPASS']
+allow_experimental_apis = true
+
subdir('base')
objs = [base_objs]
-allow_experimental_apis = true
sources = files(
'ixgbe_82599_bypass.c',
'ixgbe_bypass.c',