val &= ~AEU_INPUTS_ATTN_BITS_SPIO5;
REG_WR(sc, reg_offset, val);
- PMD_DRV_LOG(WARN, "SPIO5 hw attention");
+ PMD_DRV_LOG(WARNING, "SPIO5 hw attention");
/* Fan failure attention */
elink_hw_reset_phy(&sc->link_params);
}
if (unlikely(status)) {
- PMD_DRV_LOG(WARN,
+ PMD_DRV_LOG(WARNING,
"Unexpected fastpath status (0x%08x)!", status);
}
/* If there is no power capability, silently succeed */
if (!(sc->devinfo.pcie_cap_flags & BNX2X_PM_CAPABLE_FLAG)) {
- PMD_DRV_LOG(WARN, "No power capability");
+ PMD_DRV_LOG(WARNING, "No power capability");
return 0;
}
/* validate rings have enough entries to cross high thresholds */
if (sc->dropless_fc &&
pause->bd_th_hi + FW_PREFETCH_CNT > sc->rx_ring_size) {
- PMD_DRV_LOG(WARN, "rx bd ring threshold limit");
+ PMD_DRV_LOG(WARNING, "rx bd ring threshold limit");
}
if (sc->dropless_fc &&
pause->rcq_th_hi + FW_PREFETCH_CNT > USABLE_RCQ_ENTRIES(rxq)) {
- PMD_DRV_LOG(WARN, "rcq ring threshold limit");
+ PMD_DRV_LOG(WARNING, "rcq ring threshold limit");
}
pause->pri_map = 1;
{
if ((sc->state != BNX2X_STATE_OPEN) ||
(atomic_load_acq_long(&sc->periodic_flags) == PERIODIC_STOP)) {
- PMD_DRV_LOG(WARN, "periodic callout exit (state=0x%x)",
+ PMD_DRV_LOG(WARNING, "periodic callout exit (state=0x%x)",
sc->state);
return;
}
return ret;
}
- PMD_DRV_LOG(WARN, "PCIe capability NOT FOUND!!!");
+ PMD_DRV_LOG(WARNING, "PCIe capability NOT FOUND!!!");
return 0;
}
/* only E2 and onwards support FLR */
if (CHIP_IS_E1x(sc)) {
- PMD_DRV_LOG(WARN, "FLR not supported in E1H");
+ PMD_DRV_LOG(WARNING, "FLR not supported in E1H");
return -1;
}
/* only bootcode REQ_BC_VER_4_INITIATE_FLR and onwards support flr */
if (sc->devinfo.bc_ver < REQ_BC_VER_4_INITIATE_FLR) {
- PMD_DRV_LOG(WARN,
+ PMD_DRV_LOG(WARNING,
"FLR not supported by BC_VER: 0x%08x",
sc->devinfo.bc_ver);
return -1;
if (cos < sc->max_cos) {
sc->prio_to_cos[pri] = cos;
} else {
- PMD_DRV_LOG(WARN,
+ PMD_DRV_LOG(WARNING,
"Invalid COS %d for priority %d "
"(max COS is %d), setting to 0", cos, pri,
(sc->max_cos - 1));
elink_lfa_reset(&sc->link_params, &sc->link_vars);
} else {
if (!CHIP_REV_IS_SLOW(sc)) {
- PMD_DRV_LOG(WARN,
+ PMD_DRV_LOG(WARNING,
"Bootcode is missing - cannot reset link");
}
}
break;
case ECORE_MCAST_CMD_DEL:
- ECORE_MSG(sc,
- "Invalidating multicast MACs configuration");
+ ECORE_MSG("Invalidating multicast MACs configuration");
/* clear the registry */
ECORE_MEMSET(o->registry.aprox_match.vec, 0,
"illegal value for next tx_only: %d. max cos was %d",
o->next_tx_only, o->max_cos);
- ECORE_MSG(sc,
- "Completing command %d for queue %d, setting state to %d",
+ ECORE_MSG("Completing command %d for queue %d, setting state to %d",
cmd, o->cids[ECORE_PRIMARY_CID_INDEX], o->next_state);
if (o->next_tx_only) /* print num tx-only if any exist */
return ECORE_INVAL;
}
- ECORE_MSG(sc,
- "Completing command %d for func %d, setting state to %d",
+ ECORE_MSG("Completing command %d for func %d, setting state to %d",
cmd, ECORE_FUNC_ID(sc), o->next_state);
o->state = o->next_state;
* read and we will have to put a full memory barrier there
* (inside ecore_sp_post()).
*/
- ECORE_MSG(sc,
- "afex: sending func_update vif_id 0x%x dvlan 0x%x prio 0x%x",
+ ECORE_MSG("afex: sending func_update vif_id 0x%x dvlan 0x%x prio 0x%x",
rdata->vif_id,
rdata->afex_default_vlan, rdata->allowed_priorities);