crypto/cnxk: add device control operations

Add ops for
- dev_configure()
- dev_start()
- dev_stop()
- dev_close()
- dev_infos_get()

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>

diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
index 6f80f74..b0eccb3 100644 (file)
--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
@@ -7,14 +7,25 @@
 
 #include "cn10k_cryptodev.h"
 #include "cn10k_cryptodev_ops.h"
+#include "cnxk_cryptodev_ops.h"
+
+static void
+cn10k_cpt_dev_info_get(struct rte_cryptodev *dev,
+                      struct rte_cryptodev_info *info)
+{
+       if (info != NULL) {
+               cnxk_cpt_dev_info_get(dev, info);
+               info->driver_id = cn10k_cryptodev_driver_id;
+       }
+}
 
 struct rte_cryptodev_ops cn10k_cpt_ops = {
        /* Device control ops */
-       .dev_configure = NULL,
-       .dev_start = NULL,
-       .dev_stop = NULL,
-       .dev_close = NULL,
-       .dev_infos_get = NULL,
+       .dev_configure = cnxk_cpt_dev_config,
+       .dev_start = cnxk_cpt_dev_start,
+       .dev_stop = cnxk_cpt_dev_stop,
+       .dev_close = cnxk_cpt_dev_close,
+       .dev_infos_get = cn10k_cpt_dev_info_get,
 
        .stats_get = NULL,
        .stats_reset = NULL,

diff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
index 51f9845..acfb071 100644 (file)
--- a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
@@ -7,14 +7,25 @@
 
 #include "cn9k_cryptodev.h"
 #include "cn9k_cryptodev_ops.h"
+#include "cnxk_cryptodev_ops.h"
+
+static void
+cn9k_cpt_dev_info_get(struct rte_cryptodev *dev,
+                     struct rte_cryptodev_info *info)
+{
+       if (info != NULL) {
+               cnxk_cpt_dev_info_get(dev, info);
+               info->driver_id = cn9k_cryptodev_driver_id;
+       }
+}
 
 struct rte_cryptodev_ops cn9k_cpt_ops = {
        /* Device control ops */
-       .dev_configure = NULL,
-       .dev_start = NULL,
-       .dev_stop = NULL,
-       .dev_close = NULL,
-       .dev_infos_get = NULL,
+       .dev_configure = cnxk_cpt_dev_config,
+       .dev_start = cnxk_cpt_dev_start,
+       .dev_stop = cnxk_cpt_dev_stop,
+       .dev_close = cnxk_cpt_dev_close,
+       .dev_infos_get = cn9k_cpt_dev_info_get,
 
        .stats_get = NULL,
        .stats_reset = NULL,

diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
new file mode 100644 (file)
index 0000000..810f3b8
--- /dev/null
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
@@ -0,0 +1,77 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#include <rte_cryptodev.h>
+#include <rte_cryptodev_pmd.h>
+#include <rte_errno.h>
+
+#include "roc_cpt.h"
+
+#include "cnxk_cryptodev.h"
+#include "cnxk_cryptodev_ops.h"
+
+int
+cnxk_cpt_dev_config(struct rte_cryptodev *dev,
+                   struct rte_cryptodev_config *conf)
+{
+       struct cnxk_cpt_vf *vf = dev->data->dev_private;
+       struct roc_cpt *roc_cpt = &vf->cpt;
+       uint16_t nb_lf_avail, nb_lf;
+       int ret;
+
+       dev->feature_flags &= ~conf->ff_disable;
+
+       nb_lf_avail = roc_cpt->nb_lf_avail;
+       nb_lf = conf->nb_queue_pairs;
+
+       if (nb_lf > nb_lf_avail)
+               return -ENOTSUP;
+
+       ret = roc_cpt_dev_configure(roc_cpt, nb_lf);
+       if (ret) {
+               plt_err("Could not configure device");
+               return ret;
+       }
+
+       return 0;
+}
+
+int
+cnxk_cpt_dev_start(struct rte_cryptodev *dev)
+{
+       RTE_SET_USED(dev);
+
+       return 0;
+}
+
+void
+cnxk_cpt_dev_stop(struct rte_cryptodev *dev)
+{
+       RTE_SET_USED(dev);
+}
+
+int
+cnxk_cpt_dev_close(struct rte_cryptodev *dev)
+{
+       struct cnxk_cpt_vf *vf = dev->data->dev_private;
+
+       roc_cpt_dev_clear(&vf->cpt);
+
+       return 0;
+}
+
+void
+cnxk_cpt_dev_info_get(struct rte_cryptodev *dev,
+                     struct rte_cryptodev_info *info)
+{
+       struct cnxk_cpt_vf *vf = dev->data->dev_private;
+       struct roc_cpt *roc_cpt = &vf->cpt;
+
+       info->max_nb_queue_pairs = roc_cpt->nb_lf_avail;
+       info->feature_flags = dev->feature_flags;
+       info->capabilities = NULL;
+       info->sym.max_nb_sessions = 0;
+       info->min_mbuf_headroom_req = CNXK_CPT_MIN_HEADROOM_REQ;
+       info->min_mbuf_tailroom_req = 0;
+}

diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
new file mode 100644 (file)
index 0000000..05c2623
--- /dev/null
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#ifndef _CNXK_CRYPTODEV_OPS_H_
+#define _CNXK_CRYPTODEV_OPS_H_
+
+#include <rte_cryptodev.h>
+
+#define CNXK_CPT_MIN_HEADROOM_REQ 24
+
+int cnxk_cpt_dev_config(struct rte_cryptodev *dev,
+                       struct rte_cryptodev_config *conf);
+
+int cnxk_cpt_dev_start(struct rte_cryptodev *dev);
+
+void cnxk_cpt_dev_stop(struct rte_cryptodev *dev);
+
+int cnxk_cpt_dev_close(struct rte_cryptodev *dev);
+
+void cnxk_cpt_dev_info_get(struct rte_cryptodev *dev,
+                          struct rte_cryptodev_info *info);
+
+#endif /* _CNXK_CRYPTODEV_OPS_H_ */

diff --git a/drivers/crypto/cnxk/meson.build b/drivers/crypto/cnxk/meson.build
index 4150ae6..74b7795 100644 (file)
--- a/drivers/crypto/cnxk/meson.build
+++ b/drivers/crypto/cnxk/meson.build
@@ -14,6 +14,7 @@ sources = files(
         'cn10k_cryptodev.c',
         'cn10k_cryptodev_ops.c',
         'cnxk_cryptodev.c',
+        'cnxk_cryptodev_ops.c',
 )
 
 deps += ['bus_pci', 'common_cnxk']