common/mlx5: fix build without dlopen option
[dpdk.git] / drivers / net / mlx5 / mlx5_rxtx.c
2020-02-25 Thomas Monjalondoc: fix naming of Mellanox devices
2020-02-21 Viacheslav Ovsiienkonet/mlx5: fix inline packet size for ConnectX-4 Lx
2020-02-21 Viacheslav Ovsiienkonet/mlx5: fix last completed built descriptor
2020-02-14 Viacheslav Ovsiienkonet/mlx5: fix legacy multi-packet write session
2020-02-05 Alexander Kozyrevnet/mlx5: add Rx/Tx burst mode info
2020-02-05 Alexander Kozyrevcommon/mlx5: improve assert control
2020-02-05 Alexander Kozyrevcommon/mlx5: remove NDEBUG
2020-02-05 Viacheslav Ovsiienkonet/mlx5: add no-inline Tx flag
2020-02-05 Ori Kamnet/mlx5: support fine grain dynamic flag
2020-02-05 Matan Azradcommon/mlx5: share PCI device detection
2020-02-05 Matan Azradcommon/mlx5: introduce common library
2020-02-05 Matan Azradnet/mlx5: separate DevX commands interface
2020-01-20 Viacheslav Ovsiienkonet/mlx5: engage free on completion queue
2020-01-20 Viacheslav Ovsiienkonet/mlx5: update Tx error handling routine
2020-01-20 Viacheslav Ovsiienkonet/mlx5: move Tx complete request routine
2020-01-20 Viacheslav Ovsiienkonet/mlx5: allow allocated mbuf with external buffer
2020-01-17 Viacheslav Ovsiienkonet/mlx5: fix Tx burst routines set
2019-11-27 Viacheslav Ovsiienkonet/mlx5: fix legacy inline multi-packet performance
2019-11-27 Viacheslav Ovsiienkonet/mlx5: fix legacy non-inline multi-packet performance
2019-11-26 Viacheslav Ovsiienkonet/mlx5: fix legacy multi-packet Tx descriptors
2019-11-20 Viacheslav Ovsiienkonet/mlx5: fix Tx doorbell write memory barrier
2019-11-11 Viacheslav Ovsiienkonet/mlx5: control transmit doorbell register mapping
2019-11-11 Viacheslav Ovsiienkonet/mlx5: fix asserts for multi-segment Tx offload...
2019-11-11 Viacheslav Ovsiienkonet/mlx5: add metadata support to Rx datapath
2019-11-08 Viacheslav Ovsiienkoethdev: move egress metadata to dynamic field
2019-11-08 Dekel Pelednet/mlx5: remove redundant new line in logs
2019-11-08 Ori Kamnet/mlx5: prepare Tx queues to have different types
2019-10-23 Ali Alnubaninet/mlx5: fix build with strict alignment enabled
2019-10-23 Viacheslav Ovsiienkonet/mlx5: fix Tx packets statistics
2019-10-07 Dekel Pelednet/mlx5: fix vectorized Rx burst error handling
2019-09-20 Viacheslav Ovsiienkonet/mlx5: fix Tx descriptor with VLAN insertions
2019-08-26 Yongseok Kohnet/mlx5: fix TSO flag check
2019-08-07 Viacheslav Ovsiienkonet/mlx5: fix completion request for multi-segment
2019-08-06 Viacheslav Ovsiienkonet/mlx5: fix completion queue overflow for large burst
2019-08-06 Viacheslav Ovsiienkonet/mlx5: fix completion queue drain loop
2019-08-06 Viacheslav Ovsiienkonet/mlx5: fix inline data length assert
2019-08-05 Stephen Hemmingerremove extra blank lines at end of files
2019-07-29 Viacheslav Ovsiienkonet/mlx5: fix Tx completion request generation
2019-07-29 Viacheslav Ovsiienkonet/mlx5: fix Tx completion descriptors fetching loop
2019-07-29 Matan Azradnet/mlx5: handle LRO packets in regular Rx queue
2019-07-29 Matan Azradnet/mlx5: support mbuf headroom for LRO packet
2019-07-29 Matan Azradnet/mlx5: remove redundant offload flag reset
2019-07-23 Matan Azradnet/mlx5: zero LRO mbuf headroom
2019-07-23 Matan Azradnet/mlx5: handle LRO packets in Rx queue
2019-07-23 Matan Azradnet/mlx5: replace external mbuf shared memory
2019-07-23 Dekel Pelednet/mlx5: update queue state modify for DevX
2019-07-23 Dekel Pelednet/mlx5: rename RxQ verbs to general RxQ object
2019-07-23 Viacheslav Ovsiienkonet/mlx5: implement Tx burst template
2019-07-23 Viacheslav Ovsiienkonet/mlx5: introduce Tx burst routine template
2019-07-23 Viacheslav Ovsiienkonet/mlx5: add Tx configuration and setup
2019-07-23 Viacheslav Ovsiienkonet/mlx5: remove Tx implementation
2019-06-13 Matan Azradnet/mlx5: recover secondary process Tx errors
2019-06-13 Matan Azradnet/mlx5: recover secondary process Rx errors
2019-06-13 Matan Azradnet/mlx5: handle Tx completion with error
2019-06-13 Matan Azradnet/mlx5: extend Rx completion with error handling
2019-06-13 Matan Azradnet/mlx5: separate Rx queue initialization
2019-06-13 Matan Azradnet/mlx5: add log file procedure for debug data
2019-05-24 Olivier Matznet: add rte prefix to ether defines
2019-04-05 Yongseok Kohnet/mlx5: sync stop/start with secondary process
2019-03-20 Shahaf Shulernet/mlx5: fix packet inline on Tx queue wraparound
2019-03-01 Thomas Monjalonnet/mlx: prefix private structure
2018-11-05 Tom Barbettenet/mlx5: support Rx queue count API
2018-10-26 Dekel Pelednet/mlx5: support metadata as flow rule criteria
2018-10-25 Keith Wileseal: add macro for attribute weak
2018-09-10 Xueming Linet/mlx5: fix interrupt completion queue index wrapping
2018-07-26 Yongseok Kohnet/mlx5: fix assert for Tx completion queue count
2018-07-12 Moti Haimovskynet/mlx5: support 32-bit systems
2018-07-02 Yongseok Kohnet/mlx5: use stride index in Rx completion entry
2018-07-02 Yongseok Kohnet/mlx5: change return value of Rx completion poll
2018-05-22 Yongseok Kohnet/mlx5: remove redundant checks
2018-05-14 Yongseok Kohnet/mlx5: use coherent I/O memory barrier
2018-05-14 Yongseok Kohnet/mlx5: fix inlining segmented TSO packet
2018-05-14 Yongseok Kohnet/mlx5: add Multi-Packet Rx support
2018-05-14 Yongseok Kohnet/mlx5: separate filling Rx flags
2018-05-14 Yongseok Kohnet/mlx5: add new memory region support
2018-04-27 Xueming Linet/mlx5: cleanup tunnel checksum offloads
2018-04-27 Xueming Linet/mlx5: support Rx tunnel type identification
2018-04-27 Xueming Linet/mlx5: support generic tunnel offloading
2018-04-27 Xueming Linet/mlx5: separate TSO function in Tx data path
2018-04-13 Yongseok Kohnet/mlx5: remove excessive data prefetch
2018-04-13 Bin Huangnet/mlx5: add packet type index for TCP ack
2018-04-10 Shahaf Shuleralign SPDX Mellanox copyrights
2018-03-30 Nélio Laranjeironet/mlx5: prefix all functions with mlx5
2018-03-30 Nélio Laranjeironet/mlx5: mark parameters with unused attribute
2018-03-30 Yongseok Kohnet/mlx5: fix disabling Tx packet inlining
2018-02-01 Olivier Matznet/mlx5: use SPDX tags in 6WIND copyrighted files
2018-01-28 Yongseok Kohnet/mlx5: fix synchronization on polling Rx completions
2018-01-28 Yongseok Kohnet/mlx5: replace I/O memory barrier with coherent...
2018-01-16 Shahaf Shulernet/mlx5: convert to new Tx offloads API
2018-01-16 Yongseok Kohnet/mlx5: clean up multi-segment packet processing
2018-01-16 Yongseok Kohnet/mlx5: add fallback in Tx for multi-segment packet
2018-01-16 Yongseok Kohnet/mlx5: add missing sanity checks for Tx completion...
2018-01-16 Yongseok Kohnet/mlx5: consolidate condition checks for TSO
2018-01-16 Yongseok Kohnet/mlx5: enable inlining data from multiple segments
2018-01-16 Nélio Laranjeironet/mlx5: fix Tx checksum offloads
2018-01-16 Nélio Laranjeironet/mlx5: remove redundant inline variable
2018-01-16 Nélio Laranjeironet/mlx5: move variable declaration
2018-01-16 Nélio Laranjeironet/mlx5: remove 32-bit support
2017-11-14 Thierry Herbelotnet/mlx5: fix build without soft counters
2017-11-07 Yongseok Kohnet/mlx5: fix tunneled TCP/UDP packet type
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