Jie Wang [Tue, 15 Feb 2022 08:25:36 +0000 (16:25 +0800)]
net/iavf: support L2TPv2 for RSS
Add support for L2TPv2(include PPP over L2TPv2) protocols RSS based
on outer MAC src/dst address and L2TPv2 session ID.
Patterns are listed below:
eth/ipv4/udp/l2tpv2
eth/ipv4/udp/l2tpv2/ppp
eth/ipv6/udp/l2tpv2
eth/ipv6/udp/l2tpv2/ppp
Signed-off-by: Jie Wang <jie1x.wang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
Joyce Kong [Fri, 17 Dec 2021 05:36:00 +0000 (05:36 +0000)]
net/i40e: add flow mark capability to NEON Rx
This commit adds a flow director support to i40e NEON
vector RX path.
I40e can have 16 and 32 byte descriptors, and the Flow
Director ID data and indication-bit are in different
locations for each size descriptor. The support is
implemented in two separate functions as they require
vastly different operations.
The 16B descriptor re-purposes the "filter-status" u32
field to indicate FDIR ID when the FLM bit is set. No
extra loads are required, however we do have to store
to mbuf->fdir.hi, which is not stored to in the RX path
before this patch.
The 32B descriptor requires loading the 2nd 16 bytes of
each descriptor, to get the FLEXBH_STAT and FD Filter ID
from qword3. The resulting data must also be stored to
mbuf->fdir.hi, same as the 16B code path.
Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Pablo de Lara [Wed, 23 Feb 2022 18:22:45 +0000 (18:22 +0000)]
doc: support IPsec Multi-buffer lib v1.2
Updated AESNI MB and AESNI GCM, KASUMI, ZUC and SNOW3G PMD documentation
guides with information about the latest Intel IPSec Multi-buffer
library supported.
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Pablo de Lara [Wed, 23 Feb 2022 16:01:16 +0000 (16:01 +0000)]
crypto/ipsec_mb: fix length and offset settings
KASUMI, SNOW3G and ZUC require lengths and offsets to
be set in bits or bytes depending on the algorithm.
There were some algorithms that were mixing these two,
so this commit is fixing this issue.
Fixes:
ae8e085c608d ("crypto/aesni_mb: support KASUMI F8/F9")
Fixes:
6c42e0cf4d12 ("crypto/aesni_mb: support SNOW3G-UEA2/UIA2")
Fixes:
fd8df85487c4 ("crypto/aesni_mb: support ZUC-EEA3/EIA3")
Fixes:
8c835018de84 ("crypto/ipsec_mb: support ZUC-256 for aesni_mb")
Cc: stable@dpdk.org
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Pablo de Lara [Wed, 23 Feb 2022 16:01:15 +0000 (16:01 +0000)]
crypto/ipsec_mb: fix ZUC operation overwrite
ZUC PMD batches crypto operations depending on their type
(encryption + tag generation, tag verification + decryption, etc),
to allow parallelization.
The array used to store the pointers to these operations was
always the same array provided by dequeue_burst() function,
and it was looping around the same positions (from 0 to ZUC_MAX_BURST - 1).
A new internal array is used to avoid overwriting the pointers
of the array provided by dequeue_burst() function.
Fixes:
cf7685d68f00 ("crypto/zuc: add driver for ZUC library")
Cc: stable@dpdk.org
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Pablo de Lara [Wed, 23 Feb 2022 16:01:14 +0000 (16:01 +0000)]
crypto/ipsec_mb: fix ZUC authentication verify
ZUC authentication is done over multiple buffers at a time.
When authentication verification is done, multiple scratch buffers
are using to generate the tags that will be compared afterwards.
However, the same scratch buffer was used always, instead of having
different ones for each crypto operation.
Fixes:
0b133c36ad7d ("crypto/zuc: support IPsec Multi-buffer lib v0.54")
Cc: stable@dpdk.org
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Pablo de Lara [Wed, 23 Feb 2022 16:01:13 +0000 (16:01 +0000)]
crypto/ipsec_mb: check missing operation types
When processing crypto operations in ZUC PMD,
there were two operation types that were set at session level,
but not checked when the operations are enqueued and processed,
leaving the buffers untouched silently.
Fixes:
cde8df1bda9d ("crypto/ipsec_mb: move zuc PMD")
Cc: stable@dpdk.org
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Brian Dooley [Tue, 22 Feb 2022 09:54:51 +0000 (09:54 +0000)]
crypto/virtio: fix out-of-bounds access
Coverity flags an untrusted loop bound. Check length of session iv.
Coverity issue: 375802
Fixes:
b063e843fa03 ("crypto/virtio: fix IV physical address")
Cc: stable@dpdk.org
Signed-off-by: Brian Dooley <brian.dooley@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Nicolas Chautru [Tue, 22 Feb 2022 23:43:36 +0000 (15:43 -0800)]
baseband/acc100: avoid out-of-bounds access
The actual maximum number of gather pointers should have been limited
Coverity issue: 375803, 375813, 375819, 375827, 375831
Fixes:
5ad5060f8f7a ("baseband/acc100: add LDPC processing functions")
Cc: stable@dpdk.org
Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
Brian Dooley [Mon, 21 Feb 2022 18:06:58 +0000 (18:06 +0000)]
examples/l2fwd-crypto: fix port mask overflow
Coverity flags an issue with 32-bit value. If max ethports value is
configured with a value larger than 32 there will be an issue.
Coverity issue: 375863 Unintentional integer overflow
Fixes:
387259bd6c67 ("examples/l2fwd-crypto: add sample application")
Cc: stable@dpdk.org
Signed-off-by: Brian Dooley <brian.dooley@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Volodymyr Fialko [Wed, 23 Feb 2022 10:40:46 +0000 (11:40 +0100)]
test/crypto: add L4 checksum case for transport mode
Added test case to verify L4 checksum offload in IPsec transport mode.
Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Volodymyr Fialko [Wed, 23 Feb 2022 10:40:45 +0000 (11:40 +0100)]
test/crypto: add TTL and hop limit decrement cases
Add test cases to verify TTL and hop limit decrement with lookaside
IPsec offload.
Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Jakub Poczatek [Wed, 9 Feb 2022 11:36:23 +0000 (11:36 +0000)]
doc: fix FIPS guide
Added missing step for converting SHA request files to correct
format. Replaced AES_GCM with GCM to follow the correct
naming format.
Fixes:
3d0fad56b74 ("examples/fips_validation: add crypto FIPS application")
Cc: stable@dpdk.org
Signed-off-by: Jakub Poczatek <jakub.poczatek@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Nithin Dabilpuram [Wed, 23 Feb 2022 09:53:53 +0000 (15:23 +0530)]
examples/ipsec-secgw: add pool size parameters
Add support to enable per port packet pool and also override
vector pool size from command line args. This is useful
on some HW to tune performance based on usecase.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Nithin Dabilpuram [Wed, 23 Feb 2022 09:53:52 +0000 (15:23 +0530)]
examples/ipsec-secgw: fix buffer freeing in vector mode
Fix packet processing to skip after mbuf is freed instead of
touching and Tx'ing it.
Also free vector event buffer in event worker when after processing
there is no pkt to be enqueued to Tx adapter.
Fixes:
86738ebe1e3d ("examples/ipsec-secgw: support event vector")
Cc: stable@dpdk.org
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Nithin Dabilpuram [Wed, 23 Feb 2022 09:53:51 +0000 (15:23 +0530)]
examples/ipsec-secgw: avoid logs in data path
Update error prints in data path to RTE_LOG_DP().
Error prints in fast path are not good for performance
as they slow down the application when few bad packets are
received.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Volodymyr Fialko [Wed, 9 Feb 2022 11:52:13 +0000 (12:52 +0100)]
examples/ipsec-secgw: add check for unprotected port mask
Usage of unprotected port mask without any configured SA inbound, will
cause use of uninitialized SA context, so disallow such configuration.
Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Arek Kusztal [Mon, 21 Feb 2022 10:48:31 +0000 (10:48 +0000)]
crypto/qat: refactor asymmetric session
This patch refactors asymmetric session in Intel
QuickAssist Technology PMD and fixes some issues
with xform. Code will be now bit more scalable,
and easier readable.
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Arek Kusztal [Mon, 21 Feb 2022 10:48:30 +0000 (10:48 +0000)]
crypto/qat: add ECPM algorithm
This patch adds Elliptic Curve Multiplication
algorithm to Intel QuickAssist Technology PMD.
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Arek Kusztal [Mon, 21 Feb 2022 10:48:29 +0000 (10:48 +0000)]
crypto/qat: add ECDSA algorithm
This patch adds ECDSA algorithm to Intel
QuickAssist Technology PMD.
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Arek Kusztal [Mon, 21 Feb 2022 10:48:28 +0000 (10:48 +0000)]
crypto/qat: add named elliptic curves
This patch adds secp256r1 and secp521r1 elliptic curves to Intel
QuickAssist Technology PMD.
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Arek Kusztal [Mon, 21 Feb 2022 10:48:27 +0000 (10:48 +0000)]
crypto/qat: refactor asymmetric crypto functions
This commit refactors asummetric crypto functions
in Intel QuickAssist Technology PMD.
Functions right now are shorter and far easier readable,
plus it facilitates addition of new algorithms.
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Kai Ji [Wed, 23 Feb 2022 00:50:06 +0000 (08:50 +0800)]
crypto/qat: support out-of-place SG list
This patch adds the SGL out of place support to QAT PMD
Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Kai Ji [Wed, 23 Feb 2022 00:50:05 +0000 (08:50 +0800)]
crypto/qat: unify raw data path functions
This patch unifies QAT's raw dp api implementations
to the same enqueue/dequeue methods used in crypto operations.
The specific functions for different QAT generation are updated
respectively. The qat_sym_hw_dp.c is removed as no longer required.
Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Kai Ji [Wed, 23 Feb 2022 00:50:04 +0000 (08:50 +0800)]
crypto/qat: rework burst data path
This patch enable the op_build_request function in
qat_enqueue_op_burst, and the qat_dequeue_process_response
function in qat_dequeue_op_burst.
The op_build_request invoked in crypto build request op is based
on crypto operations setup'd during session init.
Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Kai Ji [Wed, 23 Feb 2022 00:50:03 +0000 (08:50 +0800)]
crypto/qat: unify asymmetric functions
This patch removes qat_asym_pmd.c and integrates all the
functions into qat_asym.c. The unified/integrated asym crypto
pmd functions should make them easier to maintain.
Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Kai Ji [Wed, 23 Feb 2022 00:50:02 +0000 (08:50 +0800)]
crypto/qat: unify symmetric functions
This patch removes qat_sym_pmd.c and integrates all the functions into
qat_sym.c. The unified/integrated qat sym crypto pmd functions should
make them easier to maintain.
Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Kai Ji [Wed, 23 Feb 2022 00:50:01 +0000 (08:50 +0800)]
crypto/qat: rework asymmetric op build operation
This patch reworks the asymmetric crypto data path
implementation in QAT driver. The changes include asymmetric
crypto data path separation for QAT hardware generations, and
code optimisation of the device capabilities declaration.
Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Kai Ji [Wed, 23 Feb 2022 00:50:00 +0000 (08:50 +0800)]
crypto/qat: rework session functions
This patch introduces a set of set_session methods to QAT
generations. In addition, the reuse of QAT session between
generations is prohibit as the support of min_qat_dev_gen_id'
is removed.
Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Kai Ji [Wed, 23 Feb 2022 00:49:59 +0000 (08:49 +0800)]
crypto/qat: support symmetric build op request
This patch adds common inline functions for QAT symmetric
crypto driver to process crypto op, and the implementation of
build op request function for QAT generation 1.
Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Kai Ji [Wed, 23 Feb 2022 00:49:58 +0000 (08:49 +0800)]
common/qat: define build request and dequeue operations
This patch introduce build request and dequeue op function
pointers to the qat queue pair implementation. The function
pointers are assigned during qat session generation based on input
crypto operation request.
Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Volodymyr Fialko [Fri, 18 Feb 2022 12:49:23 +0000 (13:49 +0100)]
crypto/cnxk: support TTL or hop limit decrement
Add support for TTL if IPv4 or hop limit if IPv6 decrement for cn10k.
Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Arek Kusztal [Fri, 18 Feb 2022 07:53:32 +0000 (07:53 +0000)]
cryptodev: fix RSA key type name
This patch fixes misspelled RTE_RSA_KEY_TYPE_QT,
this will prevent checkpach from complaining wherever
change to RSA is being made.
Fixes:
26008aaed14c ("cryptodev: add asymmetric xform and op definitions")
Cc: stable@dpdk.org
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Fan Zhang [Mon, 21 Feb 2022 13:39:46 +0000 (13:39 +0000)]
crypto/ipsec_mb: support null auth/cipher for aesni_mb
Add NULL cipher and auth support to AESNI-MB PMD type.
Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Ciara Power [Fri, 18 Feb 2022 12:57:52 +0000 (12:57 +0000)]
cryptodev: fix asymmetric private session variable size
When creating the asymmetric session mempool, the maximum private
session size of all devices is used when creating the mempool
object size.
The return value for ``rte_cryptodev_asym_get_private_session_size``
is unsigned int, whereas the variable was uint8_t, leading to a
possible overflow issue.
To fix this, the variable for private session size is now changed to
unsigned int to match the function return type.
Fixes:
1f1e4b7cbaad ("cryptodev: use single mempool for asymmetric session")
Reported-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Ciara Power [Tue, 15 Feb 2022 11:07:58 +0000 (11:07 +0000)]
crypto/ipsec_mb: remove useless check
The qp is never NULL when it reaches the qp_setup_cleanup error handling
code. This is due to checks earlier in the function that return an error
if qp is NULL.
Coverity issue: 375013
Fixes:
581c39b1cb7d ("crypto/ipsec_mb: fix queue cleanup null pointer dereference")
Cc: stable@dpdk.org
Signed-off-by: Ciara Power <ciara.power@intel.com>
Tejasree Kondoj [Mon, 31 Jan 2022 16:43:57 +0000 (22:13 +0530)]
test/crypto: add ESN and antireplay cases
Added test cases for IPsec ESN and Antireplay.
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Anoob Joseph [Mon, 31 Jan 2022 16:43:56 +0000 (22:13 +0530)]
test/crypto: add copy and set DSCP cases
Add test cases to verify copy and set DSCP with
IPv4 and IPv6 tunnels.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Shijith Thotton [Thu, 24 Feb 2022 04:46:07 +0000 (10:16 +0530)]
app/eventdev: add crypto producer mode
In crypto producer mode, producer core enqueues cryptodev with software
generated crypto ops and worker core dequeues crypto completion events
from the eventdev. Event crypto metadata used for above processing is
pre-populated in each crypto session.
Parameter --prod_type_cryptodev can be used to enable crypto producer
mode. Parameter --crypto_adptr_mode can be set to select the crypto
adapter mode, 0 for OP_NEW and 1 for OP_FORWARD.
This mode can be used to measure the performance of crypto adapter.
Example:
./dpdk-test-eventdev -l 0-2 -w <EVENTDEV> -w <CRYPTODEV> -- \
--prod_type_cryptodev --crypto_adptr_mode 1 --test=perf_atq \
--stlist=a --wlcores 1 --plcores 2
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
Ganapati Kundapura [Wed, 23 Feb 2022 07:34:43 +0000 (01:34 -0600)]
eventdev/crypto: remove useless check
eca_cryptodev_cdev_flush() is internal function and called with
valid range of cdevs.
crypto_cdev_info structure is allocated at adapter creation time
and retrieved from the adapter for a valid cdevs which cannot be NULL
and hence no need for NULL check.
Fixes:
2ae84b39ae7b ("eventdev/crypto: store operations in circular buffer")
Signed-off-by: Ganapati Kundapura <ganapati.kundapura@intel.com>
Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
Pavan Nikhilesh [Sat, 19 Feb 2022 12:13:38 +0000 (17:43 +0530)]
event/cnxk: update SQB FC check for Tx adapter
Update SQB limit to include CPT queue size when Security
offload is enabled.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Pavan Nikhilesh [Sat, 19 Feb 2022 12:13:37 +0000 (17:43 +0530)]
event/cnxk: remove deschedule usage in CN9K
Using deschedule cmd might incorrectly ignore updates
to WQE, GGRP on CN9K.
Use addwork to pipeline work instead.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Gowrishankar Muthukrishnan [Sat, 12 Feb 2022 12:39:48 +0000 (18:09 +0530)]
event/cnxk: fix uninitialized local variables
Fix uninitialized local variable as reported in coverity scan.
Coverity issue: 370578, 370579, 370587
Fixes:
300b796262a ("event/cnxk: add timer arm routine")
Cc: stable@dpdk.org
Signed-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
Gowrishankar Muthukrishnan [Sat, 12 Feb 2022 12:39:47 +0000 (18:09 +0530)]
event/cnxk: fix memory leaks
Fix memory leaks reported by coverity scan in
cnxk_tim_parse_clk_list() and cnxk_tim_parse_ring_ctl_list()
functions on not freeing strduped memory.
Coverity issue: 374990 374991
Fixes:
8a3d58c189f ("event/cnxk: add option to control timer adapters")
Cc: stable@dpdk.org
Signed-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
Gowrishankar Muthukrishnan [Sat, 12 Feb 2022 12:39:46 +0000 (18:09 +0530)]
event/cnxk: fix variables casting
Fix incompatible casting on variables reported by coverity scan.
Coverity issue: 370582 370584
Fixes:
6223ede2036 ("event/cnxk: add event port link and unlink")
Cc: stable@dpdk.org
Signed-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
Timothy McDaniel [Wed, 16 Feb 2022 19:38:27 +0000 (13:38 -0600)]
event/dlb2: poll HW CQ inflights before mapping queue
When attempting to link a port and queue immediately after unlinking,
the CQ inflights may not all be processed. Poll the h/w register for
outstanding inflights instead of reading once, in case the inflights
are still being processed. Also return EBUSY if the inflight
processing is not completed in a suitable amount of time.
Fixes:
1857f1922ce2 ("event/dlb2: use new implementation of resource file")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Timothy McDaniel [Wed, 16 Feb 2022 19:38:26 +0000 (13:38 -0600)]
event/dlb2: update rolling mask used for dequeue
Update the rolling mask used in dequeue operations to
fix the vector optimized dequeue.
Fixes:
000a7b8e7582 ("event/dlb2: optimize dequeue operation")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Naga Harish K S V [Mon, 14 Feb 2022 17:10:16 +0000 (11:10 -0600)]
eventdev/eth_rx: fix queue config query
Remove the memcpy usage in queue config get function for
`event` variable which is 8 byte size and use direct copy.
Also provide vector information and event buffer size in the
queue config info.
Fixes:
da781e6488 ("eventdev/eth_rx: support Rx queue config get")
Cc: stable@dpdk.org
Signed-off-by: Naga Harish K S V <s.v.naga.harish.k@intel.com>
Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
Weiguo Li [Fri, 4 Feb 2022 08:21:28 +0000 (16:21 +0800)]
eventdev/eth_rx: fix parameters parsing memory leak
The memory get from strdup should be freed when parameter parsing
finished, and also should be freed when error occurs.
Fixes:
814d01709328 ("eventdev/eth_rx: support telemetry")
Fixes:
9e583185318f ("eventdev/eth_rx: support telemetry")
Cc: stable@dpdk.org
Signed-off-by: Weiguo Li <liwg06@foxmail.com>
Acked-by: Ganapati Kundapura <ganapati.kundapura@intel.com>
Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
Megha Ajmera [Wed, 23 Feb 2022 17:36:30 +0000 (17:36 +0000)]
examples/qos_sched: fix core mask overflow
Masking of core mask was incorrect. Instead of using 1U for shifting, it
should be using 1LU as the result is assigned to uint64.
CID 375859: Potentially overflowing expression "1U << app_main_core" with
type "unsigned int" (32 bits, unsigned) is evaluated using 32-bit
arithmetic, and then used in a context that expects an expression of
type "uint64_t" (64 bits, unsigned).
Coverity issue: 375859
Fixes:
de3cfa2c9823 ("sched: initial import")
Cc: stable@dpdk.org
Signed-off-by: Megha Ajmera <megha.ajmera@intel.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Megha Ajmera [Tue, 22 Feb 2022 12:57:45 +0000 (12:57 +0000)]
sched: enable traffic class oversubscription unconditionally
Removed RTE_SCHED_SUBPORT_TC_OV from rte_config.h.
Best effort traffic class oversubscription is always enabled.
Signed-off-by: Megha Ajmera <megha.ajmera@intel.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Megha Ajmera [Tue, 22 Feb 2022 12:57:44 +0000 (12:57 +0000)]
sched: enable statistics unconditionally
Removed RTE_SCHED_COLLECT_STATS flag from rte_config.h.
Stats collection is always enabled.
Signed-off-by: Megha Ajmera <megha.ajmera@intel.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Megha Ajmera [Tue, 22 Feb 2022 12:57:43 +0000 (12:57 +0000)]
sched: move grinder configuration
Grinder configuration is now moved to sched library.
Number of grinders can also modified by specifying
RTE_SCHED_PORT_N_GRINDERS=N in CFLAGS, where N is number of grinders.
Signed-off-by: Megha Ajmera <megha.ajmera@intel.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Megha Ajmera [Tue, 22 Feb 2022 12:57:42 +0000 (12:57 +0000)]
sched: remove vector functions
Remove RTE_SCHED_VECTOR flag from rte_config.h.
This flag is no longer useful. Only scalar version is supported.
Signed-off-by: Megha Ajmera <megha.ajmera@intel.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Tomasz Duszynski [Tue, 22 Feb 2022 08:28:17 +0000 (09:28 +0100)]
raw/cnxk_gpio: check pointer before use in self test
Even though nonexistent cnxk_gpio is unlikely at this point
it's a good practice to check pointers before using them.
Fixes:
0e6557b448fa ("raw/cnxk_gpio: add self test")
Coverity issue: 376502
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Tue, 22 Feb 2022 08:28:16 +0000 (09:28 +0100)]
raw/cnxk_gpio: fix resource leak
All used resources need to be properly cleaned up in error path.
Fixes:
0e6557b448fa ("raw/cnxk_gpio: add self test")
Coverity issue: 376504
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Wed, 23 Feb 2022 13:32:10 +0000 (14:32 +0100)]
raw/cnxk_gpio: fix ABI version
PMD driver got merged during 22.03 merge window and number in map file
should reflect that.
Fixes:
d0b8a4e19131 ("raw/cnxk_gpio: add GPIO driver skeleton")
Reported-by: Ferruh Yigit <ferruh.yigit@intel.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Bruce Richardson [Wed, 16 Feb 2022 16:06:09 +0000 (16:06 +0000)]
doc: improve configuration examples in idxd guide
The documentation on how to configure device instances using
accel-config can be improved by a number of changes:
* For initial example, when only configuring one queue, omit
configuration of a second engine, which is unused later.
* Add the "max-batch-size" setting to the options being configured for
each queue
* Add a final, more complete example, showing configuration of multiple
queues on a device.
Cc: stable@dpdk.org
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Kevin Laatz <kevin.laatz@intel.com>
Bruce Richardson [Wed, 16 Feb 2022 16:06:08 +0000 (16:06 +0000)]
dma/idxd: configure maximum batch size to high value
When configuring an Intel DSA instance using the utility script
dpdk_idxd_cfg.py, explicitly set the max supported batch size value to a
high value, to ensure large bursts are supported if so desired. The
default in the linux kernel is now just 32 [1], which may not be
sufficient for all DPDK apps.
[1] https://lore.kernel.org/r/
163528473483.
3926048.
7950067926287180976.stgit@djiang5-desk3.ch.intel.com
Cc: stable@dpdk.org
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Kevin Laatz <kevin.laatz@intel.com>
Bruce Richardson [Wed, 16 Feb 2022 16:06:07 +0000 (16:06 +0000)]
test/dma: fix missing checks for device capacity
For some DMA HW devices, e.g. those using the idxd driver, the maximum
burst size is configurable, which can lead to test failures if the value
is set too small. Add explicit check for this to give reasonable error
messages for devices which need their config adjusted.
Fixes:
1b86a66a30c2 ("test/dma: add more comprehensive copy tests")
Fixes:
8fa5d2683940 ("test/dma: add burst capacity test")
Cc: stable@dpdk.org
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Conor Walsh <conor.walsh@intel.com>
Reviewed-by: Kevin Laatz <kevin.laatz@intel.com>
Chengwen Feng [Thu, 17 Feb 2022 02:59:11 +0000 (10:59 +0800)]
dma/hisilicon: use common PCI device naming
For DMA device 0000:7d:0.0, the original generated dmadev name starts
with the "7d:0.0", which is not expected.
This patch uses rte_pci_device_name API to generates the dmadev name.
Cc: stable@dpdk.org
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Chengwen Feng [Thu, 17 Feb 2022 02:59:10 +0000 (10:59 +0800)]
dma/hisilicon: add queue full statistics
This patch adds queue full statistics for HiSilicon DMA PMD.
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Chengwen Feng [Thu, 17 Feb 2022 02:59:09 +0000 (10:59 +0800)]
dma/hisilicon: support registers dump for Kunpeng 930
This patch supports dump Kunpeng930 DMA registers.
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Chengwen Feng [Thu, 17 Feb 2022 02:59:08 +0000 (10:59 +0800)]
dma/hisilicon: support error handling with Kunpeng 930
The Kunpeng930 DMA supports the capability of handles errors.
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Chengwen Feng [Thu, 17 Feb 2022 02:59:07 +0000 (10:59 +0800)]
dma/hisilicon: support Kunpeng 930
The Kunpeng930 DMA devices have the same PCI device id with Kunpeng920,
but with different PCI revision and register layout. This patch
introduces the basic initialization for Kunpeng930 DMA devices.
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Elena Agostini [Tue, 22 Feb 2022 00:22:33 +0000 (00:22 +0000)]
gpudev: use CPU mapping in communication list
rte_gpu_mem_cpu_map() exposes a GPU memory area to the CPU.
In gpudev communication list this is useful to store the
status flag.
A communication list status flag allocated on GPU memory
and mapped for CPU visibility can be updated by CPU and polled
by a GPU workload.
The polling operation is more frequent than the CPU update operation.
Having the status flag in GPU memory reduces the GPU workload polling
latency.
If CPU mapping feature is not enabled, status flag resides in
CPU memory registered so it's visible from the GPU.
To facilitate the interaction with the status flag, this patch
provides also the set/get functions for it.
Signed-off-by: Elena Agostini <eagostini@nvidia.com>
Elena Agostini [Mon, 21 Feb 2022 23:07:06 +0000 (23:07 +0000)]
gpudev: use device memory pointer for CPU unmap
Update rte_gpu_mem_cpu_unmap() header documentation
and the test application to use GPU pointer when unmapping.
Signed-off-by: Elena Agostini <eagostini@nvidia.com>
Bruce Richardson [Mon, 14 Feb 2022 15:30:38 +0000 (15:30 +0000)]
build: make ring mempool driver mandatory
The default mempool driver is one based on the rte_ring, and as such it
needs to be present to have just about any app (which doesn't override
the mempool) run. Given this state of affairs it is probably best to add
this default mempool driver to the always-enabled list to ensure we get
a runnable build in all cases. This means that, for example, to run some
NIC tests with testpmd in a minimal build, in most cases, all the user
should need to do is specify "-Denable_drivers=net/<nic_drv>" for the
build.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Bruce Richardson [Tue, 15 Feb 2022 17:30:29 +0000 (17:30 +0000)]
buildtools/chkincs: check missing C++ guards
Simply compiling a C header with a C++ compiler is not enough to flag
missing 'extern "C"' guards. To catch missing guards, we can just use a
simple grep for the 'extern "C"' part, and error out if any files have a
miss.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Bruce Richardson [Tue, 15 Feb 2022 17:30:28 +0000 (17:30 +0000)]
buildtools/chkincs: check SDK headers for C++ compatibility
With a one-line change to the lib meson.build file we can add the SDK
headers to the list of files to be checked using the chkincs binary.
Unfortunately, many of those SDK header depend upon headers in the PCI
and vdev bus drivers, so we need to update chkincs build to ensure those
dependencies are added. We also need to allow internal APIs to be
present in these SDK headers.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Bruce Richardson [Tue, 15 Feb 2022 17:30:27 +0000 (17:30 +0000)]
ethdev: fix cast for C++ compatibility
C++ does not allow implicit conversion to/from void*,
so we need an explicit cast to allow the driver SDK header
to be included from C++ code.
Fixes:
e489007a411c ("ethdev: add generic create/destroy ethdev APIs")
Cc: stable@dpdk.org
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Brian Dooley [Wed, 16 Feb 2022 15:14:56 +0000 (15:14 +0000)]
cryptodev: add missing C++ guards
Some public header files were missing 'extern "C"' C++ guards,
and couldn't be used by C++ applications. Add the missing guards.
Fixes:
7a3357205755 ("lib: remove C++ include guard from private headers")
Cc: stable@dpdk.org
Signed-off-by: Brian Dooley <brian.dooley@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Brian Dooley [Wed, 16 Feb 2022 15:14:55 +0000 (15:14 +0000)]
bpf: add missing C++ guards
Some public header files were missing 'extern "C"' C++ guards,
and couldn't be used by C++ applications. Add the missing guards.
Fixes:
7a3357205755 ("lib: remove C++ include guard from private headers")
Cc: stable@dpdk.org
Signed-off-by: Brian Dooley <brian.dooley@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Brian Dooley [Wed, 16 Feb 2022 15:14:54 +0000 (15:14 +0000)]
vhost: add missing C++ guards
Some public header files were missing 'extern "C"' C++ guards,
and couldn't be used by C++ applications. Add the missing guards.
Fixes:
d7280c9fffcb ("vhost: support selective datapath")
Fixes:
78639d54563a ("vhost: introduce async enqueue registration API")
Fixes:
3bb595ecd682 ("vhost/crypto: add request handler")
Fixes:
94c16e89d779 ("vhost: mark vDPA driver API as internal")
Cc: stable@dpdk.org
Signed-off-by: Brian Dooley <brian.dooley@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Brian Dooley [Wed, 16 Feb 2022 15:14:53 +0000 (15:14 +0000)]
kni: add missing C++ guards
Some public header files were missing 'extern "C"' C++ guards,
and couldn't be used by C++ applications. Add the missing guards.
Fixes:
3fc5ca2f6352 ("kni: initial import")
Cc: stable@dpdk.org
Signed-off-by: Brian Dooley <brian.dooley@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Brian Dooley [Wed, 16 Feb 2022 15:14:52 +0000 (15:14 +0000)]
eventdev: add missing C++ guards
Some public header files were missing 'extern "C"' C++ guards,
and couldn't be used by C++ applications. Add the missing guards.
Fixes:
dc39e2f359b5 ("eventdev: add ring structure for events")
Fixes:
7a3357205755 ("lib: remove C++ include guard from private headers")
Cc: stable@dpdk.org
Signed-off-by: Brian Dooley <brian.dooley@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Brian Dooley [Wed, 16 Feb 2022 15:14:51 +0000 (15:14 +0000)]
compressdev: add missing C++ guards
Some public header files were missing 'extern "C"' C++ guards,
and couldn't be used by C++ applications. Add the missing guards.
Fixes:
ed7dd94f7f66 ("compressdev: add basic device management")
Cc: stable@dpdk.org
Signed-off-by: Brian Dooley <brian.dooley@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Brian Dooley [Wed, 16 Feb 2022 15:14:50 +0000 (15:14 +0000)]
acl: add missing C++ guards
Some public header files were missing 'extern "C"' C++ guards,
and couldn't be used by C++ applications. Add the missing guards.
Fixes:
dc276b5780c2 ("acl: new library")
Cc: stable@dpdk.org
Signed-off-by: Brian Dooley <brian.dooley@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Brian Dooley [Wed, 16 Feb 2022 15:14:49 +0000 (15:14 +0000)]
metrics: add missing C++ guards
Some public header files were missing 'extern "C"' C++ guards,
and couldn't be used by C++ applications. Add the missing guards.
Fixes:
c5b7197f662e ("telemetry: move some functions to metrics library")
Cc: stable@dpdk.org
Signed-off-by: Brian Dooley <brian.dooley@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Brian Dooley [Wed, 16 Feb 2022 15:14:48 +0000 (15:14 +0000)]
ethdev: add missing C++ guards
Some public header files were missing 'extern "C"' C++ guards,
and couldn't be used by C++ applications. Add the missing guards.
Fixes:
7a3f27cbf59b ("ethdev: add access to specific device info")
Fixes:
dcd5c8112bc3 ("ethdev: add PCI driver helpers")
Fixes:
7f0a669e7b04 ("ethdev: add allocation helper for virtual drivers")
Fixes:
7a3357205755 ("lib: remove C++ include guard from private headers")
Cc: stable@dpdk.org
Signed-off-by: Brian Dooley <brian.dooley@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Brian Dooley [Wed, 16 Feb 2022 15:14:47 +0000 (15:14 +0000)]
telemetry: add missing C++ guards
Some public header files were missing 'extern "C"' C++ guards,
and couldn't be used by C++ applications. Add the missing guards.
Fixes:
8877ac688b52 ("telemetry: introduce infrastructure")
Cc: stable@dpdk.org
Signed-off-by: Brian Dooley <brian.dooley@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Brian Dooley [Wed, 16 Feb 2022 15:14:46 +0000 (15:14 +0000)]
eal: add missing C++ guards
Some public header files were missing 'extern "C"' C++ guards,
and couldn't be used by C++ applications. Add the missing guards.
Fixes:
af75078fece3 ("first public release")
Fixes:
7f3aa0863903 ("eal: introduce bit operations API")
Fixes:
166a743c53fa ("compat: add infrastructure to support symbol versioning")
Fixes:
8f40ee0734c8 ("eal/x86: get hypervisor name")
Fixes:
75583b0d1efd ("eal: add keep alive monitoring")
Fixes:
88701645c98c ("eal: move interrupt type out of igb_uio")
Fixes:
f04519d8092e ("lib: add missing include dependencies")
Fixes:
f58880682c81 ("trace: implement register API")
Fixes:
428eb983f5f7 ("eal: add OS specific header file")
Cc: stable@dpdk.org
Signed-off-by: Brian Dooley <brian.dooley@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Thomas Monjalon [Tue, 22 Feb 2022 11:26:10 +0000 (12:26 +0100)]
dmadev: add missing header include
When checking C++ compatibility of SDK headers,
an error is detected by the compiler:
lib/dmadev/rte_dmadev_pmd.h:95:23: error:
‘RTE_DEV_NAME_MAX_LEN’ undeclared here (not in a function)
The header file rte_dev.h must be included.
Fixes:
b36970f2e13e ("dmadev: introduce DMA device library")
Cc: stable@dpdk.org
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Conor Walsh <conor.walsh@intel.com>
Sean Morrissey [Tue, 15 Feb 2022 12:29:49 +0000 (12:29 +0000)]
lib: remove unneeded header includes
These header includes have been flagged by the iwyu_tool
and removed.
Signed-off-by: Sean Morrissey <sean.morrissey@intel.com>
Sean Morrissey [Tue, 15 Feb 2022 12:29:48 +0000 (12:29 +0000)]
devtools: add IWYU script to remove unused includes
This script can be used for removing headers flagged for removal by the
include-what-you-use (IWYU) tool. The script has the ability to remove
headers from specified sub-directories or dpdk as a whole and tests the
build after each removal by calling meson compile.
example usages:
Remove headers flagged by iwyu_tool output file
$ ./devtools/process_iwyu.py iwyu.out -b build
Remove headers flagged by iwyu_tool output file from sub-directory
$ ./devtools/process_iwyu.py iwyu.out -b build -d lib/kvargs
Remove headers directly piped from the iwyu_tool
$ iwyu_tool -p build | ./devtools/process_iwyu.py - -b build
Signed-off-by: Sean Morrissey <sean.morrissey@intel.com>
Signed-off-by: Conor Fogarty <conor.fogarty@intel.com>
Reviewed-by: Bruce Richardson <bruce.richardson@intel.com>
Tomasz Duszynski [Thu, 17 Feb 2022 11:09:24 +0000 (12:09 +0100)]
raw/cnxk_gpio: add option to select subset of GPIOs
Add PMD parameter that allows one to select only subset of available
GPIOs.
This might be useful in cases where some GPIOs are already reserved yet
still available for userspace access but particular app should not touch
them.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Thu, 17 Feb 2022 11:09:23 +0000 (12:09 +0100)]
raw/cnxk_gpio: add self test
Add support for performing selftest.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Tomasz Duszynski [Thu, 17 Feb 2022 11:09:22 +0000 (12:09 +0100)]
raw/cnxk_gpio: add custom IRQ handlers
Add support for custom interrupt handlers. Custom interrupt
handlers bypass kernel completely and are meant for fast
and low latency access to GPIO state.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Tomasz Duszynski [Thu, 17 Feb 2022 11:09:21 +0000 (12:09 +0100)]
raw/cnxk_gpio: add standard GPIO operations
Add support for standard GPIO operations i.e ones normally
provided by GPIO sysfs interface.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Tomasz Duszynski [Thu, 17 Feb 2022 11:09:20 +0000 (12:09 +0100)]
raw/cnxk_gpio: dequeue buffers
Add support for dequeuing buffers.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Tomasz Duszynski [Thu, 17 Feb 2022 11:09:19 +0000 (12:09 +0100)]
raw/cnxk_gpio: enqueue buffers
Add dummy support for enqueuing buffers.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Tomasz Duszynski [Thu, 17 Feb 2022 11:09:18 +0000 (12:09 +0100)]
raw/cnxk_gpio: release queue
Add support for queue release.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Tomasz Duszynski [Thu, 17 Feb 2022 11:09:17 +0000 (12:09 +0100)]
raw/cnxk_gpio: setup queue
Add support for queue setup.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Tomasz Duszynski [Thu, 17 Feb 2022 11:09:16 +0000 (12:09 +0100)]
raw/cnxk_gpio: read queue count
Add support for reading number of available queues. Single queue
corresponds to GPIO.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Tomasz Duszynski [Thu, 17 Feb 2022 11:09:15 +0000 (12:09 +0100)]
raw/cnxk_gpio: read default queue configuration
Add support for reading default queue configuration.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Tomasz Duszynski [Thu, 17 Feb 2022 11:09:14 +0000 (12:09 +0100)]
raw/cnxk_gpio: add GPIO driver skeleton
Add initial support for PMD that allows to control particular pins form
userspace. Moreover PMD allows to attach custom interrupt handlers to
controllable GPIOs.
Main users of this PMD are dataplain applications requiring fast and low
latency access to pin state.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Naga Harish K S V [Wed, 9 Feb 2022 05:31:51 +0000 (23:31 -0600)]
eventdev/eth_tx: fix queue add error code
The internal function txa_service_queue_add() is returning 0
in case of error, correct this logic to return a negative value
to indicate failure.
Fixes:
a3bbf2e09756 ("eventdev: add eth Tx adapter implementation")
Cc: stable@dpdk.org
Signed-off-by: Naga Harish K S V <s.v.naga.harish.k@intel.com>
Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
Ganapati Kundapura [Thu, 10 Feb 2022 17:41:17 +0000 (11:41 -0600)]
eventdev/crypto: assume SW when no driver capabilities
update rte_event_crypto_adapter_caps_get() to return
SW_CAP if PMD callback is not registered.
Signed-off-by: Ganapati Kundapura <ganapati.kundapura@intel.com>
Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
Ganapati Kundapura [Thu, 10 Feb 2022 17:41:16 +0000 (11:41 -0600)]
eventdev/crypto: store operations in circular buffer
Move crypto ops to circular buffer to retain crypto
ops when cryptodev/eventdev are temporarily full.
Signed-off-by: Ganapati Kundapura <ganapati.kundapura@intel.com>
Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
Pavan Nikhilesh [Thu, 10 Feb 2022 13:20:46 +0000 (18:50 +0530)]
event/cnxk: improve Rx performance
Improve vWQE and CQ Rx performance by tuning perfetches to 64B
cacheline size.
Also, prefetch the vWQE array offsets at cacheline boundaries.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>