Wei Dai [Sat, 27 May 2017 08:33:16 +0000 (16:33 +0800)]
net/ixgbe/base: remove PHY access for some 1G ports
This patch removes some some 1GBASE-T PHY access since the FW
configures the PHY. SW shall not configure or initialize link.
Accessing the PHY would require the use of MDI clause 22 which
should be avoided in high layer driver code.
Andy Moreton [Sat, 27 May 2017 07:55:31 +0000 (08:55 +0100)]
net/sfc/base: let caller know that queue is already flushed
Tx/Rx queue may be already flushed due to Tx/Rx error on the queue or
MC reboot. Caller needs to know that the queue is already flushed to
avoid waiting for flush done event.
Signed-off-by: Andy Moreton <amoreton@solarflare.com> Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Rahul Lakkireddy [Sat, 27 May 2017 03:47:59 +0000 (09:17 +0530)]
net/cxgbe: remove rmb bottleneck in Rx path
rmb before determining rsp_type is a bottleneck.
Once we determine rsp-type is FL, we can directly go ahead and read
packets based on q->stat->pidx and budget_left.
This removes bottleneck of rmb once per every RX packet.
Now, rmb exists once per RX batch.
Rahul Lakkireddy [Sat, 27 May 2017 03:47:58 +0000 (09:17 +0530)]
net/cxgbe: fix rxq default params for ports under same PF
Enabling rx queues with default interrupt parameters doesn't happen
for other ports under same PF due to FULL_INIT_DONE flag being set
by the first port.
Fix is to to allow each port to enable its own rx queues with default
parameters.
Rahul Lakkireddy [Sat, 27 May 2017 03:47:57 +0000 (09:17 +0530)]
net/cxgbe: improve latency for slow traffic
TX coalescing waits for ETH_COALESCE_PKT_NUM packets to be coalesced
across bursts before transmitting them. For slow traffic, such as
100 PPS, this approach increases latency since packets are received
one at a time and tx coalescing has to wait for ETH_COALESCE_PKT
number of packets to arrive before transmitting.
To fix this:
- Update rx path to use status page instead and only receive packets
when either the ingress interrupt timer threshold (5 us) or
the ingress interrupt packet count threshold (32 packets) fires.
(i.e. whichever happens first).
- If number of packets coalesced is <= number of packets sent
by tx burst function, stop coalescing and transmit these packets
immediately.
Also added compile time option to favor throughput over latency by
default.
Rahul Lakkireddy [Sat, 27 May 2017 03:46:25 +0000 (09:16 +0530)]
net/cxgbe: update Rx path for Chelsio T6
Update RX path to reflect Chelsio T6 register value changes.
Update ingress pack boundary value based on maximum payload size
that can be accommodated by underlying PCI. Update ingress pad
boundary value based on smallest memory controller bus width
possible. Enforce alignment for free list pointer start address.
Rahul Lakkireddy [Sat, 27 May 2017 03:46:22 +0000 (09:16 +0530)]
net/cxgbe: update hardware info prints
Update informational prints pertaining to underlying hardware.
Add bootstrap firmware version and expansion ROM version prints.
Move the prints to a single function.
Rahul Lakkireddy [Sat, 27 May 2017 03:46:19 +0000 (09:16 +0530)]
net/cxgbe: grab available ports after firmware reset
Move code to get the available ports from the firmware after it had
been reset. This ensures that driver uses the latest info on available
ports after firmware reset.
Pascal Mazon [Mon, 22 May 2017 11:19:53 +0000 (13:19 +0200)]
net/tap: fix some flow collision
The following two flow rules (testpmd syntax) should not collide:
flow create 0 priority 1 ingress pattern eth / ipv4 / end actions drop / end
flow create 0 priority 1 ingress pattern eth / ipv6 / end actions drop / end
But the eth_type in the associated TC rule was set to either "ip" or
"ipv6". For TC, they could thus not have the same priority.
Use ETH_P_ALL only in the TC message to make sure those rules can
coexist.
Fixes: de96fe68ae95 ("net/tap: add basic flow API patterns and actions") Cc: stable@dpdk.org Signed-off-by: Pascal Mazon <pascal.mazon@6wind.com>
Hemant Agrawal [Fri, 26 May 2017 06:51:11 +0000 (12:21 +0530)]
net/dpaa2: support parallel Rx
Typically when the PMD issues a Rx command to DPAA2 hardware,
the HW writes the available descriptors into the given memory.
The RX function then processes the frames and prepare them as
mbufs.
This patch adds support to issue another pull request to hardware
in another memory location, before we start processing the output
of the first request. This help in controlling the CPU cycles
wasted during the wait for the hardware to write the descriptors.
Hemant Agrawal [Fri, 26 May 2017 06:51:10 +0000 (12:21 +0530)]
bus/fslmc: support for parallel Rx DQ requests
DPAA2 hardware support the option to configure
multiple memories for Rx recv buffer (DPAA2-DQRR).
Each Rx request executing is called as 'DQ' request.
This patch adds routines to get information w.r.t each DQ request.
Hemant Agrawal [Fri, 26 May 2017 06:51:08 +0000 (12:21 +0530)]
net/dpaa2: stop using software annotation
The DPAA2 driver is not using the DPAA2 frame descriptor
software annotation area. This patch reduces the
PTA length to zero and adjust the RX Buffer Layout
accordingly.
Markus Theil [Mon, 22 May 2017 10:17:50 +0000 (12:17 +0200)]
net/igb: fix add/delete of flex filters
Before this patch, flex_filter->index was always zero when it was read
and used after rte_zmalloc. The corresponding code was therefore moved
into the add and delete parts of the if/else statement.
Fixes: 231d43909a31 ("igb: migrate flex filter to new API") Cc: stable@dpdk.org Signed-off-by: Markus Theil <markus.theil@tu-ilmenau.de> Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
John Daley [Wed, 17 May 2017 22:38:10 +0000 (15:38 -0700)]
net/enic: flow API debug
Added a debug function to print enic filters and actions when
rte_validate_flow is called. Compiled in CONFIG_RTE_LIBRTE_ENIC_DEBUG_FLOW
is enabled and log level is INFO.
Signed-off-by: John Daley <johndale@cisco.com> Reviewed-by: Nelson Escobar <neescoba@cisco.com>
John Daley [Wed, 17 May 2017 22:38:09 +0000 (15:38 -0700)]
net/enic: flow API for Legacy NICs
5-tuple exact Flow support for 1200 series adapters. This allows:
Attributes: ingress
Items: ipv4, ipv6, udp, tcp (must exactly match src/dst IP
addresses and ports and all must be specified).
Actions: queue and void
Selectors: 'is'
Signed-off-by: John Daley <johndale@cisco.com> Reviewed-by: Nelson Escobar <neescoba@cisco.com>
John Daley [Wed, 17 May 2017 22:38:08 +0000 (15:38 -0700)]
net/enic: flow API for NICs with advanced filters disabled
Flow support for 1300 series adapters with the 'Advanced Filter'
mode disabled via the UCS management interface. This allows:
Attributes: ingress
Items: Outer eth, ipv4, ipv6, udp, sctp, tcp, vxlan. Inner eth, ipv4,
ipv6, udp, tcp.
Actions: queue and void
Selectors: 'is', 'spec' and 'mask'. 'last' is not supported
With advanced filters disabled, an IPv4 or IPv6 item must be specified
in the pattern.
Signed-off-by: John Daley <johndale@cisco.com> Reviewed-by: Nelson Escobar <neescoba@cisco.com>
John Daley [Wed, 17 May 2017 22:38:06 +0000 (15:38 -0700)]
net/enic: flow API for NICs with advanced filters enabled
Flow support for 1300 series adapters with the 'Advanced Filter'
mode enabled via the UCS management interface. This enables:
Attributes: ingress
Items: Outer eth, ipv4, ipv6, udp, sctp, tcp, vxlan. Inner eth, ipv4,
ipv6, udp, tcp.
Actions: queue, and void
Selectors: 'is', 'spec' and 'mask'. 'last' is not supported
Signed-off-by: John Daley <johndale@cisco.com> Reviewed-by: Nelson Escobar <neescoba@cisco.com>
John Daley [Wed, 17 May 2017 22:38:04 +0000 (15:38 -0700)]
net/enic/base: bring NIC interface functions up to date
Update the base functions for the Cisco VIC. These files are mostly
common with other VIC drivers so are left alone is as much as possible.
Includes in a new filter/action interface which is needed for Generic
Flow API PMD support. Update FDIR code to use the new interface.
Signed-off-by: John Daley <johndale@cisco.com> Reviewed-by: Nelson Escobar <neescoba@cisco.com>
John Miller [Tue, 16 May 2017 16:14:15 +0000 (12:14 -0400)]
net/ark: fix buffer not null terminated
Coverity issue: 144512
Coverity issue: 144513 Fixes: 9c7188a68d7b ("net/ark: provide API for hardware modules pktchkr and pktgen") Cc: stable@dpdk.org Signed-off-by: John Miller <john.miller@atomicrules.com>
Pascal Mazon [Fri, 12 May 2017 13:01:39 +0000 (15:01 +0200)]
net/tap: create netdevice during probing
This has three main benefits:
- tun_alloc is now generic again for any queue,
- mtu no longer needs to be handled in tap_setup_queue(),
- an actual netdevice is created as soon as the device is probed.
On top of it, code in eth_dev_tap_create() has been reworked to have a
more logical behavior; initialization can now fail if a remote is
requested but cannot be set up.
Support for a fixed MAC address for testing with the last octet
incrementing by one for each interface defined with the new 'mac=fixed'
string on the --vdev option. The default option is still to randomize
the MAC address for each tap interface.
Signed-off-by: Keith Wiles <keith.wiles@intel.com> Signed-off-by: Pascal Mazon <pascal.mazon@6wind.com> Acked-by: Keith Wiles <keith.wiles@intel.com>
Jerin Jacob [Mon, 1 May 2017 06:40:18 +0000 (12:10 +0530)]
net/thunderx: add compile-time checks
The thunderx PMD is sensitive to the layout of the mbuf on
the RX path. Add in some compile-time checks to make sure the mbuf layout
assumptions are valid, and to provide hints to anyone changing the mbuf
where things may need to be updated.
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Bruce Richardson [Fri, 28 Apr 2017 16:21:15 +0000 (17:21 +0100)]
net/fm10k: add compile-time checks to vector driver
The vector PMD is very sensitive to the layout of the mbuf, especially on
the RX path. Add in some compile-time checks to make sure the mbuf layout
assumptions are valid, and to provide hints to anyone changing the mbuf
where things may need to be updated.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Bruce Richardson [Fri, 28 Apr 2017 16:21:14 +0000 (17:21 +0100)]
net/i40e: add compile-time checks to vector driver
The vector PMD is very sensitive to the layout of the mbuf, especially on
the RX path. Add in some compile-time checks to make sure the mbuf layout
assumptions are valid, and to provide hints to anyone changing the mbuf
where things may need to be updated.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Bruce Richardson [Fri, 28 Apr 2017 16:21:12 +0000 (17:21 +0100)]
net/ixgbe: add compile-time checks to vector driver
The vector PMD is very sensitive to the layout of the mbuf, especially on
the RX path. Add in some compile-time checks to make sure the mbuf layout
assumptions are valid, and to provide hints to anyone changing the mbuf
where things may need to be updated.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Ilya Maximets [Thu, 18 May 2017 12:19:40 +0000 (15:19 +0300)]
ethdev: keep port id unchanged if obtaining by name failed
Currently, 'rte_eth_dev_get_port_by_name' changes transmitted
'port_id' unconditionally. This is undocumented and misleading
behaviour as user may expect unchanged value in case of error.
Otherwise, there is no sense having both return value and
a pointer in the function.
Fixes: 9c5b8d8b9feb ("ethdev: clean port id retrieval when attaching") Signed-off-by: Ilya Maximets <i.maximets@samsung.com>
David Marchand [Sat, 20 May 2017 13:12:37 +0000 (15:12 +0200)]
drivers/net: fix vfio kmod dependency
vfio is the kernel framework used by the vfio-pci kernel driver.
DPDK drivers do not rely solely on vfio, but rather on vfio-pci to gain
access to pci resources.
Fixes: 0880c40113ef ("drivers: advertise kmod dependencies in pmdinfo") Cc: stable@dpdk.org Signed-off-by: David Marchand <david.marchand@6wind.com> Acked-by: Olivier Matz <olivier.matz@6wind.com>
Tonghao Zhang [Fri, 12 May 2017 06:03:43 +0000 (23:03 -0700)]
memzone: check NUMA id when reserving a zone
If the socket_id is invalid (e.g. -2, -3), the
memzone_reserve_aligned_thread_unsafe should return the
EINVAL and not ENOMEM. To avoid it, we should check the
socket_id before calling malloc_heap_alloc.
Signed-off-by: Tonghao Zhang <nic@opencloud.tech> Acked-by: Bruce Richardson <bruce.richardson@intel.com>