dpdk.git
4 years agonet/ice/base: support E823L devices
Qi Zhang [Mon, 15 Jun 2020 02:05:12 +0000 (10:05 +0800)]
net/ice/base: support E823L devices

Add support for E823L devices.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: fix initializing resource for field vector
Qi Zhang [Mon, 15 Jun 2020 02:05:11 +0000 (10:05 +0800)]
net/ice/base: fix initializing resource for field vector

This patch add initialization for prof_res_bm_init flag
to zero in order that the possible resource for field vector
in the package file can be initialized.(in ice_init_prof_result_bm)

Fixes: 453d087ccaff ("net/ice/base: add common functions")
Cc: stable@dpdk.org
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: add more tunnel type for IPv4 and IPv6
Qi Zhang [Mon, 15 Jun 2020 02:05:10 +0000 (10:05 +0800)]
net/ice/base: add more tunnel type for IPv4 and IPv6

This patch add more tunnel type definition ipv4/ipv6 packet,
it enable tcp/udp layer of ipv4/ipv6 as L4 payload but without
L4 dst/src port number as input set for switch filter rule.

For example:
we can download a switch rule to direct ipv4 packet with specific
source and destination ip address to queue index 1.
"eth / ipv4 src is 192.168.0.1 dst is 192.168.0.2 / udp /
end actions queue index 1 / end"
this type of rule will be matched with ipv4/udp file only.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: fix reference count on VSI list update
Qi Zhang [Mon, 15 Jun 2020 02:05:09 +0000 (10:05 +0800)]
net/ice/base: fix reference count on VSI list update

The parameter ref_cnt is used for tracking how many
rules are reusing this VSI list, so it can only be
updated when a rule which using this list be deleted.

Fixes: f89aa3affa9e ("net/ice/base: support removing advanced rule")
Cc: stable@dpdk.org
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: remove unused code for VSI list free
Qi Zhang [Mon, 15 Jun 2020 02:05:08 +0000 (10:05 +0800)]
net/ice/base: remove unused code for VSI list free

When free vsi list resource after vsi list update to empty, some
useless code in function ice_remove_vsi_list_rule() should be deleted.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: add command to LLDP
Qi Zhang [Mon, 15 Jun 2020 02:05:07 +0000 (10:05 +0800)]
net/ice/base: add command to LLDP

Add support for LLDP forwarding to SW programming in FW
LLDP Filter Control is 0x0A0A.

Signed-off-by: Sharon Haroni <sharon.haroni@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: distribute Tx queues evenly
Qi Zhang [Mon, 15 Jun 2020 02:05:06 +0000 (10:05 +0800)]
net/ice/base: distribute Tx queues evenly

Distribute the tx queues evenly across all queue groups. This will
help the queues to get more equal sharing among the queues when all
are in use.

In the previous algorithm, the next queue group node will be picked up
only after the previous one filled with max children.
For example: if VSI is configured with 9 queues, the first 8 queues
will be assigned to queue group 1 and the 9th queue will be assigned to
queue group 2.

The 2 queue groups split the bandwidth between them equally (50:50).
The first queue group node will share the 50% bandwidth with all of
its children (8 queues). And the second queue group node will share
the entire 50% bandwidth with its only children.

Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: adjust scheduler default bandwidth weight
Qi Zhang [Mon, 15 Jun 2020 02:05:05 +0000 (10:05 +0800)]
net/ice/base: adjust scheduler default bandwidth weight

By default the queues are configured in legacy mode. The default
bandwidth settings for legacy/advanced modes are different. The existing
code was using the advanced mode default value of 1 which was
incorrect. This caused the unbalanced BW sharing among siblings.
The recommended default value is applied.

Signed-off-by: Tarun Singh <tarun.k.singh@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: clear error status before set FC
Qi Zhang [Mon, 15 Jun 2020 02:05:04 +0000 (10:05 +0800)]
net/ice/base: clear error status before set FC

ice_set_fc takes a u8 pointer 'aq_failures' as an input parameter. If
this function encounters an error, in addition to returning an
appropriate ice_status enum code, it also populates aq_failures with a
link specific error value.

If the caller does not initialize this variable to 0 before calling
ice_set_fc, it would appear as if ice_set_fc returned an error code in
this variable. So initialize it to 0.

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: avoid PPPoE IPv4 overlap
Qi Zhang [Mon, 15 Jun 2020 02:05:03 +0000 (10:05 +0800)]
net/ice/base: avoid PPPoE IPv4 overlap

When PPPoE header is not selected, PPPoE should not be included in
ipv4 ptype bitmaps.

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: support checking all autoneg enable bits
Qi Zhang [Mon, 15 Jun 2020 02:05:02 +0000 (10:05 +0800)]
net/ice/base: support checking all autoneg enable bits

struct ice_aqc_get_phy_caps_data has multiple autoneg enable bits.
ice_is_phy_caps_an_enabled checks all bits and returns true if any
autoneg enable bits are set.

Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: remove unimplemented function prototypes
Qi Zhang [Mon, 15 Jun 2020 02:05:01 +0000 (10:05 +0800)]
net/ice/base: remove unimplemented function prototypes

There are no implementations for these two functions so remove the
prototypes.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: add entries in profile TCAM with priority
Qi Zhang [Mon, 15 Jun 2020 02:05:00 +0000 (10:05 +0800)]
net/ice/base: add entries in profile TCAM with priority

The profile TCAM tables are implemented such that entries with a smaller
index in the table have a higher priority. When records to be added to
the table have flags to differentiate between standard PTG and VSIG
records, then these entries need to have higher priority in order to be
found and processed first.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: fix memory leak on error path
Qi Zhang [Mon, 15 Jun 2020 02:04:59 +0000 (10:04 +0800)]
net/ice/base: fix memory leak on error path

Handles memory leaks during control queue initialization and
buffer allocation failures. The MACRO - ICE_FREE_CQ_BUFS is modified to
re-use for this fix.

Fixes: 6c1f26be50a2 ("net/ice/base: add control queue information")
Cc: stable@dpdk.org
Signed-off-by: Surabhi Boob <surabhi.boob@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: remove unneeded variable
Qi Zhang [Mon, 15 Jun 2020 02:04:58 +0000 (10:04 +0800)]
net/ice/base: remove unneeded variable

The variable 'adj' is initialized to 0 and later used in an addition,
but the value is never changed from 0. Remove the variable since it's
doing nothing.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: fix return value
Qi Zhang [Mon, 15 Jun 2020 02:04:57 +0000 (10:04 +0800)]
net/ice/base: fix return value

Function ice_rem_adv_rule_id return incorrect error code (ICE_ERR_PARAM)
whereas it should have returned ICE_ERR_DOES_NOT_EXIST return code
if filter list is empty or unable to find "rule" in list

Fixes: f89aa3affa9e ("net/ice/base: support removing advanced rule")
Cc: stable@dpdk.org
Signed-off-by: Kiran Patil <kiran.patil@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: update VSI handle to remaining VSI
Qi Zhang [Mon, 15 Jun 2020 02:04:56 +0000 (10:04 +0800)]
net/ice/base: update VSI handle to remaining VSI

When removing VSI from VSI list, if only one VSI left, we need
to downgrade a switch rule's action from "to VSI LIST" to "to VSI",
So, needs to update the VSI handle to the last remaining VSI for the
new action but not the first VSI be added to the list.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: add rate limiter profile bit mask check
Qi Zhang [Mon, 15 Jun 2020 02:04:55 +0000 (10:04 +0800)]
net/ice/base: add rate limiter profile bit mask check

Mask bits before accessing the rate limiting profile type field.

Signed-off-by: Tarun Singh <tarun.k.singh@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: reset capabilities before parsing
Qi Zhang [Mon, 15 Jun 2020 02:04:54 +0000 (10:04 +0800)]
net/ice/base: reset capabilities before parsing

The capability flags used to report whether an NVM component has
a pending update are stored as simple booleans. If ice_parse_caps finds
the relevant capability then the boolean is set to true.

If the capability is not provided by firmware, then the boolean value
will be left alone. This works during initialization because the
capabilities structure is zero-initialized.

However, this does not work if capabilities are updated by calling
ice_get_caps again after driver load. For example, consider if firmware
had a pending update, and then an EMPR was triggered. The update will
complete, and firmware will no longer report these capabilities.

However, the device driver will have already set the pending flags.
After an EMPR, new capabilities are read. However, because the pending
flags in the dev_caps.common_cap structure have already been set, they
will remain true.

Fix this by clearing the capabilities structures in ice_parse_caps
before processing any capabilities.

This ensures that the capabilities structure will always be refreshed to
match the state of the device or function capabilities reported by
firmware.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: fix advanced switch rule stale information
Qi Zhang [Mon, 15 Jun 2020 02:04:53 +0000 (10:04 +0800)]
net/ice/base: fix advanced switch rule stale information

To avoid having stale information about "adv_rule" per recipe, when all
rules associated to a given recipe are deleted, reset the "adv_rule"
flag otherwise it causes problem later on when decisions about filter
rules being present or not are made based on "adv_rule" flag.

Removed setting "adv_rule = 1" when recipe is created. It is set
correctly when advanced switch rule is added referring to the recipe
which was created as a result of adding advanced switch rule.

Signed-off-by: Kiran Patil <kiran.patil@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: support more PPPoE packet type
Qi Zhang [Mon, 15 Jun 2020 02:04:52 +0000 (10:04 +0800)]
net/ice/base: support more PPPoE packet type

This patch add more dummy packet type for PPPoE packet,
it enable tcp/udp layer of IPv4/IPv6 for PPPoE payload,
so we can use L4 dst/src port as input set for switch
filter.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: remove unnecessary case branches
Qi Zhang [Mon, 15 Jun 2020 02:04:51 +0000 (10:04 +0800)]
net/ice/base: remove unnecessary case branches

Remove unnecessary case branch, since the switch and pipeline stage is
not designed to be handled by the flow module.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: return correct error code
Qi Zhang [Mon, 15 Jun 2020 02:04:50 +0000 (10:04 +0800)]
net/ice/base: return correct error code

Return ICE_ERR_DOES_NOT_EXIST return code if admin command error code is
ICE_AQ_RC_ENOENT (not exist). ice_aq_sw_rules is used when switch
rule is getting added/deleted/updated. In case of delete/update
switch rule, admin command can return ICE_AQ_RC_ENOENT error code
if such rule does not exist, hence return ICE_ERR_DOES_NOT_EXIST error
code from ice_aq_sw_rule, so that caller of this function can decide
how to handle ICE_ERR_DOES_NOT_EXIST.

Allow proper cleanup of internal data structures from ice_rem_adv_rule
function if ice_aq_sw_rules return error code ICE_ERR_DOES_NOT_EXIST
otherwise per recipe:rule list will never become empty.

Signed-off-by: Kiran Patil <kiran.patil@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: add debug logs
Qi Zhang [Mon, 15 Jun 2020 02:04:49 +0000 (10:04 +0800)]
net/ice/base: add debug logs

Add debug logs for ice_aq_get_phy_caps(), and format
ice_aq_set_phy_cfg() and ice_aq_get_link_info() debug logs to make them
more readable.

Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: use macro for sizeof
Qi Zhang [Mon, 15 Jun 2020 02:04:48 +0000 (10:04 +0800)]
net/ice/base: use macro for sizeof

The definition of ICE_SW_RULE_RX_TX_ETH_HDR_SIZE open codes the size of
a structure field. Replace this with the use of FIELD_SIZEOF.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: support RSS IPv6 prefix
Qi Zhang [Mon, 15 Jun 2020 02:04:47 +0000 (10:04 +0800)]
net/ice/base: support RSS IPv6 prefix

Some IPv6 prefix related fields are defined in this patch, so that we
can use prefixes instead of full IPv6 address for RSS. These prefixes
include the first 32, 48, 64 bits of both SRC and DST IPV6 address.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: adjust function signature style format
Qi Zhang [Mon, 15 Jun 2020 02:04:46 +0000 (10:04 +0800)]
net/ice/base: adjust function signature style format

Where possible, cuddle multiple lines of function signatures to be
consistent throughout the code.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: remove unnecessary braces
Qi Zhang [Mon, 15 Jun 2020 02:04:45 +0000 (10:04 +0800)]
net/ice/base: remove unnecessary braces

This patch mainly does cleanups related to unnecessary braces.
There might be different opinion to keep braces if more than
single line, but the purpose here is trying to sync DPDK's base
code with kernel's copy and its more convenient for future update.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: give time for package download after PF reset
Qi Zhang [Mon, 15 Jun 2020 02:04:44 +0000 (10:04 +0800)]
net/ice/base: give time for package download after PF reset

To allow for resets during package download, increase the timeout period
after performing a PF Reset. The time waited is the global config lock
timeout plus the normal PFSWR timeout.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: allow GENEVE and VXLAN rules with VLAN
Qi Zhang [Mon, 15 Jun 2020 02:04:43 +0000 (10:04 +0800)]
net/ice/base: allow GENEVE and VXLAN rules with VLAN

When programming GENEVE and VXLAN switch rules, there are some instances
where both VLAN tagged packets plus non-VLAN tagged packets are needed
to match the rule.

In order to perform this action in one rule, the switch code needs
to setup the packet flag mask to ignore the VLAN packet flag. This
will allow the rule to match both VLAN and non-VLAN packets.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: add NVM helper functions
Qi Zhang [Mon, 15 Jun 2020 02:04:42 +0000 (10:04 +0800)]
net/ice/base: add NVM helper functions

Add couple functions that DPDK would like to use for accessing the
NVM.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: initialize PHY configuration FEC fields
Qi Zhang [Mon, 15 Jun 2020 02:04:41 +0000 (10:04 +0800)]
net/ice/base: initialize PHY configuration FEC fields

Currently the caller needs to initialize the ice_cfg_phy_fec() parameter
ice_aqc_set_phy_cfg_data FEC fields before calling. However, this is not
necessary since ice_cfg_phy_fec() calls Get PHY Capabilities.

Initialize ice_aqc_set_phy_cfg_data FEC capabilities and FEC option
fields from Get PHY Capabilities with media/topology in
ice_cfg_phy_fec().

Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: add flow director completion report option
Qi Zhang [Mon, 15 Jun 2020 02:04:40 +0000 (10:04 +0800)]
net/ice/base: add flow director completion report option

This patch introduces comp_report variable so that the called can
determine whether to report completion on error or on all cases.

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: support FDIR for L2TPV3 ESP AH and PFCP
Qi Zhang [Mon, 15 Jun 2020 02:04:39 +0000 (10:04 +0800)]
net/ice/base: support FDIR for L2TPV3 ESP AH and PFCP

FDIR can forward:
- L2TPV3 packets with session id.
- IPSEC ESP packets with security parameter index.
- IPSEC AH packets with security parameter index.
- NAT_T ESP packets with security parameter index.
- PFCP packets with s field value.

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: cleanup comment formatting
Qi Zhang [Mon, 15 Jun 2020 02:04:38 +0000 (10:04 +0800)]
net/ice/base: cleanup comment formatting

Add missing space between end of comment text and comment terminator,
and remove unnecessary punctuation.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: group function prototypes together
Qi Zhang [Mon, 15 Jun 2020 02:04:37 +0000 (10:04 +0800)]
net/ice/base: group function prototypes together

There are some function prototypes at the beginning of the file and
some at the end, group them all together so that they are in one
consistent location.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: change IPv6 training packet
Qi Zhang [Mon, 15 Jun 2020 02:04:36 +0000 (10:04 +0800)]
net/ice/base: change IPv6 training packet

Add additional UDP payload to allow for additional headers such as ESP.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: refactor flow director filter swap
Qi Zhang [Mon, 15 Jun 2020 02:04:35 +0000 (10:04 +0800)]
net/ice/base: refactor flow director filter swap

Move the swap of flow director addresses and ports into training packet
generation. This reduces the code written for ACL.

Signed-off-by: Henry Tieman <henry.w.tieman@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: consolidate VF promiscuous mode
Qi Zhang [Mon, 15 Jun 2020 02:04:34 +0000 (10:04 +0800)]
net/ice/base: consolidate VF promiscuous mode

Consolidate the Promiscuous rule for SMBM on the chosen logical port.

Signed-off-by: Shibin Koikkara Reeny <shibin.koikkara.reeny@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: update maximum PHY type high index
Qi Zhang [Mon, 15 Jun 2020 02:04:33 +0000 (10:04 +0800)]
net/ice/base: update maximum PHY type high index

As currently, we are supporting only 5 PHY_SPEEDs for phy_type_high.
Thus, we should adjust the value of ICE_PHY_TYPE_HIGH_MAX_INDEX to 5.

Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: fix ACL rules index
Qi Zhang [Mon, 15 Jun 2020 02:04:32 +0000 (10:04 +0800)]
net/ice/base: fix ACL rules index

A u8 idx in ice_acl_add_entry  causes the code to truncate the values
greater than 255 to 255 or less when calling ice_aq_program_acl_entry()
resulting in the wrong TCAM index being programmed for the specified
rule. The result is that the rule action doesn't work correctly
(packets don't get routed to the correct queue or dropped if that
is the action). Fix the issue by changing the variable to be a u16
again.

Fixes: f3202a097f12 ("net/ice/base: add ACL module")
Cc: stable@dpdk.org
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: add AUI media type
Qi Zhang [Mon, 15 Jun 2020 02:04:31 +0000 (10:04 +0800)]
net/ice/base: add AUI media type

Add and report AUI PHY types as an AUI media type

Signed-off-by: Doug Dziggel <douglas.a.dziggel@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: improve VSI filters rebuild
Qi Zhang [Mon, 15 Jun 2020 02:04:30 +0000 (10:04 +0800)]
net/ice/base: improve VSI filters rebuild

This change improve VSI filter configuration rebuild for
multiport configuration, ie. where 1 PF includes more than
one logical port. For some functions, association between
port and corresponding switch_info or port_info structure
has been lost because by default the pointer to the first
element of array (switch, port etc.) is passed as function
argument. With this change, pointer to proper element is
added an extra argument in relevant functions.

Signed-off-by: Grzegorz Nitka <grzegorz.nitka@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: gate devices from FW link override
Qi Zhang [Mon, 15 Jun 2020 02:04:29 +0000 (10:04 +0800)]
net/ice/base: gate devices from FW link override

Currently, the FW link override feature is only permitted for E810
devices.  However, the ice_fw_supports_link_override() guards against FW
versions irrespective of the device. This assumes FW versions between
the families are aligned, which is not the case.

Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: report AOC PHY types as fiber
Qi Zhang [Mon, 15 Jun 2020 02:04:28 +0000 (10:04 +0800)]
net/ice/base: report AOC PHY types as fiber

Report AOC types as fiber instead of unknown

Signed-off-by: Doug Dziggel <douglas.a.dziggel@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: consolidate MAC config set
Qi Zhang [Mon, 15 Jun 2020 02:04:27 +0000 (10:04 +0800)]
net/ice/base: consolidate MAC config set

Consolidate implementation of ice_aq_set_mac_cfg for switch mode
and NIC mode. As per the specification, the driver needs to call
set_mac_cfg (opcode 0x0603) to be able to exercise jumbo frames.

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: avoid undefined behavior
Qi Zhang [Mon, 15 Jun 2020 02:04:26 +0000 (10:04 +0800)]
net/ice/base: avoid undefined behavior

When writing the driver's struct ice_tlan_ctx structure, do not write
the 8-bit element int_q_state with the associated internal-to-hardware
field which is 122-bits, otherwise the helper function ice_write_byte()
will use undefined behavior when setting the mask used for that write.
This should not cause any functional change and will avoid use of
undefined behavior.  Also, update a comment to highlight this structure
element is not written.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: disable profile merge for flow director
Qi Zhang [Mon, 15 Jun 2020 02:04:25 +0000 (10:04 +0800)]
net/ice/base: disable profile merge for flow director

For Flow Director, we don't want to re-use an existed profile with the
same field vector and mask. Merging two different flow_type’s field
vector will also make them sharing trained rule and cause rule
interference.

For example:
issue rule A: IPV4_TCP matching tcp src&dst port 80  to queue 8
issue rule B: IPV6_TCP matching tcp src&dst port 200 to queue 20
Below behavior is found but not expected:
IPV4_TCP pkt with src&dst port 200 hits rule B and goes to queue 20
IPV6_TCP pkt with src&dst port 80  hits rule A and goes to queue 8

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: add macros to parse flow director Rx desc
Qi Zhang [Mon, 15 Jun 2020 02:04:24 +0000 (10:04 +0800)]
net/ice/base: add macros to parse flow director Rx desc

Add descriptor field offset and mask definition. It is used to parse
FDIR Rx descriptor field value.

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/ice/base: support flow director for non-IP packets
Qi Zhang [Mon, 15 Jun 2020 02:04:23 +0000 (10:04 +0800)]
net/ice/base: support flow director for non-IP packets

FDIR can forward Ethernet packets with non-IP ethertype.

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
4 years agonet/mlx5: fix LRO checksum
Dong Zhou [Fri, 12 Jun 2020 08:57:46 +0000 (11:57 +0300)]
net/mlx5: fix LRO checksum

The TCP checksum includes IPV4 pseudo-header checksum and L3
payload checksum which include TCP header and TCP payload.
When mlx5 LRO is enabled, HW will calculate the TCP payload
checksum, PMD need complete the IPV4 pseudo-header checksum
and the TCP header checksum.

The mlx5_lro_update_tcp_hdr function completes the TCP header
checksum, but this function using lower 4 bits of data-offset
field in TCP header to get the whole TCP header length, this
will cause TCP header checksum wrong calculation.

Update the code using higher 4 bits of data-offset field
instead of lower 4 bits.

Fixes: e4c2a16eb1de ("net/mlx5: handle LRO packets in Rx queue")
Cc: stable@dpdk.org
Signed-off-by: Dong Zhou <dongz@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: fix descriptors number adjustment
Alexander Kozyrev [Thu, 11 Jun 2020 17:43:27 +0000 (17:43 +0000)]
net/mlx5: fix descriptors number adjustment

The number of descriptors to configure in a Rx/Tx queue is passed to
the mlx5_tx/rx_queue_pre_setup() function by value. That means any
adjustments of this variable are local and cannot affect the actual
value that is used to allocate mbufs in the mlx5_txq/rxq_new()
functions. Pass the number as a reference to actually update it.

Fixes: 6218063b39a6 ("net/mlx5: refactor Rx data path")
Fixes: 1d88ba171942 ("net/mlx5: refactor Tx data path")
Cc: stable@dpdk.org
Signed-off-by: Alexander Kozyrev <akozyrev@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: do not select legacy MPW implicitly
Alexander Kozyrev [Thu, 11 Jun 2020 17:42:00 +0000 (17:42 +0000)]
net/mlx5: do not select legacy MPW implicitly

The Legacy MPW (multi-packet write) should not be engaged implicitly.
We should exclude this function from a Tx burst routine selection
process unless it is requested specifically by setting the txq_mpw_en
devarg.  Exclude this function from the selection process the same way
it is done for the Enhanced MPW in the mlx5_select_tx_function()
routine.

Fixes: eb8121ab9dac ("net/mlx5: introduce Tx burst routine template")
Cc: stable@dpdk.org
Signed-off-by: Alexander Kozyrev <akozyrev@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
4 years agonet/mlx5: refactor statistics
Ophir Munk [Wed, 10 Jun 2020 09:32:33 +0000 (09:32 +0000)]
net/mlx5: refactor statistics

mlx5 statistics are calculated by several methods:
1. In software when packets go through datapath.
2. Calling ioctl with ETHTOOL command (Linux specific).
3. Reading counters from SYSFS device path (Linux specific).

The Linux related functions are moved to file linux/mlx5_os.c.

Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agocommon/mlx5: flag Verbs dependency in a DevX command
Ophir Munk [Wed, 10 Jun 2020 09:32:31 +0000 (09:32 +0000)]
common/mlx5: flag Verbs dependency in a DevX command

Function mlx5_devx_cmd_qp_query_tis_td() receives as parameter a pointer
to verbs QP returned by ibv_create_qp. Therefore support it only if
HAVE_IBV_FLOW_DV_SUPPORT is defined. Otherwise return an error ENOTSUP.

Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: refactor device operations for Linux
Ophir Munk [Wed, 10 Jun 2020 09:32:30 +0000 (09:32 +0000)]
net/mlx5: refactor device operations for Linux

There are three types of eth_dev_ops: primary, secondary and isolate.
Their function calls assignments are moved from common file
mlx5.c to the Linux specific file linux/mlx5_os.c.

Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: move Linux-specific functions
Ophir Munk [Wed, 10 Jun 2020 09:32:29 +0000 (09:32 +0000)]
net/mlx5: move Linux-specific functions

File mlx5_ethdev.c is partially moved to linux/mlx5_ethdev_os.c for
functions which are Linux specific. Functions which are Linux agnostics
remain in mlx5_ethdev.c file.

Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: move socket files in Linux directory
Ophir Munk [Wed, 10 Jun 2020 09:32:28 +0000 (09:32 +0000)]
net/mlx5: move socket files in Linux directory

mlx5_socket.c file is using APIs which are Linux specifics.  Therefore
move it (including mlx5_socket.h) from net/mlx5 directory to
net/mlx5/linux directory. This commit also updates the Makefile and
the meson files.

Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
4 years agonet/mlx5: rename ib in names
Ophir Munk [Wed, 10 Jun 2020 09:32:27 +0000 (09:32 +0000)]
net/mlx5: rename ib in names

Renames in this commit:
mlx5_ibv_list -> mlx5_dev_ctx_list
mlx5_alloc_shared_ibctx -> mlx5_alloc_shared_dev_ctx
mlx5_free_shared_ibctx -> mlx5_free_shared_dev_ctx
mlx5_ibv_shared_port -> mlx5_dev_shared_port
ibv_port -> dev_port

Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: remove completion object dependency on DV
Ophir Munk [Wed, 10 Jun 2020 09:32:26 +0000 (09:32 +0000)]
net/mlx5: remove completion object dependency on DV

Replace 'struct mlx5dv_devx_cmd_comp *' with 'void *' in 'struct
mlx5_dev_ctx_shared'.

Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: fix flow memory allocation size
Gregory Etelson [Mon, 8 Jun 2020 16:01:56 +0000 (19:01 +0300)]
net/mlx5: fix flow memory allocation size

In DV enabled MLX5 PMD build mlx5_ipool_cfg[MLX5_IPOOL_MLX5_FLOW].size
was initiated for DV structure. If RTE initialization encountered MLX5
PCI function with disabled DV support
mlx5_ipool_cfg[MLX5_IPOOL_MLX5_FLOW].size was reduced to match legacy
verbs flow size.  Since mlx5_ipool_cfg[MLX5_IPOOL_MLX5_FLOW] is a
global variable that change reflected on DV enabled MLX5 PCI functions
too.

Running flow with invalid ipool size crashes PMD.

The patch adjusts ipool flow size for each active PCI function.

Fixes: b88341ca35fc ("net/mlx5: convert flow dev handle to indexed")
Cc: stable@dpdk.org
Signed-off-by: Gregory Etelson <getelson@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: fix GTP mask definition location
Dekel Peled [Wed, 10 Jun 2020 13:25:19 +0000 (16:25 +0300)]
net/mlx5: fix GTP mask definition location

Recent patch added definition of mask MLX5_GTP_FLAGS_MASK, just
above function flow_dv_validate_item_gtp(), where it is used.

Patch was applied together with other patches which modified the same
file, so the mask was located further away from the function it is
used in.

This patch moves the mask definition to the proper location.

Fixes: 563ac307a46b ("net/mlx5: support match on GTP flags")
Cc: stable@dpdk.org
Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/pcap: support Tx nanosecond timestamps
Vivien Didelot [Tue, 9 Jun 2020 19:07:19 +0000 (15:07 -0400)]
net/pcap: support Tx nanosecond timestamps

When capturing packets into a PCAP file, DPDK currently uses
microseconds for the timestamps. But libpcap supports interpreting
tv_usec as nanoseconds depending on the file timestamp precision,
as of commit ba89e4a18e8b ("Make timestamps precision configurable").

To support this, use PCAP_TSTAMP_PRECISION_NANO when creating the
empty PCAP file as specified by PCAP_OPEN_DEAD(3PCAP) and implement
nanosecond timeval addition. This also ensures that the precision
reported by capinfos is nanoseconds (9).

Note that NSEC_PER_SEC is defined as 1000000000L instead of 1e9 since
the latter might be interpreted as floating point.

Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
4 years agonet/mlx5: fix typos in meter error messages
Ali Alnubani [Mon, 8 Jun 2020 14:02:57 +0000 (17:02 +0300)]
net/mlx5: fix typos in meter error messages

Fixes: 3bd26b23cefc ("net/mlx5: support meter profile operations")
Cc: stable@dpdk.org
Signed-off-by: Ali Alnubani <alialnu@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/hns3: fix unintended sign extension in dump operation
Hongbo Zheng [Tue, 9 Jun 2020 08:44:17 +0000 (16:44 +0800)]
net/hns3: fix unintended sign extension in dump operation

There are coverity defects related "Unintended sign extension" in the
internal static function named hns3_get_regs_length used for dumping reg
operation.

This patch fixes them by replacing the data type of cmdq_lines,
common_lines, ring_lines and tqp_intr_lines with uint32_t in the inner
static function named hns3_get_regs_length of hns3 PMD driver.

Coverity issue: 349917, 349914
Fixes: 936eda25e8da ("net/hns3: support dump register")
Cc: stable@dpdk.org
Signed-off-by: Hongbo Zheng <zhenghongbo3@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
4 years agonet/hns3: fix unintended sign extension in fd operation
Wei Hu (Xavier) [Tue, 9 Jun 2020 08:44:16 +0000 (16:44 +0800)]
net/hns3: fix unintended sign extension in fd operation

Currently, there are coverity defects warning as below:

CID 349937 (#1 of 1): Unintended sign extension (SIGN_EXTENSION)
sign_extension: Suspicious implicit sign extension: port_number with
type uint16_t (16 bits, unsigned) is promoted in port_number << cur_pos
to type int (32 bits, signed), then sign-extended to type unsigned long
(64 bits, unsigned). If port_number << cur_pos is greater than
0x7FFFFFFF, the upper bits of the result will all be 1.

CID 349893 (#1 of 1): Unintended sign extension (SIGN_EXTENSION)
sign_extension: Suspicious implicit sign extension: vlan_tag with type
uint8_t (8 bits, unsigned) is promoted in vlan_tag << cur_pos to type
int (32 bits, signed), then sign-extended to type unsigned long (64
bits, unsigned). If vlan_tag << cur_pos is greater than 0x7FFFFFFF, the
upper bits of the result will all be 1.

This patch fixes them by replacing the data type of port_number and
vlan_tag with uint32_t in the inner static function named
hns3_fd_convert_meta_data of hns3 PMD driver.

Coverity issue: 349937, 349893
Fixes: fcba820d9b9e ("net/hns3: support flow director")
Cc: stable@dpdk.org
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
4 years agonet/hns3: ignore function return on reset error path
Hongbo Zheng [Tue, 9 Jun 2020 08:44:15 +0000 (16:44 +0800)]
net/hns3: ignore function return on reset error path

There is a coverity defect related "Unchecked return value".

The internal static hns3_reset_err_handle function is reset error
process of hns3 PMD driver. If failure in reset process, it does not
mean that the network port is completely unavailable, so the command
interface between driver and firmware still needs to be initialized.
Regardless of whether the execution of the function named hns3_cmd_init
is successful or not, the next process after execution must be
continued, so there is no need to check the return value. If
hns3_cmd_init fails to execute, there will be corresponding log
information inside hns3_cmd_init.

This patch adds '(void)' Type conversion to avoid coverity warning.

Coverity issue: 349934
Fixes: 2790c6464725 ("net/hns3: support device reset")
Cc: stable@dpdk.org
Signed-off-by: Hongbo Zheng <zhenghongbo3@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
4 years agonet/hns3: fix flow director error message
Wei Hu (Xavier) [Tue, 9 Jun 2020 08:44:14 +0000 (16:44 +0800)]
net/hns3: fix flow director error message

There is a coverity defect related "Argument cannot be negative".

This patch fixes it by passing '-ret' to the function strerror() when
ret is negative.

Coverity issue: 349933
Fixes: fcba820d9b9e ("net/hns3: support flow director")
Cc: stable@dpdk.org
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
4 years agoapp/testpmd: fix error detection in MTU command
Shy Shyman [Mon, 8 Jun 2020 14:17:47 +0000 (17:17 +0300)]
app/testpmd: fix error detection in MTU command

MTU is used in testpmd to set the maximum payload size for packets.
According to testpmd, the setting influence RX only.
In rte_ethdev there's no relation between MTU setting and JUMBO offload
or rx_max_pkt_len.

The previous fix in patch referenced below was meant to update the
correlated variables of max_pkt_len and JUMBO offload, but by doing so
it assumes that MTU setting can only exist when JUMBO offload supported
in the device. For example fail-safe device does supports set MTU and
doesn't support JUMBO offload, and in this case, though set MTU
succeeds, an error message is still printed since the JUMBO packet
offload is disabled.

The fix separates the two conditions to make sure the error
triggers only in case the set_mtu action actually failed.

Fixes: 150c9ac2df13 ("app/testpmd: update Rx offload after setting MTU")
Cc: stable@dpdk.org
Signed-off-by: Shy Shyman <shys@mellanox.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Reviewed-by: Phil Yang <phil.yang@arm.com>
4 years agonet/mlx5: remove Verbs dependency in spawn struct
Ophir Munk [Wed, 3 Jun 2020 15:06:02 +0000 (15:06 +0000)]
net/mlx5: remove Verbs dependency in spawn struct

1. Replace 'struct ibv_device *' with 'void *' in 'struct
mlx5_dev_spawn_data'. Define a getter function to retrieve the
device name.
2. Rename ibv_dev and ibv_port as phys_dev and phys_port
respectively.

Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: add Linux-specific header file
Ophir Munk [Wed, 3 Jun 2020 15:06:01 +0000 (15:06 +0000)]
net/mlx5: add Linux-specific header file

File drivers/net/linux/mlx5_os.h is added. It includes specific
Linux definitions such as PCI driver flags, link state changes
interrupts, link removal interrupts, etc.

Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: refactor PCI probing on Linux
Ophir Munk [Wed, 3 Jun 2020 15:06:00 +0000 (15:06 +0000)]
net/mlx5: refactor PCI probing on Linux

Refactor PCI probing related code. Move Linux specific functions (as
well as verbs and dv related code) from mlx5.c file to linux/mlx5_os.c
file.

Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: remove umem field dependency on Direct Verbs
Ophir Munk [Wed, 3 Jun 2020 15:05:59 +0000 (15:05 +0000)]
net/mlx5: remove umem field dependency on Direct Verbs

umem field is used in several structs. Its type 'struct mlx5dv_devx_umem
*' is changed to 'void *'. This change will allow non-Linux OS
compilations.

Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: remove attributes dependency on Verbs
Ophir Munk [Wed, 3 Jun 2020 15:05:58 +0000 (15:05 +0000)]
net/mlx5: remove attributes dependency on Verbs

Define 'struct mlx5_dev_attr' which is ibv and dv independent. It
contains attribute that were originally contained in 'struct
ibv_device_attr_ex' and 'struct mlx5dv_context dv_attr'. Add a new API
mlx5_os_get_dev_attr() which fills in the new defined struct.

Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agocommon/mlx5: remove protection domain dependency on Verbs
Ophir Munk [Wed, 3 Jun 2020 15:05:57 +0000 (15:05 +0000)]
common/mlx5: remove protection domain dependency on Verbs

Replace 'struct ibv_pd *' with 'void *' in struct mlx5_ctx_shared and
all function calls in mlx5 PMD.

Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: add Linux-specific file with getter functions
Ophir Munk [Wed, 3 Jun 2020 15:05:56 +0000 (15:05 +0000)]
net/mlx5: add Linux-specific file with getter functions

'ctx' type (field in 'struct mlx5_ctx_shared') is changed from 'struct
ibv_context *' to 'void *'.  'ctx' members which are verbs dependent
(e.g. device_name) will be accessed through getter functions which are
added to a new file under Linux directory: linux/mlx5_os.c.

Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agonet/mlx5: rename Verbs shared object
Ophir Munk [Wed, 3 Jun 2020 15:05:55 +0000 (15:05 +0000)]
net/mlx5: rename Verbs shared object

Replace all 'mlx5_ibv_shared' appearances with 'mlx5_dev_ctx_shared'.

Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
4 years agocfgfile: check flags on creation for future proofing
Stephen Hemminger [Mon, 27 Apr 2020 23:16:25 +0000 (16:16 -0700)]
cfgfile: check flags on creation for future proofing

All API's should check that they support the flag values
passed. If an application passes an invalid flag it could
cause problems in later ABI.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
4 years agostack: check flags on creation for future proofing
Stephen Hemminger [Mon, 27 Apr 2020 23:16:24 +0000 (16:16 -0700)]
stack: check flags on creation for future proofing

All API's should check that they support the flag values
passed. If an application passes an invalid flag it could
cause problems in later ABI.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Gage Eads <gage.eads@intel.com>
4 years agohash: check flags on creation for future proofing
Stephen Hemminger [Mon, 27 Apr 2020 23:16:23 +0000 (16:16 -0700)]
hash: check flags on creation for future proofing

All API's should check that they support the flag values
passed. If an application passes an invalid flag it could
cause problems in later ABI.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Yipeng Wang <yipeng1.wang@intel.com>
4 years agoring: check flag settings for future proofing
Stephen Hemminger [Mon, 27 Apr 2020 23:16:22 +0000 (16:16 -0700)]
ring: check flag settings for future proofing

All API's should check that they support the flag values passed.
These checks ensure that the extra bits can safely be used
without risk of ABI breakage.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
4 years agonet/hinic: use common bit operations API
Joyce Kong [Mon, 27 Apr 2020 07:58:56 +0000 (15:58 +0800)]
net/hinic: use common bit operations API

Remove its own bit operation APIs and use the common one,
this can reduce the code duplication largely.

Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
4 years agonet/qede: use common bit operations API
Joyce Kong [Mon, 27 Apr 2020 07:58:55 +0000 (15:58 +0800)]
net/qede: use common bit operations API

Remove its own bit operation APIs and use the common one,
this can reduce the code duplication largely.

Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
4 years agonet/bnx2x: use common bit operations API
Joyce Kong [Mon, 27 Apr 2020 07:58:54 +0000 (15:58 +0800)]
net/bnx2x: use common bit operations API

Remove its own bit operation APIs and use the common one,
this can reduce the code duplication largely.

Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
4 years agonet/axgbe: use common bit operations API
Joyce Kong [Mon, 27 Apr 2020 07:58:53 +0000 (15:58 +0800)]
net/axgbe: use common bit operations API

Remove its own bit operation APIs and use the common one,
this can reduce the code duplication largely.

Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
4 years agotest/bitops: add bit operations test case
Joyce Kong [Mon, 27 Apr 2020 07:58:52 +0000 (15:58 +0800)]
test/bitops: add bit operations test case

Add test cases for setting bit, clearing bit, testing
and setting bit, testing and clearing bit operation.

Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Reviewed-by: Phil Yang <phil.yang@arm.com>
4 years agoeal: introduce bit operations API
Joyce Kong [Mon, 27 Apr 2020 07:58:51 +0000 (15:58 +0800)]
eal: introduce bit operations API

Bitwise operation APIs are defined and used in a lot of PMDs,
which caused a huge code duplication. To reduce duplication,
this patch consolidates them into a common API family.

Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Reviewed-by: Phil Yang <phil.yang@arm.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
4 years agoeal/windows: implement basic memory management
Dmitry Kozlyuk [Mon, 15 Jun 2020 00:43:54 +0000 (03:43 +0300)]
eal/windows: implement basic memory management

Basic memory management supports core libraries and PMDs operating in
IOVA as PA mode. It uses a kernel-mode driver, virt2phys, to obtain
IOVAs of hugepages allocated from user-mode. Multi-process mode is not
implemented and is forcefully disabled at startup. Assign myself as a
maintainer for Windows file and memory management implementation.

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
4 years agoeal/windows: initialize hugepage info
Dmitry Kozlyuk [Mon, 15 Jun 2020 00:43:53 +0000 (03:43 +0300)]
eal/windows: initialize hugepage info

Add hugepages discovery ("large pages" in Windows terminology)
and update documentation for required privilege setup. Only 2MB
hugepages are supported and their number is estimated roughly
due to the lack or unstable status of suitable OS APIs.
Assign myself as maintainer for the implementation file.

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
4 years agodoc: split build and run instructions in Windows guide
Dmitry Kozlyuk [Mon, 15 Jun 2020 00:43:52 +0000 (03:43 +0300)]
doc: split build and run instructions in Windows guide

With memory management implemented for Windows, the guide for running
sample applications is going to be extended with hugepages and driver
setup.  Move run instructions to a separate file to give space for
planned expansion.

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
4 years agoeal/windows: improve CPU and NUMA node detection
Dmitry Kozlyuk [Mon, 15 Jun 2020 00:43:51 +0000 (03:43 +0300)]
eal/windows: improve CPU and NUMA node detection

1. Map CPU cores to their respective NUMA nodes as reported by system.
2. Support systems with more than 64 cores (multiple processor groups).
3. Fix magic constants, styling issues, and compiler warnings.
4. Add EAL private function to map DPDK socket ID to NUMA node number.

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
4 years agoeal/windows: complete queue.h data structures
Dmitry Kozlyuk [Mon, 15 Jun 2020 00:43:50 +0000 (03:43 +0300)]
eal/windows: complete queue.h data structures

Limited version imported previously lacks at least SLIST macros.
Import a complete file from FreeBSD, since its license exception is
already approved by Technical Board.

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
4 years agoeal/windows: add tracing stubs
Dmitry Kozlyuk [Mon, 15 Jun 2020 00:43:49 +0000 (03:43 +0300)]
eal/windows: add tracing stubs

EAL common code depends on tracepoint calls, but generic implementation
cannot be enabled on Windows due to missing standard library facilities.
Add stub functions to support tracepoint compilation, so that common
code does not have to conditionally include tracepoints until proper
support is added.

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
4 years agotrace: add size_t field emitter
Dmitry Kozlyuk [Mon, 15 Jun 2020 00:43:48 +0000 (03:43 +0300)]
trace: add size_t field emitter

It is not guaranteed that sizeof(long) == sizeof(size_t). On Windows,
sizeof(long) == 4 and sizeof(size_t) == 8 for 64-bit programs.
Tracepoints using "long" field emitter are therefore invalid there.
Add dedicated field emitter for size_t and use it to store size_t values
in all existing tracepoints.

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
4 years agomem: extract common dynamic memory allocation
Dmitry Kozlyuk [Mon, 15 Jun 2020 00:43:47 +0000 (03:43 +0300)]
mem: extract common dynamic memory allocation

Code in Linux EAL that supports dynamic memory allocation (as opposed to
static allocation used by FreeBSD) is not OS-dependent and can be reused
by Windows EAL. Move such code to a file compiled only for the OS that
require it. Keep Anatoly Burakov maintainer of extracted code.

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
4 years agomem: extract common memseg list initialization
Dmitry Kozlyuk [Mon, 15 Jun 2020 00:43:46 +0000 (03:43 +0300)]
mem: extract common memseg list initialization

All supported OS create memory segment lists (MSL) and reserve VA space
for them in a nearly identical way. Move common code into EAL private
functions to reduce duplication.

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
4 years agoeal: introduce memory management wrappers
Dmitry Kozlyuk [Mon, 15 Jun 2020 00:43:45 +0000 (03:43 +0300)]
eal: introduce memory management wrappers

Introduce OS-independent wrappers for memory management operations used
across DPDK and specifically in common code of EAL:

* rte_mem_map()
* rte_mem_unmap()
* rte_mem_page_size()
* rte_mem_lock()

Windows uses different APIs for memory mapping and reservation, while
Unices reserve memory by mapping it. Introduce EAL private functions to
support memory reservation in common code:

* eal_mem_reserve()
* eal_mem_free()
* eal_mem_set_dump()

Wrappers follow POSIX semantics limited to DPDK tasks, but their
signatures deliberately differ from POSIX ones to be more safe and
expressive. New symbols are internal. Being thin wrappers, they require
no special maintenance.

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
4 years agoeal: introduce internal wrappers for file operations
Dmitry Kozlyuk [Mon, 15 Jun 2020 00:43:44 +0000 (03:43 +0300)]
eal: introduce internal wrappers for file operations

Introduce OS-independent wrappers in order to support common EAL code
on Unix and Windows:

* eal_file_open: open or create a file.
* eal_file_lock: lock or unlock an open file.
* eal_file_truncate: enforce a given size for an open file.

Implementation for Linux and FreeBSD is placed in "unix" subdirectory,
which is intended for common code between the two. These thin wrappers
require no special maintenance.

Common code supporting multi-process doesn't use the new wrappers,
because it is inherently Unix-specific and would impose excessive
requirements on the wrappers.

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
4 years agoeal: replace page sizes enum with a set of constants
Dmitry Kozlyuk [Mon, 15 Jun 2020 00:43:43 +0000 (03:43 +0300)]
eal: replace page sizes enum with a set of constants

Clang on Windows follows MS ABI where enum values are limited to 2^31-1.
Enum rte_page_sizes has members valued above this limit, which get
wrapped to zero, resulting in compilation error (duplicate values in
enum). Using MS ABI is mandatory for Windows EAL to call Win32 APIs.

Remove rte_page_sizes and replace its values with #define's.
This enumeration is not used in public API, so there's no ABI breakage.
Announce API changes for 20.08 in documentation.

Suggested-by: Jerin Jacob <jerinjacobk@gmail.com>
Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
4 years agoeal/windows: fix symbol export
David Marchand [Wed, 10 Jun 2020 14:30:49 +0000 (16:30 +0200)]
eal/windows: fix symbol export

rte_eal_get_configuration() has been made private in 19.11, remove
leftover in Windows export list.

Fixes: f58cef079b05 ("eal: make the global configuration private")

Signed-off-by: David Marchand <david.marchand@redhat.com>