Wenjun Wu [Mon, 21 Jun 2021 08:59:23 +0000 (16:59 +0800)]
net/ice/base: fix first profile mask
Since each PF does not share the same structure space, the first
mask value should start at 0 instead of hw->pf_id * per_pf to avoid
address overflow. Otherwise, address space will overlap when
masks.first + masks.count > ICE_PROF_MASK_COUNT, and it may lead to
unexpected variable assignment, which causes segmentation fault.
Fixes: 9467486f179f ("net/ice/base: enable masking for RSS and FD field vectors") Cc: stable@dpdk.org Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com> Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Steve Yang [Mon, 21 Jun 2021 08:03:42 +0000 (08:03 +0000)]
net/i40e: fix available RSS hash function
i40e can support following rss hash function types: default/toeplitz,
symmetric toeplitz, and simple_xor. However, when filter engine parses
pattern action, it only supports symmetric toeplitz & default.
Add simple_xor and toeplitz hash functions support when parsing pattern
action.
Fixes: ef4c16fd9148 ("net/i40e: refactor RSS flow") Cc: stable@dpdk.org Signed-off-by: Steve Yang <stevex.yang@intel.com> Acked-by: Beilei Xing <beilei.xing@intel.com>
Tudor Cornea [Tue, 15 Jun 2021 10:38:34 +0000 (13:38 +0300)]
net/ice: fix overflow in maximum packet length config
The len variable, used in the computation of max_pkt_len could overflow,
if used to store the result of the following computation:
ICE_SUPPORT_CHAIN_NUM * rxq->rx_buf_len
Since, we could define the mbuf size to have a large value (i.e 13312),
and ICE_SUPPORT_CHAIN_NUM is defined as 5, the computation mentioned
above could potentially result in a value which might be bigger than
MAX_USHORT.
The result will be that Jumbo Frames will not work properly
Dapeng Yu [Wed, 9 Jun 2021 07:05:08 +0000 (15:05 +0800)]
net/i40e: fix data path selection in secondary process
The flag use_avx2 and use_avx512 are defined as local variables, they
will not be aware by the secondary process, then wrong data path is
selected. Fix the issue by moving them into struct i40e_adapter.
Pavan Nikhilesh [Tue, 29 Jun 2021 07:44:21 +0000 (13:14 +0530)]
net/cnxk: enable PTP processing in vector Tx
Enable PTP offload in vector Tx burst function. Since, we can
no-longer use a single LMT line for burst of 4, split the LMT
into two and transmit twice.
Harman Kalra [Tue, 22 Jun 2021 20:05:53 +0000 (01:35 +0530)]
common/octeontx2: send link event to VF
Currently link event is only sent to the PF by AF as soon as it comes
up, or in case of any physical change in link. PF will broadcast
these link events to all its VFs as soon as it receives it.
But no event is sent when a new VF comes up, hence it will not have
the link status.
Adding support for sending link status to the VF once it comes up
successfully.
Signed-off-by: Harman Kalra <hkalra@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
Sunil Kumar Kori [Wed, 23 Jun 2021 04:47:01 +0000 (10:17 +0530)]
net/cnxk: support multicast filter
Patch adds multicast filter support for cn9k and cn10k platforms.
CGX DMAC filter table(32 entries) is divided among all LMACs
connected to it i.e. if CGX has 4 LMACs then each LMAC can have
up to 8 filters. If CGX has 1 LMAC then it can have up to 32
filters.
Above mentioned filter table is used to install unicast and multicast
DMAC address filters. Unicast filters are installed via
rte_eth_dev_mac_addr_add API while multicast filters are installed
via rte_eth_dev_set_mc_addr_list API.
So in total, supported MAC filters are equal to DMAC filters plus
mcast filters.
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Kiran Kumar K [Wed, 23 Jun 2021 04:46:49 +0000 (10:16 +0530)]
net/cnxk: support flow API
Adding initial version of rte_flow support for cnxk family device.
Supported rte_flow ops are flow_validate, flow_create, flow_destroy,
flow_flush, flow_query, flow_isolate.
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Sunil Kumar Kori [Wed, 23 Jun 2021 04:46:41 +0000 (10:16 +0530)]
net/cnxk: support Rx interrupt
Application may choose to enable/disable interrupts on Rx queues
so that application can select its processing if no packets are
available on queues for a longer period.
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Add device start and stop operation callbacks for
CN9K and CN10K. Device stop is common for both platforms
while device start as some platform dependent portion where
the platform specific offload flags are recomputed and
the right Rx/Tx burst function is chosen.
aDD tx queue setup and release for CN9K and CN10K.
Release is common while setup is platform dependent due
to differences in fast path Tx queue structures.
Add Rx queue setup and release op for CN9K and CN10K
SoC. Release is completely common while setup is platform
dependent due to fast path Rx queue structure variation.
Fastpath is platform dependent partly due to core cacheline
size difference.
Add platform specific probe and remove callbacks for CN9K
and CN10K which use common probe and remove functions.
Register ethdev driver for CN9K and CN10K.
Harman Kalra [Wed, 23 Jun 2021 04:46:05 +0000 (10:16 +0530)]
common/cnxk: allocate LMT region in userspace
As per the new LMTST design, userspace shall allocate LMT region,
setup the DMA translation and share the IOVA with kernel via MBOX.
Kernel will convert this IOVA to physical memory and update the
LMT table entry with the same.
With this new design also shared mode (i.e. all pci funcs sharing
the LMT region allocated by primary/base pci func) is intact.
Signed-off-by: Harman Kalra <hkalra@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
The instruction generation was not correct due to
fact that volatile suppose to use with ccode variable
as well.
Change the logic to use gcc atomic builtin to
simplify and avoid explicit volatile from the code.
Fixes: 81af26789316 ("common/cnxk: support NPA batch alloc/free") Cc: stable@dpdk.org Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Satha Rao [Wed, 23 Jun 2021 04:46:01 +0000 (10:16 +0530)]
common/cnxk: support locking NIX RQ contexts
This patch will consider device argument to lock RSS table
in NIX.
This patch also adds few misc fixes such as disabling NIX Tx
vlan insertion conf in SMQ, enabling SSO in NIX Tx SQ
for Tx completions and TM related stats API.
David Marchand [Thu, 24 Jun 2021 11:53:19 +0000 (13:53 +0200)]
test: remove hack for private header inclusion
This hack was needed with the make build system.
With meson, any private header from a library is visible as long as a
dependency to this library is expressed.
Signed-off-by: David Marchand <david.marchand@redhat.com> Acked-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:49 +0000 (17:04 +0200)]
raw/cnxk_bphy: support BPHY self test
Add support for performing selftest.
Signed-off-by: Jakub Palider <jpalider@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:48 +0000 (17:04 +0200)]
raw/cnxk_bphy: support registering BPHY IRQ handlers
Custom IRQ handlers may be registered/removed on demand.
Since registration and removal are related they are in the
same patch.
Signed-off-by: Jakub Palider <jpalider@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:47 +0000 (17:04 +0200)]
raw/cnxk_bphy: support retrieving BPHY device memory
Allow user to retrieve baseband phy memory resources.
Signed-off-by: Jakub Palider <jpalider@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:46 +0000 (17:04 +0200)]
raw/cnxk_bphy: support reading number of BPHY IRQs
Add support for retrieving maximum number of interrupts.
Signed-off-by: Jakub Palider <jpalider@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:45 +0000 (17:04 +0200)]
raw/cnxk_bphy: support interrupt init and cleanup
Add support for interrupt initialization and cleanup. Internally
interrupt initialization performs low level setup that allows
custom interrupt handler registration later on.
Interrupt initialization and cleanup are related hence they
are in the same patch.
Signed-off-by: Jakub Palider <jpalider@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:44 +0000 (17:04 +0200)]
raw/cnxk_bphy: support BPHY dequeue operation
Add support for dequeueing responses to previously
enqueued messages.
Signed-off-by: Jakub Palider <jpalider@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:43 +0000 (17:04 +0200)]
raw/cnxk_bphy: support BPHY enqueue operation
Add preliminary support for enqueue operation.
Signed-off-by: Jakub Palider <jpalider@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:42 +0000 (17:04 +0200)]
raw/cnxk_bphy: support reading BPHY queue count
Add support for reading number of available queues from baseband
phy. Currently only single queue is supported.
Signed-off-by: Jakub Palider <jpalider@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:41 +0000 (17:04 +0200)]
raw/cnxk_bphy: support reading BPHY queue configuration
Add support for reading baseband phy queue configuration.
Signed-off-by: Jakub Palider <jpalider@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Mon, 21 Jun 2021 15:04:40 +0000 (17:04 +0200)]
raw/cnxk_bphy: add baseband PHY skeleton driver
Add baseband phy skeleton driver. Baseband phy is a hardware subsystem
accelerating 5G/LTE related tasks. Note this driver isn't involved into
any sort baseband protocol processing. Instead it just provides means
for configuring hardware.
Signed-off-by: Jakub Palider <jpalider@marvell.com> Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
git.droids-corp.org / dpdk.git / log