Introduce head/tail sync mode for MT ring synchronization.
In that mode enqueue/dequeue operation is fully serialized:
only one thread at a time is allowed to perform given op.
Suppose to reduce stall times in case when ring is used on
overcommitted cpus (multiple active threads on the same cpu).
Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Acked-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Introduce relaxed tail sync (RTS) mode for MT ring synchronization.
Aim to reduce stall times in case when ring is used on
overcommited cpus (multiple active threads on the same cpu).
The main difference from original MP/MC algorithm is that
tail value is increased not by every thread that finished enqueue/dequeue,
but only by the last one.
That allows threads to avoid spinning on ring tail value,
leaving actual tail value change to the last thread in the update queue.
Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Acked-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
To make these preparations two main things are done:
- Change from *single* to *sync_type* to allow different
synchronisation schemes to be applied.
Mark *single* as deprecated in comments.
Add new functions to allow user to query ring sync types.
Replace direct access to *single* with appropriate function call.
- Move actual rte_ring and related structures definitions into a
separate file: <rte_ring_core.h>. It allows to refer contents
of <rte_ring_elem.h> from <rte_ring.h> without introducing a
circular dependency.
Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Acked-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Introduce stress test for ring enqueue/dequeue operations.
Performs the following pattern on each slave worker:
dequeue/read-write data from the dequeued objects/enqueue.
Serves as both functional and performance test of ring
enqueue/dequeue operations under high contention
(for both over committed and non-over committed scenarios).
Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Acked-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
David Marchand [Fri, 17 Apr 2020 14:56:11 +0000 (16:56 +0200)]
eal/ppc: fix build
Compilation is broken on ppc:
CC otx2_rx.o
In file included from .../drivers/net/octeontx2/otx2_rx.c:5:0:
.../builds/ppc_64-power8-linux-gcc/include/rte_vect.h:29:17:
error: expected declaration specifiers or ‘...’ before numeric constant
} __rte_aligned(16) rte_xmm_t;
^~
compilation terminated due to -Wfatal-errors.
Fixes: f35e5b3e07b2 ("replace alignment attributes") Signed-off-by: David Marchand <david.marchand@redhat.com> Tested-by: Thomas Monjalon <thomas@monjalon.net>
Thomas Monjalon [Wed, 11 Mar 2020 23:01:35 +0000 (00:01 +0100)]
doc: remove empty columns from NIC features matrix
The virtual PMDs bonding, KNI, null, ring, softnic and vdev_netvsc
have no real feature to advertise so they can be removed
from the (too) big matrix of ethdev features.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Thomas Monjalon [Wed, 11 Mar 2020 23:01:34 +0000 (00:01 +0100)]
doc: fix matrix CSS for recent sphinx
It seems sphinx >= 2.0 is inserting a <p> tag in each table cell.
The feature table (matrix) style needs to be updated to avoid
cells being too big.
The margin, padding and line height are overridden.
The font size in percentage is replaced with an equivalent pixel size.
The border is explicit because it disappeared for th.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Thomas Monjalon [Mon, 10 Feb 2020 16:00:32 +0000 (17:00 +0100)]
devtools: check use of compiler attributes
The keyword __attribute__ will emit a warning,
because it is preferred to use or define a common __rte macro.
The centralized macros may help to control or workaround some compilers.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Currently, in the case to use bitmap as resource allocator, after
bitmap creation, all the bitmap bits should be set to indicate the
bit available. Every time when allocate one bit, search for the set
bits and clear it to make it in use.
Add a new rte_bitmap_init_with_all_set() function to have a quick
fill up the bitmap bits.
Comparing with the case create the bitmap as empty and set the bitmap
one by one, the new function costs less cycles.
Thomas Monjalon [Thu, 9 Apr 2020 16:41:49 +0000 (18:41 +0200)]
test: remove meson dependency on /proc file
Meson is detecting the path /proc/sys/vm/nr_hugepages in the call to cat
in app/test/meson.build and then adding it as a build dependency.
This causes build loop if the timestamp of this file keeps changing.
It is fixed by hiding hugepage check in a shell script.
Fixes: 77784ef0fba8 ("test: allow no-huge mode for fast-tests") Signed-off-by: Thomas Monjalon <thomas@monjalon.net> Tested-by: Lukasz Wojciechowski <l.wojciechow@partner.samsung.com> Reviewed-by: Lukasz Wojciechowski <l.wojciechow@partner.samsung.com> Acked-by: Aaron Conole <aconole@redhat.com> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Pavan Nikhilesh [Tue, 31 Mar 2020 12:53:15 +0000 (18:23 +0530)]
examples/l2fwd-event: add option to configure port pairs
Current l2fwd-event application statically configures adjacent ports as
destination ports for forwarding the traffic.
Add a config option to pass the forwarding port pair mapping which allows
the user to configure forwarding port mapping.
If no config argument is specified, destination port map is not
changed and traffic gets forwarded with existing mapping.
To align port/queue configuration of each lcore with destination port
map, port/queue configuration of each lcore gets modified when config
option is specified.
With above config option, traffic received from portid = 0 gets forwarded
to port = 3 and vice versa, similarly traffic gets forwarded on other port
pairs (1,4) and (2,5).
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Reviewed-by: Andrzej Ostruszka <aostruszka@marvell.com>
DSW keeps an internal port load estimate, used by the load balancing
mechanism. As a side effect, it keeps track of the total number of
busy cycles since startup. This metric is indirectly exposed in the
form of DSW xstats' "port_<n>_event_proc_latency", which is the total
number of busy cycles divided by the total number of events processed
on a particular port.
An external application can take (event_latency * dequeued) to go back
to busy_cycles. One reason for doing this is to measure the port's
load during a longer time period, without resorting to sampling
"port_<n>_load". However, as the number dequeued events grows, a
rounding error in event_latency renders the application-calculated
busy_cycles inaccurate.
Thus, it makes sense to directly expose the number of busy cycles as a
DSW xstats, even though it might seem redundant.
DSW limits the rate of migrations on a per-port basis. Hence, as the
number of cores grows, so does the total migration capacity.
In high core-count systems, this allows for a situation where flows
are migrated to a lightly loaded port which recently already received
a number of new flows (from other ports). The processing load
generated by these new flows may not yet be reflected in the lightly
loaded port's load estimate. The result is that the previously lightly
loaded port is now overloaded.
This patch adds a rough estimate of the size of the inbound migrations
to a particular port, which can be factored into the migration logic,
avoiding the above problem.
Allowing moving multiple flows in one migration transaction, to
rebalance load more quickly.
Introduce a threshold to avoid migrating flows between ports with very
similar load.
Simplify logic for selecting which flow to migrate. The aim is now to
move flows in such a way that the receiving port is as lightly-loaded
as possible (after receiving the flow), while still migrating enough
flows from the source port to reduce its load. This is essentially how
legacy strategy work as well, but the code is more readable.
To allow visualization of migrations, track the number flow
immigrations in "port_<N>_immigrations". The "port_<N>_migrations"
retains legacy semantics, but is renamed "port_<N>_emigrations".
Expose the number of events currently undergoing processing
(i.e. pending releases) at a particular port.
Pavan Nikhilesh [Fri, 14 Feb 2020 06:45:24 +0000 (12:15 +0530)]
event/octeontx2: remove WFE from dual-slot dequeue
Each workslot is always bound to a specific lcore there is no multi-core
contention to cause cache trashing as a result it is safe to remove the
WFE. Also, in dual workslot dequeue work will mostlikely be available on
the pair workslot making WFE impractical.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Remove setting ALLOW_EXPERIMENTAL_API individually for each Makefile and
meson.build. Instead, enable ALLOW_EXPERIMENTAL_API flag across app, lib
and drivers.
This changes reduces the clutter across the project while still
maintaining the functionality of ALLOW_EXPERIMENTAL_API i.e. warning
external applications about experimental API usage.
In nitrox_sym_pmd_create() the name array will overflow if the pci
device name is greater than 57 bytes. To fix this issue subtract pci
device name length from array length while appending substring to the
name.
If the NPS_PKT ring/port is greater than 8191 the NPS_PKT*() macros will
evaluate to incorrect values due to unintended sign extension from int
to unsigned long. To fix this, add UL suffix to the constants in these
macros. The same problem is with AQMQ_QSZX() macro also.
Adam Dybkowski [Thu, 26 Mar 2020 16:22:08 +0000 (17:22 +0100)]
crypto/qat: handle mixed hash-cipher on GEN2
This patch adds handling of mixed hash-cipher algorithms
available on GEN2 QAT in particular firmware versions.
Also the documentation is updated to show the mixed crypto
algorithms are supported on QAT GEN2.
Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com> Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Nicolas Chautru [Thu, 26 Mar 2020 03:27:48 +0000 (20:27 -0700)]
app/bbdev: update test vectors
Modification to vectors parameters used for unit test
for coverage and performance test of bbdev drivers
across all devices.
Updating and reducing list for focused coverage on relevant
code blocks for 4G and 5G. Less focus on 4G TB mode as there is
some question how to best support this with mbuf limitations and
if effect are not used.
Removing scenarios with negative LLR assumptions which are not
used with any PMDs and historical only.
Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com> Acked-by: Dave Burley <dave.burley@accelercomm.com> Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Nicolas Chautru [Thu, 26 Mar 2020 03:27:45 +0000 (20:27 -0700)]
app/bbdev: add performance tests
Includes support for BLER (Block Error Rate) wireless
performance test with new arguments for SNR and number
of iterations for 5G. This generates LLRs for a given
SNR level then measures the ratio of code blocks being
successfully decoded or not.
Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com> Acked-by: Dave Burley <dave.burley@accelercomm.com> Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Nicolas Chautru [Thu, 26 Mar 2020 03:27:44 +0000 (20:27 -0700)]
app/bbdev: support HARQ validation
Adding functionality to validate HARQ for different
devices implementation.
Adding capacity to fetch HARQ data when required as
part of this validation.
Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com> Acked-by: Dave Burley <dave.burley@accelercomm.com> Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Nicolas Chautru [Thu, 26 Mar 2020 03:27:42 +0000 (20:27 -0700)]
baseband/turbo_sw: support large size code block
This is to support cases when the input data for
decoding a code block is larger than 64kB and would
not fit as a contiguous block of data into one
mbuf. In that case the length from the operation
supersedes the mbuf default structure.
Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com> Acked-by: Dave Burley <dave.burley@accelercomm.com> Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
The actual LLR representation was incorrectly assumed to be 2
instead of 4. This would impact wireless performance but is not
critical to be back ported on LTS branches.
Fixes: c769c711757a ("baseband/turbo_sw: extend for 5G") Cc: stable@dpdk.org Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com> Acked-by: Dave Burley <dave.burley@accelercomm.com> Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Data corruption happens due to incorrect destroy of session. Security
session needs process different from crypto session.
Destroy corresponding sessions according to different security actions.
Fixes: 05fe65eb66b2 ("test/ipsec: introduce functional test") Cc: stable@dpdk.org Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com> Reviewed-by: Phil Yang <phil.yang@arm.com> Reviewed-by: Gavin Hu <gavin.hu@arm.com> Tested-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Improve case where application set m_dst to same as m_src
so really an in-place operation, though would have been treated
as out-of-place. No functional change but this path can now benefit
from DMA alignment.
Adam Dybkowski [Thu, 20 Feb 2020 15:04:15 +0000 (16:04 +0100)]
cryptodev: fix missing device id range checking
This patch adds range-checking of the device id passed from
the user app code. It prevents out-of-range array accesses
which in some situations resulted in an
application crash (segfault).
Fixes: 3dd4435cf473 ("cryptodev: fix checks related to device id") Cc: stable@dpdk.org Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com> Acked-by: Fiona Trahe <fiona.trahe@intel.com> Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Lukasz Bartosik [Thu, 27 Feb 2020 16:18:35 +0000 (17:18 +0100)]
examples/ipsec-secgw: make number of buffers dynamic
Make number of buffers in a pool nb_mbuf_in_pool dependent on number
of ports, cores and crypto queues. Add command line option -s which
when used overrides dynamic calculation of number of buffers in a pool.
Signed-off-by: Anoob Joseph <anoobj@marvell.com> Signed-off-by: Lukasz Bartosik <lbartosik@marvell.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Lukasz Bartosik [Thu, 27 Feb 2020 16:18:33 +0000 (17:18 +0100)]
examples/ipsec-secgw: add driver mode worker
Add driver inbound and outbound worker thread for ipsec-secgw. In driver
mode application does as little as possible. It simply forwards packets
back to port from which traffic was received instructing HW to apply
inline security processing using first outbound SA configured for
a given port. If a port does not have SA configured outbound traffic
on that port will be silently dropped. The aim of this mode is to
measure HW capabilities. Driver mode is selected with single-sa option.
The single-sa option accepts SA index however in event mode the SA
index is ignored.
Example command to run ipsec-secgw in driver mode:
ipsec-secgw -w 0002:02:00.0,ipsec_in_max_spi=128
-w 0002:03:00.0,ipsec_in_max_spi=128 -w 0002:0e:00.0 -w 0002:10:00.1
--log-level=8 -c 0x1 -- -P -p 0x3 -u 0x1 -f aes-gcm.cfg
--transfer-mode event --event-schedule-type parallel --single-sa 0
Signed-off-by: Anoob Joseph <anoobj@marvell.com> Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com> Signed-off-by: Lukasz Bartosik <lbartosik@marvell.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Lukasz Bartosik [Thu, 27 Feb 2020 16:18:30 +0000 (17:18 +0100)]
examples/ipsec-secgw: support internal ports for events
Add support for Rx and Tx internal ports. When internal ports are
available then a packet can be received from eth port and forwarded
to event queue by HW without any software intervention. The same
applies to Tx side where a packet sent to an event queue can by
forwarded by HW to eth port without any software intervention.
Signed-off-by: Anoob Joseph <anoobj@marvell.com> Signed-off-by: Lukasz Bartosik <lbartosik@marvell.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Lukasz Bartosik [Thu, 27 Feb 2020 16:18:29 +0000 (17:18 +0100)]
examples/ipsec-secgw: add event worker launch
In eventmode workers can be drafted differently according to the
capabilities of the underlying event device. The added functions will
receive an array of such workers and probe the eventmode properties to
choose the worker.
Signed-off-by: Anoob Joseph <anoobj@marvell.com> Signed-off-by: Lukasz Bartosik <lbartosik@marvell.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Anoob Joseph [Thu, 27 Feb 2020 16:18:27 +0000 (17:18 +0100)]
examples/ipsec-secgw: support event Tx adapter
Add Tx adapter support. The event helper init routine will initialize
the Tx adapter according to the configuration. If Tx adapter config
is not present it will generate a default config.
Signed-off-by: Anoob Joseph <anoobj@marvell.com> Signed-off-by: Lukasz Bartosik <lbartosik@marvell.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Anoob Joseph [Thu, 27 Feb 2020 16:18:26 +0000 (17:18 +0100)]
examples/ipsec-secgw: support event Rx adapter
Add Rx adapter support. The event helper init routine will initialize
the Rx adapter according to the configuration. If Rx adapter config
is not present it will generate a default config. If there are enough
event queues available it will map eth ports and event queues 1:1
(one eth port will be connected to one event queue). Otherwise it
will map all eth ports to one event queue.
Signed-off-by: Anoob Joseph <anoobj@marvell.com> Signed-off-by: Lukasz Bartosik <lbartosik@marvell.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Anoob Joseph [Thu, 27 Feb 2020 16:18:25 +0000 (17:18 +0100)]
examples/ipsec-secgw: add event port-lcore link
Add event device port-lcore link and specify which event queues should
be connected to the event port. Generate a default config for event
port-lcore links if it is not specified in the configuration. This
routine will check the number of available ports and then create links
according to the number of cores available. This patch also adds a new
entry in the eventmode conf to denote that all queues are to be linked
with every port. This enables one core to receive packets from all
ethernet ports.
Signed-off-by: Anoob Joseph <anoobj@marvell.com> Signed-off-by: Lukasz Bartosik <lbartosik@marvell.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Anoob Joseph [Thu, 27 Feb 2020 16:18:24 +0000 (17:18 +0100)]
examples/ipsec-secgw: add framework for event helper
Add framework for eventmode helper. Event mode involves
initialization of multiple devices like eventdev, ethdev
and etc. Add routines to initialize and uninitialize event
device. Generate a default config for event device if it
is not specified in the configuration. Currently event
helper supports single event device only.
Signed-off-by: Anoob Joseph <anoobj@marvell.com> Signed-off-by: Lukasz Bartosik <lbartosik@marvell.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Ankur Dwivedi [Thu, 27 Feb 2020 16:18:23 +0000 (17:18 +0100)]
examples/ipsec-secgw: add default flow for inline Rx
The default flow created would enable security processing on all ESP
packets. If the default flow is created, SA based rte_flow creation
would be skipped.
Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com> Signed-off-by: Anoob Joseph <anoobj@marvell.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Change format for uint64_t to %"PRIu64" to make compiler happy.
Fixes: 103809d032cd ("app/test-fib: add test application for FIB") Cc: stable@dpdk.org Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
app/test-fib: fix possible use of uninitialized data
Compiler can throw warning message for routes and lookup files.
Fixes: 103809d032cd ("app/test-fib: add test application for FIB") Cc: stable@dpdk.org Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Asim Jamshed [Mon, 16 Mar 2020 18:42:36 +0000 (18:42 +0000)]
fib: fix headers for C++ support
This patch allows C++ programs to use librte_fib library routines.
Previously C++ programs were not able to link this library and programs
would fail to get linked. With this patch compilation and linking
will be successful.
Fixes: 39e927248416 ("fib: add FIB library") Fixes: 40d41a8a7b34 ("fib: support IPv6") Cc: stable@dpdk.org Signed-off-by: Asim Jamshed <asim.jamshed@gmail.com> Signed-off-by: Saikrishna Edupuganti <saikrishna.edupuganti@intel.com> Reviewed-by: David Marchand <david.marchand@redhat.com> Acked-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
None of the public functions modify IPv6 address passed. So their
parameters are made const - with the exception of bulk functions.
This exception is due to compatibility problems - some compilers report
problems with const-casting of array of arrays.
Previously only lookup and add were updated to have addresses passed as
const so I'm adding this fixline.
Fixes: d82927d2f81d ("lpm6: make IPv6 address immutable") Cc: stable@dpdk.org Signed-off-by: Andrzej Ostruszka <aostruszka@marvell.com> Acked-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
git.droids-corp.org / dpdk.git / log