dpdk.git
8 years agoexamples/l2fwd-crypto: enable ZUC EEA3 and EIA3
Pablo de Lara [Thu, 29 Sep 2016 02:59:50 +0000 (03:59 +0100)]
examples/l2fwd-crypto: enable ZUC EEA3 and EIA3

This patch enables ZUC EEA3 cipher algorithm and
ZUC EIA3 authentication algorithm support to
l2fwd-crypto sample application.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
8 years agoapp/test: add ZUC
Pablo de Lara [Thu, 29 Sep 2016 02:59:49 +0000 (03:59 +0100)]
app/test: add ZUC

Add cipher and authentication ZUC algorithm tests.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
8 years agoapp/test: rename some SNOW 3G functions
Pablo de Lara [Thu, 29 Sep 2016 02:59:48 +0000 (03:59 +0100)]
app/test: rename some SNOW 3G functions

Before adding the new ZUC tests, since they will use
the existing common functions for SNOW3G and KASUMI,
these functions are renamed to *_wireless_algo_*,
instead of *_snow3g_kasumi_*, as they are common
functions for all the three wireless algorithms.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
8 years agocrypto/zuc: add driver for ZUC library
Pablo de Lara [Thu, 29 Sep 2016 02:59:47 +0000 (03:59 +0100)]
crypto/zuc: add driver for ZUC library

Added new SW PMD which makes use of the libsso SW library,
which provides wireless algorithms ZUC EEA3 and EIA3
in software.

This PMD supports cipher-only, hash-only and chained operations
("cipher then hash" and "hash then cipher") of the following
algorithms:
- RTE_CRYPTO_SYM_CIPHER_ZUC_EEA3
- RTE_CRYPTO_SYM_AUTH_ZUC_EIA3

The ZUC hash and cipher algorithms, which are enabled
by this crypto PMD are implemented by Intel's libsso software
library.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
8 years agoapp/test: improve error message for disabled crypto
Fiona Trahe [Mon, 26 Sep 2016 12:57:20 +0000 (13:57 +0100)]
app/test: improve error message for disabled crypto

Improve error message if crypto PMD build is not enabled in config file

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
8 years agoapp/test: add AES GCM performance test
Arek Kusztal [Wed, 28 Sep 2016 11:54:03 +0000 (12:54 +0100)]
app/test: add AES GCM performance test

This patch adds AES Galois Counter Mode performance test case
for cryptodev QAT and AESNI GCM. Test is performed with different
buffer sizes, burst size of 32 and 128b key. Test vectors
are placed in app/test/test_cryptodev_perf_vectors.h file.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
8 years agocrypto: fix build with icc
Pablo de Lara [Wed, 28 Sep 2016 00:31:27 +0000 (01:31 +0100)]
crypto: fix build with icc

This commit fixes a compilation error on icc,
due to unallowed conversion from int to enum:

drivers/crypto/snow3g/rte_snow3g_pmd.c(155):
    error #188: enumerated type mixed with another type
        sess->op = mode;
                 ^
drivers/crypto/kasumi/rte_kasumi_pmd.c(155):
    error #188: enumerated type mixed with another type
        sess->op = mode;
                 ^

Fixes: 3aafc423cf4d ("snow3g: add driver for SNOW 3G library")
Fixes: 2773c86d061a ("crypto/kasumi: add driver for KASUMI library")

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
8 years agoapp/test: remove unnecessary conditional for crypto
Pablo de Lara [Mon, 26 Sep 2016 22:13:20 +0000 (23:13 +0100)]
app/test: remove unnecessary conditional for crypto

Regardless the result of the conditional, the true and false
statements were the same, so the conditional can be removed.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
8 years agoexamples/ipsec-secgw: add sample configuration files
Fan Zhang [Wed, 21 Sep 2016 12:05:19 +0000 (13:05 +0100)]
examples/ipsec-secgw: add sample configuration files

This patch adds two sample configuration files to ipsec-secgw sample
application. The sample configuration files show how to setup
back-to-back systems that would forward traffic through an IPsec
tunnel.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
8 years agoexamples/ipsec-secgw: support configuration file
Fan Zhang [Wed, 21 Sep 2016 12:05:18 +0000 (13:05 +0100)]
examples/ipsec-secgw: support configuration file

This patch adds the configuration file support to ipsec_secgw
sample application. Instead of hard-coded rules, the users can
specify their own SP, SA, and routing rules in the configuration
file. A command line option "-f" is added to pass the
configuration file location to the application.

Configuration item formats:

SP rule format:
sp <ip_ver> <dir> esp <action> <priority> <src_ip> <dst_ip> \
<proto> <sport> <dport>

SA rule format:
sa <dir> <spi> <cipher_algo> <cipher_key> <auth_algo> <auth_key> \
<mode> <src_ip> <dst_ip>

Routing rule format:
rt <ip_ver> <src_ip> <dst_ip> <port>

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
8 years agoapp/test: fix verification of digest for GCM
Arek Kusztal [Thu, 22 Sep 2016 10:45:55 +0000 (11:45 +0100)]
app/test: fix verification of digest for GCM

This patch fixes verification of digest in test_cryptodev.c file
for AES GCM test cases.

Fixes: eec136f3c54f ("aesni_gcm: add driver for AES-GCM crypto operations")

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
8 years agocrypto/aesni_gcm: move pre-counter block to driver
Arek Kusztal [Thu, 22 Sep 2016 10:45:53 +0000 (11:45 +0100)]
crypto/aesni_gcm: move pre-counter block to driver

This patch moves computing of pre-counter block into the AESNI-GCM
driver so it can be moved from test files.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
8 years agocrypto/qat: add 3DES cipher algorithm
Fiona Trahe [Fri, 16 Sep 2016 14:19:56 +0000 (15:19 +0100)]
crypto/qat: add 3DES cipher algorithm

3DES support added to QuickAssist PMD with CTR and CBC mode.
Both cipher-only and chained with HMAC_SHAx.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
8 years agocrypto/qat: cleanup code
Fiona Trahe [Fri, 16 Sep 2016 14:19:55 +0000 (15:19 +0100)]
crypto/qat: cleanup code

Cleanup of unused code.
Rename and simplify a badly named struct element, was aes, but
used for all types of ciphers.
Print correct error msg (Unsupported rather than Undefined)
for all ciphers not supported by QAT PMD.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
8 years agotools: bind crypto devices
Eoin Breen [Tue, 20 Sep 2016 00:05:01 +0000 (01:05 +0100)]
tools: bind crypto devices

Adding the support to bind/unbind crypto devices with
dpdk-devbind.py script, as now it is not restricted
to network devices anymore.

Signed-off-by: Eoin Breen <eoin.breen@intel.com>
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
8 years agocrypto: rename all KASUMI references
Pablo de Lara [Wed, 21 Sep 2016 01:45:19 +0000 (02:45 +0100)]
crypto: rename all KASUMI references

KASUMI algorithm has all uppercase letters,
but some references of it had some lowercase letters.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
8 years agocrypto: rename some SNOW 3G references
Pablo de Lara [Wed, 21 Sep 2016 01:45:18 +0000 (02:45 +0100)]
crypto: rename some SNOW 3G references

SNOW 3G algorithm has all uppercase letters in its name
and a space between SNOW and 3G, but some references of it
had some lowercase letters or no space.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
8 years agocrypto/qat: fix FreeBSD build
Deepak Kumar Jain [Wed, 21 Sep 2016 11:22:46 +0000 (12:22 +0100)]
crypto/qat: fix FreeBSD build

Using sys/types.h instead of linux/types.h
so as to compile QAT_PMD on FreeBSD.

Fixes: 1703e94ac5ce ("qat: add driver for QuickAssist devices")

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
8 years agocryptodev: update GMAC API comments
Arek Kusztal [Tue, 20 Sep 2016 12:35:46 +0000 (13:35 +0100)]
cryptodev: update GMAC API comments

In file rte_crypto_sym.h, GMAC API comments need to be changed
to comply with the GMAC specification. Main areas of change are
aad pointer and aad len, which now will be used to
provide plaintext.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
8 years agoapp/test: add GMAC for qat
Arek Kusztal [Tue, 20 Sep 2016 12:35:45 +0000 (13:35 +0100)]
app/test: add GMAC for qat

Added Galois Message Authentication Code (GMAC) tests to cryptodev tests.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
8 years agocrypto/qat: add GMAC capability
Arek Kusztal [Tue, 20 Sep 2016 12:35:44 +0000 (13:35 +0100)]
crypto/qat: add GMAC capability

Added Galois Message Authentication Code (GMAC) capability to
QuickAssist Technology symmetric cryptographic driver.
GMAC is authentication only variant of Galois Counter Mode (GCM)
where all plaintext is provided with AAD pointer only.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
8 years agocrypto/qat: add C3xxx device
Deepak Kumar Jain [Mon, 19 Sep 2016 16:37:01 +0000 (17:37 +0100)]
crypto/qat: add C3xxx device

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
8 years agocrypto/qat: add C62x device
Deepak Kumar Jain [Tue, 13 Sep 2016 10:41:55 +0000 (11:41 +0100)]
crypto/qat: add C62x device

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
8 years agoapp/test: add KASUMI for qat
Deepak Kumar Jain [Mon, 19 Sep 2016 11:00:56 +0000 (12:00 +0100)]
app/test: add KASUMI for qat

This patch adds KASUMI tests in the QAT testsuite.
Alg-Chaining tests have also been added in the KASUMI
SW PMD.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
8 years agocrypto/qat: add KASUMI
Deepak Kumar Jain [Mon, 19 Sep 2016 11:00:55 +0000 (12:00 +0100)]
crypto/qat: add KASUMI

This patch add kasumi support in Intel(R)
QuickAssist driver.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
8 years agoapp/test: rename some SNOW 3G functions
Deepak Kumar Jain [Mon, 19 Sep 2016 11:00:54 +0000 (12:00 +0100)]
app/test: rename some SNOW 3G functions

Renamed authenticated encryption and encrypted authentication
tests with easily recognized names.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
8 years agoapp/test: cleanup crypto code
Deepak Kumar Jain [Mon, 19 Sep 2016 11:00:53 +0000 (12:00 +0100)]
app/test: cleanup crypto code

Cleanup the code for code design consistency.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
8 years agodoc: fix names of supported crypto algorithms
Deepak Kumar Jain [Mon, 19 Sep 2016 11:14:52 +0000 (12:14 +0100)]
doc: fix names of supported crypto algorithms

Update documentation with correct names of supported algorithms.

Fixes: 1703e94ac5cee ("qat: add driver for QuickAssist devices")
Fixes: 3aafc423cf4d ("snow3g: add driver for SNOW 3G library")
Fixes: 924e84f87306 ("aesni_mb: add driver for multi buffer based crypto")
Fixes: 2773c86d061a ("crypto/kasumi: add driver for KASUMI library")

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
8 years agodoc: add instructions to enable qat
Eoin Breen [Tue, 13 Sep 2016 14:08:58 +0000 (15:08 +0100)]
doc: add instructions to enable qat

Signed-off-by: Eoin Breen <eoin.breen@intel.com>
Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
8 years agocrypto/null: fix key size increment value
Deepak Kumar Jain [Fri, 16 Sep 2016 10:49:34 +0000 (11:49 +0100)]
crypto/null: fix key size increment value

This patch fixes the values of increment in key size.

Fixes: 94b0ad8e0aa5 ("null_crypto: add driver for null crypto operations")

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
8 years agoapp/test: add NULL operation for qat
Deepak Kumar Jain [Fri, 16 Sep 2016 08:57:17 +0000 (09:57 +0100)]
app/test: add NULL operation for qat

Added NULL algorithm to test file for Intel(R) QuickAssist
Technology Driver.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
8 years agocrypto/qat: add NULL capability
Deepak Kumar Jain [Fri, 16 Sep 2016 08:57:16 +0000 (09:57 +0100)]
crypto/qat: add NULL capability

Enabled NULL crypto for Intel(R) QuickAssist Technology.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
8 years agoapp/test: add aes-sha384-hmac for qat
Deepak Kumar Jain [Mon, 12 Sep 2016 19:51:27 +0000 (20:51 +0100)]
app/test: add aes-sha384-hmac for qat

Added aes-sha384-hmac algorithm to test file for Intel(R) QuickAssist
Technology Driver.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
8 years agocrypto/qat: add aes-sha384-hmac capability
Deepak Kumar Jain [Mon, 12 Sep 2016 19:51:26 +0000 (20:51 +0100)]
crypto/qat: add aes-sha384-hmac capability

Enable support of aes-sha384-hmac in Intel(R) QuickAssist driver.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
8 years agoapp/test: add aes-sha224-hmac for qat
Deepak Kumar Jain [Thu, 15 Sep 2016 16:26:33 +0000 (17:26 +0100)]
app/test: add aes-sha224-hmac for qat

Added aes-sha224-hmac algorithm to test file for Intel(R) QuickAssist
Technology Driver.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
8 years agocrypto/qat: add aes-sha224-hmac capability
Deepak Kumar Jain [Thu, 15 Sep 2016 16:26:32 +0000 (17:26 +0100)]
crypto/qat: add aes-sha224-hmac capability

Added support of aes-sha224-hmac in Intel(R) QuickAssist driver.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
8 years agoapp/test: add MD5 HMAC for qat
Arek Kusztal [Fri, 9 Sep 2016 15:44:33 +0000 (16:44 +0100)]
app/test: add MD5 HMAC for qat

Added MD5 HMAC hash algorithm to test file for Intel QuickAssist
Technology driver.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
8 years agocrypto/qat: add MD5 HMAC capability
Arek Kusztal [Fri, 9 Sep 2016 15:44:32 +0000 (16:44 +0100)]
crypto/qat: add MD5 HMAC capability

Added posibility to compute MD5 HMAC digest with Intel QuickAssist
Technology driver.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
8 years agocrypto/qat: optimize request copy
Fiona Trahe [Thu, 4 Aug 2016 12:00:15 +0000 (13:00 +0100)]
crypto/qat: optimize request copy

using rte_mov128 instead of structure assignment to copy
template request from session context into request

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: John Griffin <john.griffin@intel.com>
8 years agocrypto/qat: make the session struct variable in size
John Griffin [Thu, 4 Aug 2016 15:46:23 +0000 (16:46 +0100)]
crypto/qat: make the session struct variable in size

This patch changes the qat firmware session data structure from a fixed
size to a variable size which is dependent on the size of the chosen
algorithm.
This reduces the amount of bytes which are transferred across
PCIe and thus helps to increase qat performance when the
accelerator is bound by PCIe.

Signed-off-by: John Griffin <john.griffin@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
8 years agovdev: rename init/uninit ops to probe/remove
Shreyansh Jain [Thu, 6 Oct 2016 13:54:03 +0000 (19:24 +0530)]
vdev: rename init/uninit ops to probe/remove

Inline with PCI probe and remove, VDEV probe and remove hooks provide
a uniform naming.
PCI probe represents scan and driver initialization. For VDEV, it will
represent argument parsing and initialization.

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
8 years agomem: fix build with -O1
Olivier Matz [Mon, 19 Sep 2016 12:26:51 +0000 (14:26 +0200)]
mem: fix build with -O1

When compiled with EXTRA_CFLAGS="-O1", the compiler is not
able to detect that size is always initialized when used, and
issues a wrong warning:

  eal_memory.c: In function ‘rte_eal_hugepage_attach’:
  eal_memory.c:1684:3: error: ‘size’ may be used uninitialized in this
                       function [-Werror=maybe-uninitialized]
     munmap(hp, size);
     ^

Workaround this issue by initializing size to 0.
Seen on gcc (Debian 5.4.1-1) 5.4.1 20160803.

Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
8 years agonet/bnxt: update struct definitions for 1.5.1 HWRM API
Ajit Khaparde [Mon, 26 Sep 2016 16:20:06 +0000 (11:20 -0500)]
net/bnxt: update struct definitions for 1.5.1 HWRM API

Update the PMD to use the 1.5.1 HWRM API.
Most of the changes in the patch are white spaces and rearrangement of the
lines - a onetime change owing to the usage of a different auto generated
file.

Structures updated:
hwrm_stat_ctx_alloc_input, hwrm_stat_ctx_alloc_output,
hwrm_stat_ctx_free_input, hwrm_stat_ctx_free_output,
hwrm_stat_ctx_clr_stats_input, hwrm_stat_ctx_clr_stats_output,
hwrm_exec_fwd_resp_input, hwrm_exec_fwd_resp_output

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
8 years agonet/bnxt: update HWRM filter related structures
Ajit Khaparde [Mon, 26 Sep 2016 16:19:59 +0000 (11:19 -0500)]
net/bnxt: update HWRM filter related structures

Update the PMD to use packet filtering related structures as per the
1.5.1 version of the HWRM API. Most of the changes in the patch are
white spaces and rearrangement of the lines - a onetime change owing to
the usage of a different auto generated file.

Structures being updated:
hwrm_cfa_l2_filter_cfg_input, hwrm_cfa_l2_filter_cfg_output,
hwrm_cfa_l2_set_rx_mask_input, hwrm_cfa_l2_set_rx_mask_output,
hwrm_cfa_l2_filter_alloc_input, hwrm_cfa_l2_filter_alloc_output,
hwrm_cfa_l2_filter_free_input, hwrm_cfa_l2_filter_free_output

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
8 years agonet/bnxt: update HWRM ring related structures
Ajit Khaparde [Mon, 26 Sep 2016 16:19:53 +0000 (11:19 -0500)]
net/bnxt: update HWRM ring related structures

Update the PMD to use HWRM ring related structures as per the 1.5.1
version of the HWRM API.  Most of the changes in the patch are white
spaces and rearrangement of the lines - a onetime change owing to the
usage of a different auto generated file.

Structures being updated:
hwrm_ring_alloc_input, hwrm_ring_alloc_output, hwrm_ring_free_input,
hwrm_ring_free_output, hwrm_ring_grp_alloc_input,
hwrm_ring_grp_alloc_output, hwrm_ring_grp_free_input,
hwrm_ring_grp_free_output

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
8 years agonet/bnxt: update VNIC related structures
Ajit Khaparde [Mon, 26 Sep 2016 16:19:45 +0000 (11:19 -0500)]
net/bnxt: update VNIC related structures

Update the PMD to use VNIC related structures as per the 1.5.1 HWRM API.
Most of the changes in the patch are white spaces and rearrangement of the
lines - a onetime change owing to the usage of a different
auto generated file.

Structures being updated:
hwrm_vnic_alloc_input, hwrm_vnic_alloc_output, hwrm_vnic_free_input,
hwrm_vnic_free_output, hwrm_vnic_cfg_input, hwrm_vnic_cfg_output,
hwrm_vnic_rss_cfg_input, hwrm_vnic_rss_cfg_output,
hwrm_vnic_rss_cos_lb_ctx_alloc_input,
hwrm_vnic_rss_cos_lb_ctx_alloc_output,
hwrm_vnic_rss_cos_lb_ctx_free_input,
hwrm_vnic_rss_cos_lb_ctx_free_output

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
8 years agonet/bnxt: update structures for 1.5.1 HWRM API
Ajit Khaparde [Mon, 26 Sep 2016 16:19:37 +0000 (11:19 -0500)]
net/bnxt: update structures for 1.5.1 HWRM API

Update the PMD to use the 1.5.1 HWRM API.
Most of the changes in the patch are white spaces and rearrangement of the
lines - a onetime change owing to the usage of a different
auto generated file.

Structures updated:
hwrm_func_qcfg_input, hwrm_func_qcfg_output, hwrm_func_drv_rgtr_input,
hwrm_func_drv_rgtr_output, hwrm_func_drv_unrgtr_input,
hwrm_func_drv_unrgtr_output, hwrm_queue_qportcfg_input,
hwrm_queue_qportcfg_output

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
8 years agonet/bnxt: update structures for 1.5.1 HWRM API
Ajit Khaparde [Mon, 26 Sep 2016 16:19:31 +0000 (11:19 -0500)]
net/bnxt: update structures for 1.5.1 HWRM API

Update the PMD to use the 1.5.1 HWRM API.
Most of the changes in the patch are white spaces and rearrangement of the
lines - a onetime change owing to the usage of a different
auto generated file.

Structures being updated in this patch:
input, output, hwrm_ver_get_input, hwrm_ver_get_output,
hwrm_func_reset_input, hwrm_func_reset_output, hwrm_func_qcaps_input,
hwrm_func_qcaps_output

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
8 years agonet/bnxt: update completion descriptors
Ajit Khaparde [Mon, 26 Sep 2016 16:19:17 +0000 (11:19 -0500)]
net/bnxt: update completion descriptors

Update the PMD to use structures as per the 1.5.1 HWRM API.
Most of the changes in the patch are white spaces and rearrangement of the
lines - hopefully a onetime change owing to the usage of a different
auto generated file.

Structures updated:
cmpl_base, tx_cmpl, rx_pkt_cmpl, rx_pkt_cmpl_hi, hwrm_fwd_req_cmpl,
hwrm_async_event_cmpl

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
8 years agonet/bnxt: update buffer descriptor definitions
Ajit Khaparde [Mon, 26 Sep 2016 16:19:07 +0000 (11:19 -0500)]
net/bnxt: update buffer descriptor definitions

Update the PMD to use the 1.5.1 HWRM API.
Most of the changes in the patch are white spaces and rearrangement of the
lines - hopefully a onetime change owing to the usage of a different
auto generated file.

Structures updated in this patch:
tx_bd_short, tx_bd_long, tx_bd_long_hi, rx_prod_pkt_bd

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
8 years agonet/bnxt: refactor for 1.5.1 HWRM API
Ajit Khaparde [Mon, 26 Sep 2016 17:05:07 +0000 (12:05 -0500)]
net/bnxt: refactor for 1.5.1 HWRM API

Update the PMD to use the 1.5.1 HWRM API.
Most of the changes in this patch and the following patches are
white spaces and rearrangement of the lines - hopefully a onetime change
owing to the usage of a different auto generated file.

Other than that, the following fields have been renamed:
1) rx_err_pkts and tx_err_pkts are now rx_discard_pkts and tx_discard_pkts
in struct ctx_hw_stats64
2) the perm_mac_addr field in the response of bnxt_hwrm_func_qcaps has
changed to mac_addr.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
8 years agonet/bnxt: support hotplug
Ajit Khaparde [Mon, 26 Sep 2016 16:18:52 +0000 (11:18 -0500)]
net/bnxt: support hotplug

This patch adds support for port hotplug framework.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
8 years agonet/bnxt: support VF
Ajit Khaparde [Mon, 26 Sep 2016 16:18:46 +0000 (11:18 -0500)]
net/bnxt: support VF

Add support to the bnxt PMD to load on a PCI VF.
1) VF cannot change parameters like - speed, autoneg and pause
2) If the VF MAC address shows up as all 0's it has to be provisioned
by the PF in the hypervisor.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: David Christensen <david.christensen@broadcom.com>
8 years agonet/bnxt: update guide
Ajit Khaparde [Mon, 26 Sep 2016 16:18:37 +0000 (11:18 -0500)]
net/bnxt: update guide

Update doc/guides/nics/bnxt.rst to indicate that the bnxt PMD driver
supports Broadcom NetXtreme-C/NetXtreme-E BCM5730X/BCM5740X family of
network controllers and Broadcom StrataGX BCM5871X family of
communications processors.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
8 years agonet/bnxt: add new device IDs
Ajit Khaparde [Mon, 26 Sep 2016 16:18:30 +0000 (11:18 -0500)]
net/bnxt: add new device IDs

More PCI Device IDs for Cumulus, Cumulus+ and Whitney, Whitney+ SKUs.

The NPAR model supported by firmware has been altered. It now allocates a
unique Device ID for each NPAR partition for each device.  In addition,
ASIC's that are capable of supporting dual media have a unique DID
depending whether they are configured in copper or fiber mode.
This patch adds the necessary DIDs.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: David Christensen <david.christensen@broadcom.com>
8 years agonet/bnxt: support NIC Partitioning
Ajit Khaparde [Mon, 26 Sep 2016 16:18:16 +0000 (11:18 -0500)]
net/bnxt: support NIC Partitioning

Adding code to enable support for NIC Partitioning or NPAR 1.0
As a part of NPAR, we don't allow port settings like speed or flow
control to be changed.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Stephen Hurd <stephen.hurd@broadcom.com>
Reviewed-by: David Christensen <david.christensen@broadcom.com>
8 years agonet/bnxt: support Broadcom StrataGX
Ajit Khaparde [Mon, 26 Sep 2016 16:16:54 +0000 (11:16 -0500)]
net/bnxt: support Broadcom StrataGX

This patch adds support for the Broadcom StrataGX® BCM5871X
series of Communications Processors.

These ARM based processors target a broad range of networking
applications including virtual CPE (vCPE) and NFV appliances,
10G service routers and gateways, control plane processing for
Ethernet switches, and network attached storage (NAS).

Other than adding the PCI Id for supporting the device,
the patch also adds a memory barrier before the Tx doorbell
and Completing ring doorbell is written to. Since ARM has a
weakly ordered memory model this enforces a strict ordering
of the descriptor writes before the doorbell writes happen.

Signed-off-by: John Carney <john.carney@broadcom.com>
Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
8 years agonet/ixgbe/base: add base driver update brief
Xiao Wang [Sun, 25 Sep 2016 09:00:17 +0000 (17:00 +0800)]
net/ixgbe/base: add base driver update brief

The ixgbe base driver was updated to version
cid-10g-shared-code.2016.04.12.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: clean up
Xiao Wang [Sun, 25 Sep 2016 09:00:16 +0000 (17:00 +0800)]
net/ixgbe/base: clean up

Change the parameter bypass_vlvf to vlvf_bypass for consistency
with ixgbe_common.c.

Clean up some whitespace and misalignment.

Change variable type of secrxreg from int to u32 as it's used
to store register value.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: fix skipping PHY config
Xiao Wang [Sun, 25 Sep 2016 09:00:15 +0000 (17:00 +0800)]
net/ixgbe/base: fix skipping PHY config

By exiting early we could skip the PHY configuration and as such
the driver may not configure the PHY correctly for SFP+.

This patch removes the logic which would previously skip the PHY
configuration in the case where we are already at the requested
speed in ixgbe_setup_mac_link_multispeed_fiber().

Fixes: f3430431abaf ("ixgbe/base: add SFP+ dual-speed support")

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: remove unneeded flow control code
Xiao Wang [Sun, 25 Sep 2016 09:00:14 +0000 (17:00 +0800)]
net/ixgbe/base: remove unneeded flow control code

Support for flow control auto negotiation is defeatured from X550em_a
fiber when connected to speeds lower than 10Gbps. This patch cleans up
the code path which is mostly dead to begin with.

- add device IDs check in ixgbe_device_supports_autoneg_fc().
- ixgbe_fc_autoneg_fiber_x550em_a() is now used only to pass the user
  settings to ixgbe_fc_enable_generic().
- make sure that start_hw does not fail when setup_fc is not implemented.
- small fix in the debug message when ixgbe_device_supports_autoneg_fc()
  returns false.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: update X550em_a backplane speed
Xiao Wang [Sun, 25 Sep 2016 09:00:13 +0000 (17:00 +0800)]
net/ixgbe/base: update X550em_a backplane speed

Correct link flow for X550em_a backplane with ALEF.

Report the correct link capabilities:
   SKUs configured for 2.5G only support 2.5G.
   non-10G SKUs can only support 2.5 or 1G.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: fix possible corruption of shadow RAM
Xiao Wang [Sun, 25 Sep 2016 09:00:12 +0000 (17:00 +0800)]
net/ixgbe/base: fix possible corruption of shadow RAM

Currently, not all shadow RAM accesses are being done under the
protection of a semaphore, which could result in corruption.

Refactor the code so that it is possible to hold the semaphore
around ixgbe_host_interface_command by introducing an unlocked form.
This patch also eliminates the function ixgbe_read_ee_hostif_data_X550
in favor of the function ixgbe_read_ee_hostif_X550.
The new arrangement is able to get both the management interface semaphore
and the EEPROM semaphore at the same time instead of separately.

Fixes: af75078fece3 ("first public release")

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: add two MAC ops for Hyper-V
Xiao Wang [Sun, 25 Sep 2016 09:00:11 +0000 (17:00 +0800)]
net/ixgbe/base: add two MAC ops for Hyper-V

This patch adds negotiate_api_version and set_rlpml into mac_ops. With the
introduction of Hyper-V functionality, we can have separate functions to
accommodate different implementations without have one break the other.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: add X550em_a FW ALEF support
Xiao Wang [Sun, 25 Sep 2016 09:00:10 +0000 (17:00 +0800)]
net/ixgbe/base: add X550em_a FW ALEF support

This patch adds X550em_a FW ALEF support. ALEF is the new unified FW.
The driver uses the KRM_PMD_RX_FLEX_PORT/FLX_MASK_ST20 registers to
configure the lane mode.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: separate PHY ops init from PHY init
Xiao Wang [Sun, 25 Sep 2016 09:00:09 +0000 (17:00 +0800)]
net/ixgbe/base: separate PHY ops init from PHY init

This patch moves PHY ops pointers initialization to
ixgbe_init_phy_ops_X550em and PHY identifying/initializing
to ixgbe_identify_phy_x550em.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: prevent link speed value conflict
Xiao Wang [Sun, 25 Sep 2016 09:00:08 +0000 (17:00 +0800)]
net/ixgbe/base: prevent link speed value conflict

This patch changes the value of IXGBE_LINK_SPEED_10_FULL from 4 to 2,
as 4 is reserved to 100Mbit Half Duplex in E1000 shared code.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: remove X550em_a 100Mbps
Xiao Wang [Sun, 25 Sep 2016 09:00:07 +0000 (17:00 +0800)]
net/ixgbe/base: remove X550em_a 100Mbps

X550em_a only supports 10G/1G link.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: report autoneg supported for X550
Xiao Wang [Sun, 25 Sep 2016 09:00:06 +0000 (17:00 +0800)]
net/ixgbe/base: report autoneg supported for X550

Make sure ixgbe_device_supports_autoneg_fc() returns true for the device
IDs of X550EM_A_1G_T and X550EM_A_1G_T_L.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: reduce delay for SWFW semaphore
Xiao Wang [Sun, 25 Sep 2016 09:00:05 +0000 (17:00 +0800)]
net/ixgbe/base: reduce delay for SWFW semaphore

This patch reduces the SWFW semaphore/PHY Token retry delay.

ixgbe_release_swfw_sync_X540: Reduce 5 ms delay after releasing
semaphore to 2 ms. HW team indicated 1 ms delay would be sufficient
for FW access.

ixgbe_acquire_swfw_sync_X540: Remove 5 ms delay after acquiring
semaphore.

ixgbe_acquire_swfw_sync_X550a: Remove 5 ms delay since there are
two 2 ms delays in the semaphore release flow.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: factorize mailbox write needing ack
Xiao Wang [Sun, 25 Sep 2016 09:00:04 +0000 (17:00 +0800)]
net/ixgbe/base: factorize mailbox write needing ack

ixgbevf_write_msg_read_ack() is now performing mailbox write and read,
so this patch use this function to commonize mailbox write and read.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: add missing FDIRSCTPM mask setting
Xiao Wang [Sun, 25 Sep 2016 09:00:03 +0000 (17:00 +0800)]
net/ixgbe/base: add missing FDIRSCTPM mask setting

This patch adds missing FDIRSCTPM mask setting for tunneled packets.
It should be set the same way as FDIRTCPM and FDIRUDPM so that SCTP
packets can be filtered correctly.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: set default autoneg speed at reset
Xiao Wang [Sun, 25 Sep 2016 09:00:02 +0000 (17:00 +0800)]
net/ixgbe/base: set default autoneg speed at reset

This patch avoids the situation where we initialize an adapter but have not
yet set up phy.autoneg_advertised speeds. In that case we could end
up with having no autoneg speeds enabled and therefore get no link until we
reset the link and set the autoneg speeds correctly.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: use default check link for X550em_a
Xiao Wang [Sun, 25 Sep 2016 09:00:01 +0000 (17:00 +0800)]
net/ixgbe/base: use default check link for X550em_a

This patch removes the X550em_a specific check link function and uses
ixgbe_check_mac_link_generic instead. It is not necessary to
check both the MAC link register and external PHY registers when
checking the link.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: add bounds check in LED functions
Xiao Wang [Sun, 25 Sep 2016 09:00:00 +0000 (17:00 +0800)]
net/ixgbe/base: add bounds check in LED functions

Do parameter check to prevent exceptional value being written into
register.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: add constants for GENEVE UDP port
Xiao Wang [Sun, 25 Sep 2016 08:59:59 +0000 (16:59 +0800)]
net/ixgbe/base: add constants for GENEVE UDP port

X550em_a adds GENEVE support by using the upper 16 bits of VXLANCTRL
to store the UDP port (VXLANCTRL.GENEVE_UDP_PORT).

This patch adds definitions that can be used to manipulate the ports
depending on which protocol is being configured.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: support X550em_a SGMII FC autoneg
Xiao Wang [Sun, 25 Sep 2016 08:59:58 +0000 (16:59 +0800)]
net/ixgbe/base: support X550em_a SGMII FC autoneg

Create flow control (FC) setup and enable functions to configure PHY
registers. These registers advertise FC settings according to the user
requested mode. On link establishment, these settings are negotiated
with the link partner to agree on the settings to use: RX and TX enabled,
TX only enabled, or FC disabled and RX enabled (which also enables TX).

Remove the part of code that performs FC auto-negotiation (AN) in
ixgbe_setup_m88 and put it in a new function to maintain consistency
with other FC AN implementations so far. Add function pointers to the
setup-fc and enable-fc functions so that they get called during init
to perform FC AN.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: bypass checking link for crosstalk
Xiao Wang [Sun, 25 Sep 2016 08:59:57 +0000 (16:59 +0800)]
net/ixgbe/base: bypass checking link for crosstalk

When HW starts, first read the NVM to see if the crosstalk fix should
be used on the given HW and cache that information in the HW structure.

When we check_link we first see if 1) NVM requests this fix 2) if
we are an SFP+ device 3) see if a module is not in the SFP+ cage.
If all the above are true then don't bother checking the link, just
say it is down.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: define X550 PCIe serial MAC address
Xiao Wang [Sun, 25 Sep 2016 08:59:56 +0000 (16:59 +0800)]
net/ixgbe/base: define X550 PCIe serial MAC address

Add SERIAL_NUMBER_MAC_ADDR definition for X550.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: fix check for NACK
Xiao Wang [Sun, 25 Sep 2016 08:59:55 +0000 (16:59 +0800)]
net/ixgbe/base: fix check for NACK

Previously we checked return buffer for
(IXGBE_VF_SET_MACVLAN | IXGBE_VT_MSGTYPE_NACK), but this would not
work if index is not 0 and as a result NACK will not be detected.

Fixes: af75078fece3 ("first public release")

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: access IOSF by host interface
Xiao Wang [Sun, 25 Sep 2016 08:59:54 +0000 (16:59 +0800)]
net/ixgbe/base: access IOSF by host interface

This patch makes sure that we access IOSF registers through the
host interface command (HIC) for the majority of X550em devices.
All devices with NVM are capable of using the HIC.

For consistency all instances where the ixgbe_write_phy_reg_mdi is called
directly are converted to function pointer calls.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: increment PF-VF mailbox version
Xiao Wang [Sun, 25 Sep 2016 08:59:53 +0000 (16:59 +0800)]
net/ixgbe/base: increment PF-VF mailbox version

This patch will pave the way for the new VF unicast promiscuous
mode support.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: report VF MTU setting failure
Xiao Wang [Sun, 25 Sep 2016 08:59:52 +0000 (16:59 +0800)]
net/ixgbe/base: report VF MTU setting failure

Propagate return value when trying to set the maximum packet length. A
PF driver could return a NACK for this request, and the VF driver will
need to know this.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: fix function comments about X550
Xiao Wang [Sun, 25 Sep 2016 08:59:51 +0000 (16:59 +0800)]
net/ixgbe/base: fix function comments about X550

Some function comments are obviously wrong, this patch rewords them.

Fixes: d2e72774e58c ("ixgbe/base: support X550")
Fixes: 0790adeb5675 ("ixgbe/base: support X550em_a device")

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: configure DMA coalescing for 10Mb
Xiao Wang [Sun, 25 Sep 2016 08:59:50 +0000 (16:59 +0800)]
net/ixgbe/base: configure DMA coalescing for 10Mb

Provide a DMA coalescing configuration for 10Mb link speed.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: clear page register in error path
Xiao Wang [Sun, 25 Sep 2016 08:59:49 +0000 (16:59 +0800)]
net/ixgbe/base: clear page register in error path

The error exit should at least try to set the page register to 0
since other code will assume that state.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: add flow control autoneg for X550em_a fiber
Xiao Wang [Sun, 25 Sep 2016 08:59:48 +0000 (16:59 +0800)]
net/ixgbe/base: add flow control autoneg for X550em_a fiber

This patch adds a separate function for enabling Flow Control (FC)
auto-negotiation on X550em_a:

- rename ixgbe_fc_autoneg_x550a() to ixgbe_fc_autoneg_backplane_x550em_a().
- create ixgbe_fc_autoneg_fiber_x550em_a() specifically for fiber.
- add definitions for KRM_PCS_KX_AN_LP register and related bits.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: add flow control for X550em_a fiber
Xiao Wang [Sun, 25 Sep 2016 08:59:47 +0000 (16:59 +0800)]
net/ixgbe/base: add flow control for X550em_a fiber

This patch adds a separate function for setting up Flow Control (FC)
on X550em_a fiber:

- rename ixgbe_setup_fc_x550a() to ixgbe_setup_fc_backplane_x550em_a().
- create ixgbe_setup_fc_fiber_x550em_a() to configure FC for fiber.
- add definitions for KRM_AN_CNTL_4 and KRM_PCS_KX_AN along with related
  definitions.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: add VF promiscuous mode constants
Xiao Wang [Sun, 25 Sep 2016 08:59:46 +0000 (16:59 +0800)]
net/ixgbe/base: add VF promiscuous mode constants

Add new definitions to support VF unicast promiscuous mode which
will be implemented in a later patch.

Besides, rename definitions of subdevice IDs on SFP LOM to make it
easier to distinguish.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: rework X550em_a 1G PHY init
Xiao Wang [Sun, 25 Sep 2016 08:59:45 +0000 (16:59 +0800)]
net/ixgbe/base: rework X550em_a 1G PHY init

Fully initialize X550em_a 1G PHYs; move the PHY definitions from
ixgbe_x550.h to ixgbe_phy.h, where they really belong; define
register numbers in decimal because that is how they are in the spec.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: extract PHY probing function
Xiao Wang [Sun, 25 Sep 2016 08:59:44 +0000 (16:59 +0800)]
net/ixgbe/base: extract PHY probing function

Move the PHY probe code into a separate function so that it can be
reused. A subsequent patch will use it for configurations that
provide the PHY address explicitly.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: move X550 MAC ops init into functions
Xiao Wang [Sun, 25 Sep 2016 08:59:43 +0000 (16:59 +0800)]
net/ixgbe/base: move X550 MAC ops init into functions

This patch introduces new init_ops functions for X550EM_a and X550EM_x.
This makes it easier to assign function pointers with specific
dependencies (like media type) for each MAC.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: move multicast mode update
Xiao Wang [Sun, 25 Sep 2016 08:59:42 +0000 (16:59 +0800)]
net/ixgbe/base: move multicast mode update

This patch adds update_xcast_mode callback in mac ops, and moves
ixgbevf_update_xcast_mode function into base code.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: support X550em_a 10G PHY
Xiao Wang [Sun, 25 Sep 2016 08:59:41 +0000 (16:59 +0800)]
net/ixgbe/base: support X550em_a 10G PHY

This patch uses the shared Management Data Input/output (MDIO)
functions ixgbe_read_phy_reg_x550a and ixgbe_write_phy_reg_x550a
for X550em_a 10G PHY which supports flow control auto-negotiation.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: change endianness of PHY data
Xiao Wang [Sun, 25 Sep 2016 08:59:40 +0000 (16:59 +0800)]
net/ixgbe/base: change endianness of PHY data

The x550a related firmware reverses the endianness of the PHY data read
and written via host interface command, so make corresponding changes
to that.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: remove X550em SFP iXFI setup
Xiao Wang [Sun, 25 Sep 2016 08:59:39 +0000 (16:59 +0800)]
net/ixgbe/base: remove X550em SFP iXFI setup

This patch removes X550em SFP iXFI setup for the drivers since there
is no released hardware production with SFP iXFI.

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/ixgbe/base: fix pointer check
Xiao Wang [Sun, 25 Sep 2016 08:59:38 +0000 (16:59 +0800)]
net/ixgbe/base: fix pointer check

The vfta_delta value rather than the pointer should be checked.

Fixes: b978f7b38c14 ("net/ixgbe/base: simplify VLAN management")

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
8 years agonet/i40e: enable 25G device
Qi Zhang [Tue, 27 Sep 2016 01:37:22 +0000 (09:37 +0800)]
net/i40e: enable 25G device

Add support for 25G link speed to enable 25G device.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
8 years agonet/i40e: use PHY type to check PHY capability
Qi Zhang [Tue, 27 Sep 2016 01:37:21 +0000 (09:37 +0800)]
net/i40e: use PHY type to check PHY capability

Using device ID to check PHY capability is not extensible.

Now we are using PHY type to detect PHY capability.

All link speeds supported by the device are encoded into PHY type,
and PHY type value can be read by admin queue "get_phy_capability"
command at initialization stage.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
8 years agonet/enic: support scatter Rx in MTU update
John Daley [Thu, 22 Sep 2016 17:02:46 +0000 (10:02 -0700)]
net/enic: support scatter Rx in MTU update

Re-initialize Rq's when MTU is changed. This allows for more
efficient use of mbufs when moving from an MTU that is greater
than the mbuf size to one that is less. Also move to using Rx
scatter mode when moving from an MTU less than the mbuf size
to one that is greater.

Signed-off-by: Nelson Escobar <neescoba@cisco.com>
Signed-off-by: John Daley <johndale@cisco.com>