Sean Morrissey [Tue, 15 Feb 2022 12:29:49 +0000 (12:29 +0000)]
lib: remove unneeded header includes
These header includes have been flagged by the iwyu_tool
and removed.
Signed-off-by: Sean Morrissey <sean.morrissey@intel.com>
Sean Morrissey [Tue, 15 Feb 2022 12:29:48 +0000 (12:29 +0000)]
devtools: add IWYU script to remove unused includes
This script can be used for removing headers flagged for removal by the
include-what-you-use (IWYU) tool. The script has the ability to remove
headers from specified sub-directories or dpdk as a whole and tests the
build after each removal by calling meson compile.
example usages:
Remove headers flagged by iwyu_tool output file
$ ./devtools/process_iwyu.py iwyu.out -b build
Remove headers flagged by iwyu_tool output file from sub-directory
$ ./devtools/process_iwyu.py iwyu.out -b build -d lib/kvargs
Remove headers directly piped from the iwyu_tool
$ iwyu_tool -p build | ./devtools/process_iwyu.py - -b build
Signed-off-by: Sean Morrissey <sean.morrissey@intel.com>
Signed-off-by: Conor Fogarty <conor.fogarty@intel.com>
Reviewed-by: Bruce Richardson <bruce.richardson@intel.com>
Tomasz Duszynski [Thu, 17 Feb 2022 11:09:24 +0000 (12:09 +0100)]
raw/cnxk_gpio: add option to select subset of GPIOs
Add PMD parameter that allows one to select only subset of available
GPIOs.
This might be useful in cases where some GPIOs are already reserved yet
still available for userspace access but particular app should not touch
them.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tomasz Duszynski [Thu, 17 Feb 2022 11:09:23 +0000 (12:09 +0100)]
raw/cnxk_gpio: add self test
Add support for performing selftest.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Tomasz Duszynski [Thu, 17 Feb 2022 11:09:22 +0000 (12:09 +0100)]
raw/cnxk_gpio: add custom IRQ handlers
Add support for custom interrupt handlers. Custom interrupt
handlers bypass kernel completely and are meant for fast
and low latency access to GPIO state.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Tomasz Duszynski [Thu, 17 Feb 2022 11:09:21 +0000 (12:09 +0100)]
raw/cnxk_gpio: add standard GPIO operations
Add support for standard GPIO operations i.e ones normally
provided by GPIO sysfs interface.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Tomasz Duszynski [Thu, 17 Feb 2022 11:09:20 +0000 (12:09 +0100)]
raw/cnxk_gpio: dequeue buffers
Add support for dequeuing buffers.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Tomasz Duszynski [Thu, 17 Feb 2022 11:09:19 +0000 (12:09 +0100)]
raw/cnxk_gpio: enqueue buffers
Add dummy support for enqueuing buffers.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Tomasz Duszynski [Thu, 17 Feb 2022 11:09:18 +0000 (12:09 +0100)]
raw/cnxk_gpio: release queue
Add support for queue release.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Tomasz Duszynski [Thu, 17 Feb 2022 11:09:17 +0000 (12:09 +0100)]
raw/cnxk_gpio: setup queue
Add support for queue setup.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Tomasz Duszynski [Thu, 17 Feb 2022 11:09:16 +0000 (12:09 +0100)]
raw/cnxk_gpio: read queue count
Add support for reading number of available queues. Single queue
corresponds to GPIO.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Tomasz Duszynski [Thu, 17 Feb 2022 11:09:15 +0000 (12:09 +0100)]
raw/cnxk_gpio: read default queue configuration
Add support for reading default queue configuration.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Tomasz Duszynski [Thu, 17 Feb 2022 11:09:14 +0000 (12:09 +0100)]
raw/cnxk_gpio: add GPIO driver skeleton
Add initial support for PMD that allows to control particular pins form
userspace. Moreover PMD allows to attach custom interrupt handlers to
controllable GPIOs.
Main users of this PMD are dataplain applications requiring fast and low
latency access to pin state.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Naga Harish K S V [Wed, 9 Feb 2022 05:31:51 +0000 (23:31 -0600)]
eventdev/eth_tx: fix queue add error code
The internal function txa_service_queue_add() is returning 0
in case of error, correct this logic to return a negative value
to indicate failure.
Fixes:
a3bbf2e09756 ("eventdev: add eth Tx adapter implementation")
Cc: stable@dpdk.org
Signed-off-by: Naga Harish K S V <s.v.naga.harish.k@intel.com>
Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
Ganapati Kundapura [Thu, 10 Feb 2022 17:41:17 +0000 (11:41 -0600)]
eventdev/crypto: assume SW when no driver capabilities
update rte_event_crypto_adapter_caps_get() to return
SW_CAP if PMD callback is not registered.
Signed-off-by: Ganapati Kundapura <ganapati.kundapura@intel.com>
Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
Ganapati Kundapura [Thu, 10 Feb 2022 17:41:16 +0000 (11:41 -0600)]
eventdev/crypto: store operations in circular buffer
Move crypto ops to circular buffer to retain crypto
ops when cryptodev/eventdev are temporarily full.
Signed-off-by: Ganapati Kundapura <ganapati.kundapura@intel.com>
Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
Pavan Nikhilesh [Thu, 10 Feb 2022 13:20:46 +0000 (18:50 +0530)]
event/cnxk: improve Rx performance
Improve vWQE and CQ Rx performance by tuning perfetches to 64B
cacheline size.
Also, prefetch the vWQE array offsets at cacheline boundaries.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Pavan Nikhilesh [Thu, 10 Feb 2022 13:20:45 +0000 (18:50 +0530)]
event/cnxk: disable default wait time for dequeue
Setting WAITW bit enables default min dequeue timeout of 1us.
Avoid the min dequeue timeout by setting WAITW only when dequeue_timeout
is configured.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Pavan Nikhilesh [Thu, 10 Feb 2022 13:20:44 +0000 (18:50 +0530)]
event/cnxk: store and reuse workslot status
Store and reuse workslot status for TT, GRP and HEAD status
instead of reading from GWC as reading from GWC imposes
additional latency.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Thomas Monjalon [Sun, 13 Feb 2022 23:11:35 +0000 (00:11 +0100)]
version: 22.03-rc1
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Radu Nicolau [Thu, 2 Dec 2021 12:50:40 +0000 (12:50 +0000)]
dma/idxd: support allow/block list
Add support for allow or block list for devices bound
to the kernel driver.
When used the allow or block list applies as an additional
condition to the name prefix.
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Reviewed-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Kevin Laatz <kevin.laatz@intel.com>
Cristian Dumitrescu [Wed, 12 Jan 2022 18:59:10 +0000 (18:59 +0000)]
examples/pipeline: print table entries to file
Add support for the show CLI command to print table entries to a file
instead of standard output.
Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Harshad Narayane <harshad.suresh.narayane@intel.com>
Cristian Dumitrescu [Fri, 11 Feb 2022 15:11:14 +0000 (15:11 +0000)]
pipeline: support checksum for variable size headers
Added checksum support for variable size headers such as IPv4 headers
with options.
Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com>
Signed-off-by: Harshad Narayane <harshad.suresh.narayane@intel.com>
Cristian Dumitrescu [Thu, 10 Feb 2022 19:45:08 +0000 (19:45 +0000)]
pipeline: fix table state memory allocation
The regular tables, selector tables and learner tables are all sharing
the table state array. The locations in this array were computed
incorrectly, leading to memory corruption issues.
Fixes:
4f59d3726147 ("pipeline: support learner tables")
Cc: stable@dpdk.org
Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Harshad Narayane <harshad.suresh.narayane@intel.com>
Signed-off-by: Kamalakannan R <kamalakannan.r@intel.com>
Signed-off-by: Venkata Suresh Kumar P <venkata.suresh.kumar.p@intel.com>
Cristian Dumitrescu [Fri, 3 Dec 2021 14:31:04 +0000 (14:31 +0000)]
pipeline: fix annotation checks
The checks for the table-only and default-only annotations were
incorrect, as they were using the pipeline action ID instead of the
table action ID for retrieving the table action info. These checks are
now corrected and pushed into the internal table_entry_check()
function.
Fixes:
cd79e0205824 ("pipeline: support action annotations")
Cc: stable@dpdk.org
Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com>
Cristian Dumitrescu [Wed, 1 Dec 2021 12:21:19 +0000 (12:21 +0000)]
pipeline: add check against loops
Detect when a jump instruction, either conditional or unconditional,
is jumping to itself, thus creating a loop, which is not allowed in
data plane code.
Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Harshad Narayane <harshad.suresh.narayane@intel.com>
Cristian Dumitrescu [Sat, 27 Nov 2021 00:02:54 +0000 (00:02 +0000)]
pipeline: add drop port for each pipeline
An additional output port is now implicitly created for every pipeline
to serve as the packet drop port. Up to now, the drop port had to be
explicitly created for each pipeline.
Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com>
Cristian Dumitrescu [Sat, 27 Nov 2021 00:02:53 +0000 (00:02 +0000)]
pipeline: move table type registration to library
Move the table type registration for the well known table types from
the application to the pipeline library.
Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com>
Cristian Dumitrescu [Sat, 27 Nov 2021 00:02:52 +0000 (00:02 +0000)]
pipeline: move port type registration to library
Move the port type registration for the well known port types from the
application to the pipeline library.
Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com>
Cristian Dumitrescu [Sat, 27 Nov 2021 00:02:51 +0000 (00:02 +0000)]
pipeline: improve drop instruction
The output port to be used as the drop port is now determined when the
drop instruction is executed as opposed to being statically determined
at instruction translation time and hardcoded in the opcode.
Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com>
Junfeng Guo [Thu, 10 Feb 2022 07:06:34 +0000 (15:06 +0800)]
raw/ntb: clear all valid doorbell bits on init
Before registering the doorbell interrupt handler callback function,
all the valid doorbell bits within the NTB private data struct should
be cleared to avoid the confusion of the handshake timing sequence
diagram when setting up the NTB connection in back-to-back mode.
Fixes:
62012a76811e ("raw/ntb: add handshake process")
Cc: stable@dpdk.org
Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
Fan Zhang [Mon, 24 Jan 2022 10:41:58 +0000 (10:41 +0000)]
maintainers: update for crypto api/crypto perf/sw crypto pmds using ipsec-mb
Add myself as Crypto API, QAT, SW PMDs based on ipsec-mb,
NULL PMD, and crypto perf test maintainer. Also remove
Declan, Deepak, and John from the maintainers of these
areas.
Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: John Griffin <john.griffin@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Gagandeep Singh [Thu, 10 Feb 2022 10:58:52 +0000 (16:28 +0530)]
crypto/dpaa_sec: add debug prints
Adding useful debug prints in DPAA driver for
easy debugging. A devarg is added to enable various levels
of prints.
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Nipun Gupta [Thu, 10 Feb 2022 10:58:51 +0000 (16:28 +0530)]
crypto/dpaa2_sec: support ordered queue
This patch supports ordered queue for DPAA2 platform.
A devarg is added to enable strict ordering.
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Hemant Agrawal [Thu, 10 Feb 2022 10:58:50 +0000 (16:28 +0530)]
crypto/dpaax_sec: fix auth/cipher xform chain checks
This patch add more checks on next type for PDCP cases.
Fixes:
45e019608f31 ("crypto/dpaa2_sec: support integrity only PDCP")
Fixes:
a1173d55598c ("crypto/dpaa_sec: support PDCP offload")
Cc: stable@dpdk.org
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Gagandeep Singh [Thu, 10 Feb 2022 10:58:49 +0000 (16:28 +0530)]
crypto/dpaa2_sec: add debug prints
Few useful debug prints added in dequeue function.
These are controlled via pmd devargs. Details of using the
devarg is updated in dpaa2_sec.rst
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Hemant Agrawal [Thu, 10 Feb 2022 10:58:48 +0000 (16:28 +0530)]
crypto/dpaa2_sec: update capabilities for AES CMAC
Add IV size and change the digest size to supported
value by the HW engine.
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Gagandeep Singh [Thu, 10 Feb 2022 10:58:47 +0000 (16:28 +0530)]
common/dpaax: change PDCP SDAP job processing mode
For PDCP SDAP test cases, HW sec engine process the
jobs in WAIT mode.
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Franck Lenormand [Thu, 10 Feb 2022 10:58:46 +0000 (16:28 +0530)]
common/dpaax: remove outdated caamflib code
DPAA1 and DPAA2 platforms use SEC ERA 8 and 10 only.
Hence, code related to old SEC-ERA (1-7) is removed.
This patch removes code in SDAP and PDCP header related to these
ERA to simplify the codebase:
- Simplify logic using RTA_SEC_ERA_<> macro
- Remove era_2_sw_hfn_ovrd dedicated to RTA_SEC_ERA_2
Signed-off-by: Franck Lenormand <franck.lenormand@nxp.com>
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Arek Kusztal [Fri, 11 Feb 2022 16:02:38 +0000 (16:02 +0000)]
cryptodev: reorganize asymmetric structs
This patch adds crypto uint typedef so adding comment
about byte-order becomes unnecessary.
It makes API comments more tidy, and consistent
with other asymmetric crypto APIs.
Additionally it reorganizes code that enums, externs
and forward declarations are moved to the top of the
header file making code more readable.
It removes also comments like co-prime constraint
from mod inv as it is natural mathematical constraint,
not PMD constraint.
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Arek Kusztal [Fri, 11 Feb 2022 16:02:37 +0000 (16:02 +0000)]
cryptodev: use C11 macro instead of direct attribute
This commit replaces __extension__ attribute with
RTE_STD_C11 in anonymous unions.
It makes API consistent in terms of usage of C11
feature macro.
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Arek Kusztal [Fri, 11 Feb 2022 16:02:36 +0000 (16:02 +0000)]
cryptodev: clarify usage of random numbers in asym
This commit clarifies usage of random numbers in asymmetric
crypto API.
The user is now allowed to provide information to the PMD if random
number should be generated or should be read from user input.
If PMD does not support random number generation user should
always provide it, if PMD does not support user random,
rte_crypto_param.data accordingly should be set to NULL.
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Arek Kusztal [Fri, 11 Feb 2022 16:02:35 +0000 (16:02 +0000)]
cryptodev: add DSA random number k
This commit adds random number 'k' to DSA
op param struct for asymmetric crypto ops.
This parameter is crucial in stiuations where:
- PMD cannot generate random number
- User would like to provide random source
Additionally, it makes DSA consistent with ECDSA
in terms of 'k' which includes this parameter.
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Ciara Power [Fri, 11 Feb 2022 09:29:09 +0000 (09:29 +0000)]
cryptodev: modify return value for asym session create
Rather than the asym session create function returning a session on
success, and a NULL value on error, it is modified to now return int
values - 0 on success or -EINVAL/-ENOTSUP/-ENOMEM on failure.
The session to be used is passed as input.
This adds clarity on the failure of the create function, which enables
treating the -ENOTSUP return as TEST_SKIPPED in test apps.
Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Ciara Power [Fri, 11 Feb 2022 09:29:08 +0000 (09:29 +0000)]
cryptodev: add asymmetric session user data API
A user data field is added to the asymmetric session structure.
Relevant API added to get/set the field.
Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Ciara Power [Fri, 11 Feb 2022 09:29:07 +0000 (09:29 +0000)]
cryptodev: hide asymmetric session structure
The rte_cryptodev_asym_session structure is now moved to an internal
header. This will no longer be used directly by apps,
private session data can be accessed via get API.
Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Ciara Power [Fri, 11 Feb 2022 09:29:06 +0000 (09:29 +0000)]
cryptodev: use single mempool for asymmetric session
Rather than using a session buffer that contains pointers to private
session data elsewhere, have a single session buffer.
This session is created for a driver ID, and the mempool element
contains space for the max session private data needed for any driver.
Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Ciara Power [Fri, 11 Feb 2022 09:29:05 +0000 (09:29 +0000)]
doc: replace asym crypto code with literal includes
The programmer's guide for cryptodev included sample code for using
Asymmetric crypto. This is now replaced with direct code from the test
application, using literal includes. It is broken into snippets as the
test application didn't have all of the required code in one function.
Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Anoob Joseph [Mon, 31 Jan 2022 12:30:29 +0000 (18:00 +0530)]
crypto/cnxk: fix update of number of descriptors
Pending queue also need to be adjusted while updating the number of
descriptors.
Fixes:
a455fd869cd7 ("common/cnxk: align CPT queue depth to power of 2")
Cc: stable@dpdk.org
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Anoob Joseph [Mon, 31 Jan 2022 12:30:28 +0000 (18:00 +0530)]
crypto/cnxk: use unique cache line per inst
CPT inflight request is used to track a request that is enqueued to
cryptodev. Having more than one inst use the same cacheline can result
in serialization of CPT result memory writes causing perf degradations.
Align inflight request to ROC cache line to ensure only one result would
be written per cache line..
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Anoob Joseph [Mon, 31 Jan 2022 12:30:27 +0000 (18:00 +0530)]
common/cnxk: add ROC cache line size constant
Add ROC cache line size constant.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Tejasree Kondoj [Mon, 31 Jan 2022 12:30:26 +0000 (18:00 +0530)]
crypto/cnxk: support ESN and anti-replay
Added lookaside IPsec ESN and anti-replay support
through security session update.
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Anoob Joseph [Mon, 31 Jan 2022 12:30:25 +0000 (18:00 +0530)]
common/cnxk: add err ctl in SA
Add err ctl field in SA context.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Weiguo Li [Tue, 25 Jan 2022 14:33:15 +0000 (22:33 +0800)]
compress/octeontx: fix null pointer dereference
Check for memory allocation failure is added to avoid null
pointer dereference.
Fixes:
c378f084d6e3 ("compress/octeontx: add device setup ops")
Cc: stable@dpdk.org
Signed-off-by: Weiguo Li <liwg06@foxmail.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Kai Ji [Fri, 21 Jan 2022 10:38:30 +0000 (10:38 +0000)]
crypto/qat: fix GEN4 AEAD job in raw data path
This patch fix the cipher params configuration in AEAD job if
QAT GEN4 unified cipher slice(UCS) enabled.
Fixes:
328d690d2f60 ("crypto/qat: update raw data path")
Cc: stable@dpdk.org
Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Pablo de Lara [Thu, 20 Jan 2022 17:04:55 +0000 (17:04 +0000)]
crypto/ipsec_mb: fix buffer overrun
Memory for ZUC cipher/auth key in session had to be expanded to 32 bytes,
instead of 16 bytes, when adding ZUC-256 support.
However, impact is low as this memory is part of a union
with bigger size than 32 bytes.
Coverity issue: 374374
Coverity issue: 374379
Fixes:
8c835018de84 ("crypto/ipsec_mb: support ZUC-256 for aesni_mb")
Cc: stable@dpdk.org
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Ciara Power <ciara.power@intel.com>
Piotr Bronowski [Sun, 16 Jan 2022 19:40:43 +0000 (19:40 +0000)]
crypto/ipsec_mb: fix premature dereference
This patch removes coverity defect CID 374380:
Null pointer dereferences (REVERSE_INULL)
Coverity issue: CID 374380
Fixes:
918fd2f1466b ("crypto/ipsec_mb: move aesni_mb PMD")
Cc: stable@dpdk.org
Signed-off-by: Piotr Bronowski <piotrx.bronowski@intel.com>
Kai Ji [Fri, 7 Jan 2022 15:06:04 +0000 (15:06 +0000)]
test/crypto: fix out-of-place SGL in raw datapath
Fix out of place scatter gather list in sym raw datapath unit test.
Fixes:
cd8166c28cd1 ("test/crypto: add raw API test for dpaax")
Cc: stable@dpdk.org
Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Thomas Monjalon [Wed, 5 Jan 2022 17:40:15 +0000 (18:40 +0100)]
doc: simplify baseband features matrix
The "feature" BBDEV API is useless as all baseband drivers
must implement it by definition.
The non-implemented features should not be marked with "N".
Keeping them blank is clearer to read in the resulting matrix.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Arek Kusztal [Tue, 28 Dec 2021 09:49:54 +0000 (09:49 +0000)]
common/qat: enable GEN4 b devices
This commit enables CPM2.0b devices in Intel QuickAssist
Technology PMD.
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Radu Nicolau [Thu, 25 Nov 2021 13:03:54 +0000 (13:03 +0000)]
examples/ipsec-secgw: fix offload flag used for TSO IPv6
RTE_MBUF_F_TX_OUTER_IP_CKSUM should not be set for IPv6 packets.
Fixes:
a7f32947a316 ("examples/ipsec-secgw: support TCP TSO")
Cc: stable@dpdk.org
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Ferruh Yigit [Fri, 11 Feb 2022 19:11:43 +0000 (19:11 +0000)]
ethdev: move driver interface functions to its own file
ethdev has two interfaces, one interface between applications and
library, these APIs are declared in the rte_ethdev.h public header.
Other interface is between drivers and library, these functions are
declared in ethdev_driver.h and marked as internal.
But all functions are defined in rte_ethdev.c file. This patch moves
functions for drivers to its own file, ethdev_driver.c for cleanup, no
functional change in functions.
Some public APIs and driver helpers call common internal functions,
which were mostly static since both were in same file. To be able to
move driver helpers, common functions are moved to ethdev_private.c.
(ethdev_private.c is used for functions that are internal to the library
and shared by multiple .c files in the ethdev library.)
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Ferruh Yigit [Fri, 11 Feb 2022 19:11:42 +0000 (19:11 +0000)]
ethdev: introduce generic dummy packet burst function
Multiple PMDs have dummy/noop Rx/Tx packet burst functions.
These dummy functions are very simple, introduce a common function in
the ethdev and update drivers to use it instead of each driver having
its own functions.
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Robert Sanford [Tue, 21 Dec 2021 19:57:29 +0000 (14:57 -0500)]
net/ring: support promisc and allmulticast
Add promiscuous_enable, promiscuous_disable, allmulticast_enable,
and allmulticast_disable API stubs.
This helps clean up errors in dpdk-test link_bonding_mode4_autotest.
Signed-off-by: Robert Sanford <rsanford@akamai.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Pavan Nikhilesh [Thu, 10 Feb 2022 13:15:26 +0000 (18:45 +0530)]
net/cnxk: avoid command copy from Tx queue
Tx command is prepared based on offloads enabled and stored in
Tx queue structure at tx_queue_setup phase.
In fastpath the command is copied from Tx queue to LMT line for
all the packets.
Since, the command contents are mostly constants we can move the
command preparation to fastpath and avoid accessing Tx queue
memory.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Jie Wang [Wed, 9 Feb 2022 09:38:55 +0000 (17:38 +0800)]
common/iavf: add session ID fields for L2TPv2
Add virtchnl fields session ID of L2TPv2 for AVF HASH.
Signed-off-by: Jie Wang <jie1x.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Ghalem Boudour [Thu, 10 Feb 2022 10:49:14 +0000 (11:49 +0100)]
net/iavf: initialize large VF setting at startup
lv_enabled is used to remember if large VF setting is configured, but
its value is not initialized at startup. This can lead to a different
configuration regarding the initial configuration of the PF.
For example, a first start is done with 8 rx and 8 tx queues. Large VF
is not needed and reta size is 64.
A second start is done with 20 rx and tx queues. Large VF is required
and reta size is 256.
A third start is done with 2 rx and tx queues. Large VF is not needed
but reta size is 256 as the PF has been configured during the second
start.
In order to have a consistent behavior regarding reta size whatever
the configuration of the PF (may be changed by a previous boot) the
lv_enabled must be set properly at the init phase.
Signed-off-by: Ghalem Boudour <ghalem.boudour@6wind.com>
Signed-off-by: Thibaut Collet <thibaut.collet@6wind.com>
Reviewed-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Ting Xu <ting.xu@intel.com>
Min Hu (Connor) [Fri, 11 Feb 2022 04:49:30 +0000 (12:49 +0800)]
net/hns3: dump flow control info
This patch dumps flow control info such as flow control mode
for debug.
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Min Hu (Connor) [Fri, 11 Feb 2022 04:49:29 +0000 (12:49 +0800)]
net/hns3: dump TM configuration info
This patch dumps TM configuration info about shaper, port node, TC node,
queue node related info.
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Min Hu (Connor) [Fri, 11 Feb 2022 04:49:28 +0000 (12:49 +0800)]
net/hns3: dump flow director basic info
This patch dumps flow director basic info such rule numbers, hit counts
for debug.
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Min Hu (Connor) [Fri, 11 Feb 2022 04:49:27 +0000 (12:49 +0800)]
net/hns3: dump VLAN configuration info
This patch dump VLAN filter, strip related info and Pvid info for debug.
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Min Hu (Connor) [Fri, 11 Feb 2022 04:49:26 +0000 (12:49 +0800)]
net/hns3: dump queue info
This patch dumps Rx/Tx queue info, such as queue numbers, queue enable
state for debug.
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Min Hu (Connor) [Fri, 11 Feb 2022 04:49:25 +0000 (12:49 +0800)]
net/hns3: dump device MAC info
This patch dumps device MAC info which hns3 PMD private info offers.
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Min Hu (Connor) [Fri, 11 Feb 2022 04:49:24 +0000 (12:49 +0800)]
net/hns3: dump device feature capability
Kunpeng 920 and Kunpeng 930 support different feature capability.
This patch dumps feature capability Current device supports.
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Min Hu (Connor) [Fri, 11 Feb 2022 04:49:23 +0000 (12:49 +0800)]
net/hns3: dump device basic info
This patch dumps device basic info such as device name, adapter state
for debug.
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Ciara Loftus [Fri, 11 Feb 2022 15:03:05 +0000 (15:03 +0000)]
doc: update libxdp usage in af_xdp guide
When libxdp is used, the LIBXDP_OBJECT_PATH environment variable must be
set to the location of where libxdp placed its bpf object files. This is
usually in /usr/local/lib/bpf or /usr/local/lib64/bpf. Failure to do so
will result in the PMD not initialising correctly as the bpf program is
not found. Document this requirement.
Also, mention that the following logs which are generated on application
launch can be ignored:
libbpf: elf: skipping unrecognized data section(7) .xdp_run_config
libbpf: elf: skipping unrecognized data section(8) xdp_metadata
Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Sean Zhang [Fri, 11 Feb 2022 01:45:29 +0000 (03:45 +0200)]
app/testpmd: support GRE option flow item
Add gre_option command for matching optional fields
(checksum/key/sequence) in GRE header. The item must follow gre item,
and the item does not change the flags in gre item, the application
should set the flags in gre item correspondingly.
Application can still use gre_key item 'gre_key value is xx' for key
matching, the effect is the same with using 'gre_option key is xx'.
The examples for gre_option are as follows:
To match on checksum field with value 0x11:
testpmd> ... pattern / eth / gre c_bit is 1 / gre_option checksum is
0x11 / end ..
To match on checksum field with value 0x11 and any value of key:
testpmd> ... pattern / eth / gre c_bit is 1 k_bit is 1 / gre_option
checksum is 0x11 / end ..
To match on checksum field with value 0x11 and no key field in packet:
testpmd> ... pattern / eth / gre c_bit is 1 k_bit is 0 / gre_option
checksum is 0x11 / end ..
The invalid patterns for gre_option are as follows:
testpmd> ... pattern / eth / gre / gre_option checksum is 0x11 / end ..
(c_bit in gre item not present)
testpmd> ... pattern / eth / gre c_bit is 0 / gre_option checksum is 0x11 /
end .. (c_bit is unset for gre item, but checksum is
specified by gre_option item)
Signed-off-by: Sean Zhang <xiazhang@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
Sean Zhang [Fri, 11 Feb 2022 01:45:28 +0000 (03:45 +0200)]
ethdev: support GRE optional fields
Add flow pattern items and header format for matching optional fields
(checksum/key/sequence) in GRE header. And the flags in gre item should
be correspondingly set with the new added items.
Signed-off-by: Sean Zhang <xiazhang@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
Sean Zhang [Fri, 11 Feb 2022 01:45:27 +0000 (03:45 +0200)]
net: add optional fields in GRE header
There are optional fields in GRE header(checksum/key/sequence), this
patch adds definition of structures of the optional fields.
Signed-off-by: Sean Zhang <xiazhang@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
Ciara Loftus [Wed, 9 Feb 2022 09:48:08 +0000 (09:48 +0000)]
net/af_xdp: re-enable secondary process support
Secondary process support had been disabled for the AF_XDP PMD because
there was no logic in place to share the AF_XDP socket file descriptors
between the processes. This commit introduces this logic using the IPC
APIs.
Rx and Tx are disabled in the secondary process due to memory mapping of
the AF_XDP rings being assigned by the kernel in the primary process only.
However other operations including retrieval of stats are permitted.
Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
Jiawen Wu [Wed, 9 Feb 2022 10:42:13 +0000 (18:42 +0800)]
net/txgbe: fix KR auto-negotiation
Fix failure to enter auto-negotiation mode on some firmware versions for
KR NICs.
Fixes:
f611dada1af8 ("net/txgbe: update link setup process of backplane NICs")
Cc: stable@dpdk.org
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Jiawen Wu [Wed, 9 Feb 2022 10:42:12 +0000 (18:42 +0800)]
net/txgbe: fix link up and down
Add hw->dev_start status in the flow of setting link up/down, to avoid
obtaining link status inconsistent with the settings.
Fixes:
12a653eb53e1 ("net/txgbe: fix link status when device stopped")
Cc: stable@dpdk.org
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Jiawen Wu [Wed, 9 Feb 2022 10:42:10 +0000 (18:42 +0800)]
net/txgbe: support OEM customized LED
Support to configure LED in firmware. Driver commands firmware to turn
the LED on and off. And OEM customize their LED solutions in firmware.
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Jiawen Wu [Wed, 9 Feb 2022 10:42:08 +0000 (18:42 +0800)]
net/ngbe: support OEM customized LED
Support to get OEM customized LED configuration information from firmware.
And driver needs to adjust the process of PHY setup link, based on this
LED configuration.
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Jiawen Wu [Wed, 9 Feb 2022 10:42:07 +0000 (18:42 +0800)]
net/ngbe: support custom PHY interfaces
Support sub_device ID 61/62/64 for YT8521S SFP, and 51/52 for M88E1512
PHY.
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Jiawen Wu [Wed, 9 Feb 2022 10:42:06 +0000 (18:42 +0800)]
net/ngbe: optimize PHY initialization process
Reduce the probability of PHY init failure, And add its error return.
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Jiawen Wu [Wed, 9 Feb 2022 10:42:05 +0000 (18:42 +0800)]
net/ngbe: fix packet statistics
Fix specific length packet statistics caused by wrong register addresses.
Fixes:
ed5f3bd3373e ("net/ngbe: define registers")
Cc: stable@dpdk.org
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Jiawen Wu [Wed, 9 Feb 2022 10:42:04 +0000 (18:42 +0800)]
net/ngbe: fix Tx hang on queue disable
Add commands requesting firmware to enable or disable PCIe bus master.
Disable PCIe master access to clear BME when stop hardware, and verify
there are no pending requests.
Move disabling Tx queue after disabling PCIe bus master, to ensure that
there are no packets left to cause Tx hang.
Fixes:
78710873c2f3 ("net/ngbe: add HW initialization")
Cc: stable@dpdk.org
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Jiawen Wu [Wed, 9 Feb 2022 10:42:03 +0000 (18:42 +0800)]
net/ngbe: fix missed link interrupt
When the port is started and stopped continuously and quickly, one
interrupt cannot be handled in time, which will cause subsequent
interrupts to be lost, so that link status will cannot be updated.
Fixes:
b9246b8fa280 ("net/ngbe: support link update")
Cc: stable@dpdk.org
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Jiawen Wu [Wed, 9 Feb 2022 10:42:02 +0000 (18:42 +0800)]
net/ngbe: fix Rx by initializing packet buffer early
Initialize Rx packet buffer before starting RxTx, ensure to receive
packets.
Fixes:
62fc35e63d0e ("net/ngbe: support Rx queue start/stop")
Cc: stable@dpdk.org
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Min Hu (Connor) [Fri, 11 Feb 2022 04:49:22 +0000 (12:49 +0800)]
ethdev: introduce dump API
Added the ethdev dump API which provides querying private info from device.
There exists many private properties in different PMD drivers, such as
adapter state, Rx/Tx func algorithm in hns3 PMD. The information of these
properties is important for debug. As the information is private, the new
API is introduced.
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Ajit Khaparde [Wed, 26 Jan 2022 18:13:26 +0000 (10:13 -0800)]
net/bnxt: fix ring calculation for representors
Currently the Tx and Rx ring count for representors is fixed.
It does not consider the number of rings created for the parent
function. And that can cause issues not only during initialization
but while running traffic.
Instead check the number of rings created for the parent function
while configuring the ring resources for representors.
In some cases VF rep ring init may happen before the parent function's
rings have been setup. And this can cause representor ring count to be
configured as 0. In such cases, initialize the VF representor
ring count to 8.
Fixes:
322bd6e70272 ("net/bnxt: add port representor infrastructure")
Cc: stable@dpdk.org
Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Ajit Khaparde [Tue, 1 Feb 2022 22:38:01 +0000 (14:38 -0800)]
net/bnxt: set HW coalescing parameters
Set coalescing parameters correctly for Rx completion rings.
This is not being done for the Rx completion rings currently.
Fixes:
657c2a7f1dd4 ("net/bnxt: create aggregation rings when needed")
Cc: stable@dpdk.org
Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Shahaji Bhosle [Tue, 8 Feb 2022 17:00:44 +0000 (09:00 -0800)]
net/bnxt: make DMAC field optional for F2 match
OvS is adding DMAC sometimes and skips sometimes for F2 flows,
to get around not offloading flow make the dmac field optional
in OvS template.
Signed-off-by: Shahaji Bhosle <sbhosle@broadcom.com>
Reviewed-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Dariusz Sosnowski [Mon, 7 Feb 2022 15:48:56 +0000 (17:48 +0200)]
net/mlx5: fix inline length for multi-segment TSO
This patch removes a redundant assert in mlx5_tx_packet_multi_tso().
That assert assured that the amount of bytes requested to be inlined
is greater than or equal to the minimum amount of bytes required
to be inlined. This requirement is either derived from the NIC
inlining mode or configured through devargs. When using TSO this
requirement can be disregarded, because on all NICs it is satisfied by
TSO inlining requirements, since TSO requires L2, L3, and L4 headers to
be inlined.
Fixes:
18a1c20044c0 ("net/mlx5: implement Tx burst template")
Cc: stable@dpdk.org
Signed-off-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Alexander Kozyrev [Mon, 7 Feb 2022 13:29:41 +0000 (15:29 +0200)]
net/mlx5: fix meter capabilities reporting
Meter capabilities reporting is not up to date.
Mellanox NICs support RFC2698 and RFC4115 as well as RFC2697.
Add these marker operations to the capabilities list.
Fixes:
6bc327b94fe8 ("net/mlx5: fill meter capabilities using DevX")
Cc: stable@dpdk.org
Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Alexander Kozyrev [Mon, 7 Feb 2022 13:28:40 +0000 (15:28 +0200)]
net/mlx5: fix committed bucket size
Committed Bucket Size calculation tries to fit into 8-bit wide
mantissa field by setting 256 as a maximum value for it.
To compensate for this increase in the mantissa value the exponent
value has to be reduced by 8. But it gives a negative exponent
value for CBS less than 128. And negative exponent value is not
supported by the NIC. Adjust CSB calculation only for values
bigger than 128 to allow both small and big bucket sizes.
Fixes:
3bd26b23cefc ("net/mlx5: support meter profile operations")
Cc: stable@dpdk.org
Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Alexander Kozyrev [Fri, 4 Feb 2022 03:19:13 +0000 (05:19 +0200)]
doc: add mlx5 MPRQ limitation with multi-process
MPRQ cannot be used in multi-process applications because of
externally attached MPRQ buffers. A callback is registered by
a primary process to free MPRQ buffers once they are no longer
needed. But this information is shared among all the processes.
The virtual address of the mlx5_mprq_buf_free_cb function is
different in a secondary process, which leads to a segmentation
fault. Document that MPRQ is not supported in a multi-process
app, since there is no way to find out if this is the one.
Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Viacheslav Ovsiienko [Thu, 3 Feb 2022 08:46:52 +0000 (10:46 +0200)]
net/mlx5: remove unused metadata shift parameter
Due to updated modify field action immediate value buffer
pattern [1] the implicit shift for the metadata is not
needed anymore and should be removed.
[1] commit
40c8fb1fd3b3 ("net/mlx5: update modify field action")
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Viacheslav Ovsiienko [Thu, 3 Feb 2022 08:46:51 +0000 (10:46 +0200)]
net/mlx5: fix metadata endianness in modify field action
As modify field action immediate source parameter the metadata
should follow the CPU endianness (according to SET_META action
structure format), and mlx5 PMD wrongly handled the immediate
parameter metadata buffer as big-endian, resulting in wrong
metadata set action with incorrect endianness.
Fixes:
40c8fb1fd3b3 ("net/mlx5: update modify field action")
Cc: stable@dpdk.org
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>