Tal Shnaiderman [Wed, 14 Oct 2020 19:30:01 +0000 (22:30 +0300)]
bus/pci: clear undefined bits in Windows segment parsing
When reading bus and segment values using SPDRP_BUSNUMBER
bits 24-31 are undefined.
They are cleared to verify we read the segment number correctly.
Fixes: c3adf8144a17 ("bus/pci: support segment as address domain on Windows") Cc: stable@dpdk.org Signed-off-by: Tal Shnaiderman <talshn@nvidia.com> Acked-by: Ranjit Menon <ranjit.menon@intel.com> Acked-by: Narcisa Vasile <navasile@linux.microsoft.com>
Omkar Maslekar [Thu, 15 Oct 2020 23:20:03 +0000 (16:20 -0700)]
eal: add cache line demotion API
rte_cldemote is similar to a prefetch hint - in reverse.
On x86, cldemote(addr) enables software to hint to hardware that line is
likely to be shared. This is quite useful in core-to-core communications
where cache-line is likely to be shared.
ARM and PPC implementation is provided with NOP and can be added if any
equivalent instructions could be used for implementation on those
architectures.
Signed-off-by: Omkar Maslekar <omkar.maslekar@intel.com> Acked-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: David Christensen <drc@linux.vnet.ibm.com> Acked-by: Jerin Jacob <jerinj@marvell.com> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
David Marchand [Fri, 16 Oct 2020 10:27:11 +0000 (12:27 +0200)]
devtools: check Windows export files
Updating export files (supposed to disappear at some point, but still
there) might be missed when removing symbols in the API / map files.
Add a check for this case.
Signed-off-by: David Marchand <david.marchand@redhat.com> Acked-by: Thomas Monjalon <thomas@monjalon.net>
Kevin Laatz [Fri, 16 Oct 2020 09:08:04 +0000 (10:08 +0100)]
test/service: fix race condition on stopping lcore
There is a potential race condition in 'service_attr_get' which will cause
test failures since the service core thread is still running while the
values are being retrieved/reset.
This patch fixes the race condition by waiting for the service core thread
to stop before continuing with the unit test checks.
Fixes: 4d55194d76a4 ("service: add attribute get function") Signed-off-by: Kevin Laatz <kevin.laatz@intel.com> Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
Timothy McDaniel [Thu, 15 Oct 2020 14:16:46 +0000 (09:16 -0500)]
eventdev: add PCI probe named convenience function
Add new internal wrapper function for use by pci drivers as a
.probe function to attach to an event interface. Same as
rte_event_pmd_pci_probe, except the caller can specify the name.
Updated rte_event_pmd_pci_probe so as to not duplicate
code.
Timothy McDaniel [Thu, 15 Oct 2020 18:07:15 +0000 (13:07 -0500)]
eventdev: express DLB/DLB2 PMD constraints
This commit implements the eventdev ABI changes required by
the DLB/DLB2 PMDs. Several data structures and constants are modified
or added in this patch, thereby requiring modifications to the
dependent apps and examples.
The DLB/DLB2 hardware does not conform exactly to the eventdev interface.
1) It has a limit on the number of queues that may be linked to a port.
2) Some ports a further restricted to a maximum of 1 linked queue.
3) DLB does not have the ability to carry the flow_id as part
of the event (QE) payload. Note that the DLB2 hardware is capable of
carrying the flow_id.
Following is a detailed description of the changes that have been made.
1) Add new fields to the rte_event_dev_info struct. These fields allow
the device to advertise its capabilities so that applications can take
the appropriate actions based on those capabilities.
struct rte_event_dev_info {
uint32_t max_event_port_links;
/**< Maximum number of queues that can be linked to a single event
* port by this device.
*/
uint8_t max_single_link_event_port_queue_pairs;
/**< Maximum number of event ports and queues that are optimized for
* (and only capable of) single-link configurations supported by this
* device. These ports and queues are not accounted for in
* max_event_ports or max_event_queues.
*/
}
2) Add a new field to the rte_event_dev_config struct. This field allows
the application to specify how many of its ports are limited to a single
link, or will be used in single link mode.
/** Event device configuration structure */
struct rte_event_dev_config {
uint8_t nb_single_link_event_port_queues;
/**< Number of event ports and queues that will be singly-linked to
* each other. These are a subset of the overall event ports and
* queues; this value cannot exceed *nb_event_ports* or
* *nb_event_queues*. If the device has ports and queues that are
* optimized for single-link usage, this field is a hint for how many
* to allocate; otherwise, regular event ports and queues can be used.
*/
}
3) Replace the dedicated implicit_release_disabled field with a bit field
of explicit port capabilities. The implicit_release_disable functionality
is assigned to one bit, and a port-is-single-link-only attribute is
assigned to other, with the remaining bits available for future assignment.
* Event port configuration bitmap flags */
#define RTE_EVENT_PORT_CFG_DISABLE_IMPL_REL (1ULL << 0)
/**< Configure the port not to release outstanding events in
* rte_event_dev_dequeue_burst(). If set, all events received through
* the port must be explicitly released with RTE_EVENT_OP_RELEASE or
* RTE_EVENT_OP_FORWARD. Must be unset if the device is not
* RTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE capable.
*/
#define RTE_EVENT_PORT_CFG_SINGLE_LINK (1ULL << 1)
/**< This event port links only to a single event queue.
*
* @see rte_event_port_setup(), rte_event_port_link()
*/
#define RTE_EVENT_PORT_ATTR_IMPLICIT_RELEASE_DISABLE 3
/**
* The implicit release disable attribute of the port
*/
Harman Kalra [Thu, 8 Oct 2020 18:48:45 +0000 (00:18 +0530)]
net/octeontx2: fix jumbo frame crash
Issue has been observed in case of multi segments where mbuf
data gets corrupted due to missing barriers. Changes made to
mbuf just before LMTST by one core gets updatded when the
same mbuf is in use by another core, leading to corruption.
It should be ensured that all changes made to mbuf should be
written before LMTST.
Pavan Nikhilesh [Thu, 8 Oct 2020 18:48:43 +0000 (00:18 +0530)]
event/octeontx2: add switch tag flush operation
Add SWTAG flush operation at the end of transmit sequence to
immediately release the tag held by the core.
Reuse Tag address to check SWTAG completion status.
Ankur Dwivedi [Thu, 8 Oct 2020 10:34:35 +0000 (16:04 +0530)]
event/octeontx2: add crypto adapter datapath
In the op new mode of crypto adapter, the completed crypto operation
is submitted to the event device by the OCTEON TX2 crypto PMD.
During event device dequeue the result of crypto operation is checked.
Ankur Dwivedi [Thu, 8 Oct 2020 12:52:33 +0000 (18:22 +0530)]
test/event: fix function arguments for crypto adapter
The arguments passed to rte_event_crypto_adapter_caps_get() and
rte_event_crypto_adapter_create() are incorrect.
In the rte_event_crypto_adapter_caps_get(), event device id should
be the first argument and cryptodev id should be the second argument.
In the rte_event_crypto_adapter_create(), the event device id should
be the second argument.
Ankur Dwivedi [Thu, 8 Oct 2020 12:52:32 +0000 (18:22 +0530)]
test/event: check unsupported crypto adapter mode
The capability of a hardware event device should be checked before
creating a event crypto adapter in a particular mode. The test case
returns error if the mode is not supported.
test/event: add null dev creation in Rx adapter autotest
Allows creation of net_null if vdev EAL option is not specified and
uninit vdev created in the test. The change also adds error checks
for vdev init and uninit.
Signed-off-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com> Reviewed-by: Nikhil Rao <nikhil.rao@intel.com>
event/octeontx: validate events requested against available
Validate events configured in ssopf against the total number of
events configured across all the RX/TIM event adapters.
Events available to ssopf can be reconfigured by passing the required
amount to kernel bootargs and are only limited by DRAM size.
Example:
ssopf.max_events= 2097152
Suanming Mou [Thu, 15 Oct 2020 01:07:47 +0000 (09:07 +0800)]
ethdev: make flow API thread safe
Currently, the rte_flow functions are not defined as thread safe.
DPDK applications either call the functions in single thread or
protect any concurrent calling for the rte_flow operations using
a lock.
For PMDs support the flow operations thread safe natively, the
redundant protection in application hurts the performance of the
rte_flow operation functions.
And the restriction of thread safe is not guaranteed for the
rte_flow functions also limits the applications' expectation.
This feature is going to change the rte_flow functions to be thread
safe. As different PMDs have different flow operations, some may
support thread safe already and others may not. For PMDs don't
support flow thread safe operation, a new lock is defined in ethdev
in order to protects thread unsafe PMDs from rte_flow level.
A new RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE device flag is added to
determine whether the PMD supports thread safe flow operation or not.
For PMDs support thread safe flow operations, set the
RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE flag, rte_flow level functions will
skip the thread safe helper lock for these PMDs. Again the rte_flow
level thread safe lock only works when PMD operation functions are
not thread safe.
For the PMDs which don't want the default mutex lock, just set the
flag in the PMD, and add the prefer type of lock in the PMD. Then
the default mutex lock is easily replaced by the PMD level lock.
The change has no effect on the current DPDK applications. No change
is required for the current DPDK applications. For the standard posix
pthread_mutex, if no lock contention with the added rte_flow level
mutex, the mutex only does the atomic increasing in
pthread_mutex_lock() and decreasing in
pthread_mutex_unlock(). No futex() syscall will be involved.
Signed-off-by: Suanming Mou <suanmingm@nvidia.com> Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com> Acked-by: Ori Kam <orika@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com> Acked-by: Thomas Monjalon <thomas@monjalon.net> Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Somnath Kotur [Tue, 6 Oct 2020 07:22:32 +0000 (09:22 +0200)]
mbuf: extend meaning of QinQ stripped bit
Clarify the documentation of QinQ flags, and extend the meaning of the
flag: if PKT_RX_QINQ_STRIPPED is set and PKT_RX_VLAN_STRIPPED is unset,
only the outer VLAN is removed from packet data, but both tci are saved
in mbuf->vlan_tci (inner) and mbuf->vlan_tci_outer (outer).
Vikas Gupta [Tue, 13 Oct 2020 07:47:13 +0000 (13:17 +0530)]
crypto/bcmfs: optimize crypto request processing
Reduce number of source BDs to submit a request to crypto engine.
This improves the performance as crypto engine fetches all the BDs in
single cycle. Adjust optional metadata (OMD) in continuation of
fixed meta data (FMD).
Franck Lenormand [Mon, 12 Oct 2020 14:10:06 +0000 (19:40 +0530)]
test/crypto: add PDCP-SDAP cases
A new functions which uses the structure of the test vectors for SDAP
is added and call a functions responsible to call the test_pdcp_proto
with the test vector both for encapsulation and decapsulation.
Franck Lenormand [Mon, 12 Oct 2020 14:10:04 +0000 (19:40 +0530)]
test/crypto: add test vectors for PDCP-SDAP
The test vectors are structured in a more readable way compared
to test vector for PDCP. This structure allows to have all the
information about a test vector at the same place.
Akhil Goyal [Mon, 12 Oct 2020 14:10:01 +0000 (19:40 +0530)]
doc: remove unnecessary API code from security guide
Various xform structures are being copied in
rte_security guide which can be referred from the
API documentation generated by Doxygen. The security guide
does not talk about specific details of these xforms and
thus are removed from the security guide.
Akhil Goyal [Mon, 12 Oct 2020 14:10:00 +0000 (19:40 +0530)]
security: modify PDCP xform to support SDAP
The SDAP is a protocol in the LTE stack on top of PDCP for
QOS. A particular PDCP session may or may not have
SDAP enabled. But if it is enabled, SDAP header should be
authenticated but not encrypted if both confidentiality and
integrity is enabled. Hence, the driver should be intimated
from the xform so that it skip the SDAP header while encryption.
A new field is added in the PDCP xform to specify SDAP is enabled.
The overall size of the xform is not changed, as hfn_ovrd is just
a flag and does not need uint32. Hence, it is converted to uint8_t
and a 16 bit reserved field is added for future.
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com> Acked-by: Thomas Monjalon <thomas@monjalon.net>
Franck Lenormand [Mon, 12 Oct 2020 14:09:59 +0000 (19:39 +0530)]
common/dpaax/caamflib: support PDCP-SDAP
The SDAP is a protocol in the LTE stack on top of PDCP. It is
dedicated to QoS.
The difficulty of implementing this protocol is because the
PDCP change behavior regarding encryption and authentication
of the SDU it receives. In effect PDCP shall not encrypt the
SDAP SDU but must authenticate it (when encryption and
authentication is enabled).
The current version of SEC does not support the SDAP and the
change of behavior of PDCP prevent the use of the PDCP
protocol command available.
The way to do it is to reuse the PDCP implementation but to
not use the PDCP protocol and to have descriptors which
performs the PDCP protocol.
It is implemented by doing small changes of code:
#ifdef SDAP_SUPPORT
length += SDAP_BYTE_SIZE;
offset -= SDAP_BYTE_SIZE;
#endif
after having computed the size of the SN to read from the
input data, then
#ifdef SDAP_SUPPORT
MATHI(p, MATH0, LSHIFT, 8, MATH1, 8, 0);
MATHB(p, MATH1, AND, sn_mask, MATH1, 8, IFB | IMMED2);
#else
MATHB(p, MATH0, AND, sn_mask, MATH1, 8, IFB | IMMED2);
#endif
It will keep the SN and the SDAP header in MATH0, then shift
it to remove the SDAP header and store the result in MATH1.
Arek Kusztal [Mon, 12 Oct 2020 19:21:24 +0000 (20:21 +0100)]
cryptodev: remove algo lists end
This patch removes enumerators RTE_CRYPTO_CIPHER_LIST_END,
RTE_CRYPTO_AUTH_LIST_END, RTE_CRYPTO_AEAD_LIST_END to prevent
ABI breakage that may arise when adding new crypto algorithms.
Fan Zhang [Sun, 11 Oct 2020 00:38:52 +0000 (01:38 +0100)]
cryptodev: add raw crypto datapath API
This patch adds raw data-path APIs for enqueue and dequeue
operations to cryptodev. The APIs support flexible user-define
enqueue and dequeue behaviors.
Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com> Signed-off-by: Piotr Bronowski <piotrx.bronowski@intel.com> Acked-by: Adam Dybkowski <adamx.dybkowski@intel.com> Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
This patch updates ``rte_crypto_sym_vec`` structure to add
support for both cpu_crypto synchronous operation and
asynchronous raw data-path APIs. The patch also includes
AESNI-MB and AESNI-GCM PMD changes, unit test changes and
documentation updates.
Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Pablo de Lara [Fri, 9 Oct 2020 12:05:20 +0000 (12:05 +0000)]
crypto/aesni_mb: fix GCM digest size check
GCM digest sizes should be between 1 and 16 bytes.
Fixes: 7b2d4706c90e ("crypto/aesni_mb: support newer library version only") Cc: stable@dpdk.org Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Pablo de Lara [Fri, 9 Oct 2020 12:05:19 +0000 (12:05 +0000)]
crypto/aesni_mb: fix CCM digest size check
Digest size for CCM was being checked for other algorithms
apart from CCM.
Fixes: c4c0c312a823 ("crypto/aesni_mb: check for invalid digest size") Cc: stable@dpdk.org Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Pablo de Lara [Mon, 12 Oct 2020 11:29:59 +0000 (11:29 +0000)]
crypto/aesni_gcm: support SGL on AES-GMAC
Add Scatter-gather list support for AES-GMAC.
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com> Tested-by: Fan Zhang <roy.fan.zhang@intel.com> Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Fan Zhang [Fri, 9 Oct 2020 20:08:22 +0000 (21:08 +0100)]
examples/fips_validation: update GCM test
This patch updates fips validation GCM test capabilities:
- In NIST GCMVS spec GMAC test vectors are the GCM ones with
plaintext length as 0 and uses AAD as input data. Originally
fips_validation tests treats them both as GCM test vectors.
This patch introduce automatic test type recognition between
the two: when plaintext length is 0 the prepare_gmac_xform
and prepare_auth_op functions are called, otherwise
prepare_gcm_xform and prepare_aead_op functions are called.
- NIST GCMVS also specified externally or internally IV
generation. When IV is to be generated by IUT internally IUT
shall store the generated IV in the response file. This patch
also adds the support to that.
Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com> Signed-off-by: Weqaar Janjua <weqaar.a.janjua@intel.com> Acked-by: John Griffin <john.griffin@intel.com>
Fan Zhang [Fri, 9 Oct 2020 20:08:21 +0000 (21:08 +0100)]
examples/fips_validation: support scatter gather list
This patch adds SGL support to FIPS sample application.
Originally the application allocates single mbuf of 64KB - 1
bytes data room. With the change the user may reduce the
mbuf dataroom size by using the add cmdline option. If the
input test data is longer than the user provided data room
size the application will automatically build chained mbufs
for the target cryptodev PMD to test.
Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com> Acked-by: John Griffin <john.griffin@intel.com>
Michael Shamis [Wed, 30 Sep 2020 08:01:57 +0000 (11:01 +0300)]
crypto/mvsam: remove algo lists end
Remove enumerators RTE_CRYPTO_CIPHER_LIST_END,
RTE_CRYPTO_AUTH_LIST_END, RTE_CRYPTO_AEAD_LIST_END to prevent
ABI breakages that may arise when adding new crypto algorithms.
Signed-off-by: Michael Shamis <michaelsh@marvell.com>
Ruifeng Wang [Fri, 18 Sep 2020 05:45:17 +0000 (13:45 +0800)]
crypto/armv8: remove algo lists end
Removed references to RTE_CRYPTO_CIPHER_LIST_END and
RTE_CRYPTO_AUTH_LIST_END to prevent ABI breakages
that may arise when adding new crypto algorithms.
Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com> Reviewed-by: Phil Yang <phil.yang@arm.com>
David Coyle [Tue, 6 Oct 2020 11:40:21 +0000 (12:40 +0100)]
crypto/aesni_mb: fix security session clearing
When destroying a security session, the AESNI-MB PMD attempted to clear
the private aesni_mb session object to remove any key material. However,
the function aesni_mb_pmd_sec_sess_destroy() cleared the security session
object instead of the private session object.
This patch fixes this issue by now clearing the private session object.
Fixes: fda5216fba55 ("crypto/aesni_mb: support DOCSIS protocol") Cc: stable@dpdk.org Signed-off-by: David Coyle <david.coyle@intel.com> Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
crypto/dpaa2_sec: change descriptor sharing for ERA10
In case of LX2160 or SEC ERA 10, share wait has performance
optimizations wrt to ok-to-share signal which allows multiple
DECOs to work together even in case of single queue and single SA.
Hence updated the descriptor sharing only in case of ERA10.
crypto/dpaa2_sec: increase max anti-replay window size
In case of LX2160 or SEC ERA >= 10, max anti replay window
size supported is 1024. For all other versions of SEC, the
maximum value is capped at 128 even if application gives
more than that.
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com> Signed-off-by: Yi Liu <yi.liu@nxp.com> Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
crypto/dpaa2_sec: support non-HMAC auth algo versions
added support for non-HMAC for auth algorithms
(SHA1, SHA2, MD5).
Corresponding capabilities are enabled so that test
application can enable those test cases.
crypto/dpaa2_sec: support stats for secondary process
DPAA2 crypto object access need availability of MCP object
pointer. In case of secondary process, we need to use local
MCP pointer instead of primary process.
crypto/dpaa2_sec: fix stats query without queue pair
dpdk-procinfo calls the crypto stats API, which results segmentation
fault on DPAA2_SEC.
The queue pair array will be NULL, when it is used without
configuring the SEC device.
net/octeontx2: add replay check for inline inbound packets
The function handling anti replay is added. If replay window
is enabled the rx packets will be validated against the window. The
rx offload fails in case of error.
Haggai Eran [Thu, 8 Oct 2020 19:42:14 +0000 (22:42 +0300)]
cryptodev: fix parameter parsing
The rte_cryptodev_pmd_parse_input_args function crashes with a
segmentation fault when passing a non-empty argument string.
The function passes cryptodev_pmd_valid_params to rte_kvargs_parse,
which accepts a NULL-terminated list of valid keys, yet
cryptodev_pmd_valid_params does not end with NULL. The patch adds the
missing NULL pointer.
Fixes: 9e6edea41805 ("cryptodev: add APIs to assist PMD initialisation") Cc: stable@dpdk.org Signed-off-by: Haggai Eran <haggaie@nvidia.com> Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Adam Dybkowski [Thu, 8 Oct 2020 08:32:22 +0000 (10:32 +0200)]
cryptodev: remove v20 ABI compatibility
This reverts commit a0f0de06d457753c94688d551a6e8659b4d4e041 as the
rte_cryptodev_info_get function versioning was a temporary solution
to maintain ABI compatibility for ChaCha20-Poly1305 and is not
needed in 20.11.
Fixes: a0f0de06d457 ("cryptodev: fix ABI compatibility for ChaCha20-Poly1305") Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com> Reviewed-by: Arek Kusztal <arkadiuszx.kusztal@intel.com> Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Vikas Gupta [Wed, 7 Oct 2020 17:18:55 +0000 (22:48 +0530)]
crypto/bcmfs: add queue pair management
Add queue pair management APIs which will be used by Crypto device to
manage h/w queues. A bcmfs device structure owns multiple queue-pairs
based on the mapped address allocated to it.
Vikas Gupta [Wed, 7 Oct 2020 17:18:54 +0000 (22:48 +0530)]
crypto/bcmfs: support VFIO
Add VFIO support for BCMFS PMD.
The BCMFS PMD functionality is dependent on the VFIO_PRESENT flag,
which gets enabled in the rte_vfio.h.
If this flag is not enabled in the compiling platform driver will
silently return with error, when executed.
Vikas Gupta [Wed, 7 Oct 2020 17:18:53 +0000 (22:48 +0530)]
crypto/bcmfs: introduce BCMFS driver
Add Broadcom FlexSparc(FS) device creation driver which registers to a
vdev and create a device. Add APIs for logs, supportive documentation and
maintainers file.
HMAC/HASH opcode algorithms supports fixed mac length.
Allowed session creation to fail when requested for
unsupported MAC length for HMAC/HASH-only use cases.
Signed-off-by: Archana Muniganti <marchana@marvell.com> Acked-by: Anoob Joseph <anoobj@marvell.com>
Ruifeng Wang [Mon, 31 Aug 2020 08:51:44 +0000 (16:51 +0800)]
crypto/armv8: fix mempool object returning
Crypto session and device session private data were put back
to wrong pools.
This caused data corruption when the object was reallocated and used.
Because objects from different mempools have different element size,
and wrong mempool info caused out of bound write.
Fix the issue by putting back objects to correct mempools.
Ruifeng Wang [Mon, 31 Aug 2020 08:51:43 +0000 (16:51 +0800)]
test/crypto: fix stats test
ut_setup / ut_teardown are invoked for each test case by test framework.
The call inside test_stats is unnecessary and even incorrect.
This caused double free of objects such as crypto operation structure.
Trapped the issue when RTE_LIBRTE_MEMPOOL_DEBUG was enabled.
Fix issue by removing ut_setup / ut_teardown from test case implementation.
Fixes: 202d375c60bc ("app/test: add cryptodev unit and performance tests") Cc: stable@dpdk.org Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com> Tested-by: Adam Dybkowski <adamx.dybkowski@intel.com>
The meson for the turbo_sw PMD is updated to prevent the
requirement for any device specific toplevel flags to be
passed down (unlike what used to be the case with make).
The linking to the optional libraries is purely auto
detected at build time and flags are then set appropriately.
Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com> Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Maxime Coquelin [Tue, 6 Oct 2020 10:04:21 +0000 (12:04 +0200)]
baseband/fpga_lte_fec: fix crash with debug
When RTE_LIBRTE_BBDEV_DEBUG is enabled, rte_device's driver
pointer is dereferenced twice in fpga_lte_fec's probe callback.
It causes a segmentation fault because this pointer is only
assigned after probe callback call.
This patch makes use of rte_pci_driver pointer instead
Fixes: efd453698c49 ("baseband/fpga_lte_fec: add driver for FEC on FPGA") Cc: stable@dpdk.org Signed-off-by: Maxime Coquelin <maxime.coquelin@redhat.com> Acked-by: Nicolas Chautru <nicolas.chautru@intel.com>
Maxime Coquelin [Tue, 6 Oct 2020 10:04:20 +0000 (12:04 +0200)]
baseband/fpga_5gnr_fec: fix crash with debug
When RTE_LIBRTE_BBDEV_DEBUG is enabled, rte_device's driver
pointer is dereferenced twice in fpga_5gnr_fec's probe callback.
It causes a segmentation fault because this pointer is only
assigned after probe callback call.
This patch makes use of rte_pci_driver pointer instead.
Fixes: 0b5927cbcba7 ("baseband/fpga_5gnr_fec: add PMD for FPGA 5GNR FEC") Cc: stable@dpdk.org Signed-off-by: Maxime Coquelin <maxime.coquelin@redhat.com> Acked-by: Nicolas Chautru <nicolas.chautru@intel.com>
Adam Dybkowski [Mon, 28 Sep 2020 14:16:33 +0000 (16:16 +0200)]
crypto/scheduler: rename slave to worker
This patch replaces the usage of the word 'slave' with more
appropriate word 'worker' in QAT PMD and Scheduler PMD
as well as in their docs. Also the test app was modified
to use the new wording.
The Scheduler PMD's public API was modified according to the
previous deprecation notice:
rte_cryptodev_scheduler_slave_attach is now called
rte_cryptodev_scheduler_worker_attach,
rte_cryptodev_scheduler_slave_detach is
rte_cryptodev_scheduler_worker_detach,
rte_cryptodev_scheduler_slaves_get is
rte_cryptodev_scheduler_workers_get.
Also, the configuration value RTE_CRYPTODEV_SCHEDULER_MAX_NB_SLAVES
was renamed to RTE_CRYPTODEV_SCHEDULER_MAX_NB_WORKERS.
Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com> Acked-by: Fan Zhang <roy.fan.zhang@intel.com> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> Acked-by: Akhil Goyal <akhil.goyal@nxp.com>