Pablo de Lara [Wed, 23 Feb 2022 18:22:45 +0000 (18:22 +0000)]
doc: support IPsec Multi-buffer lib v1.2
Updated AESNI MB and AESNI GCM, KASUMI, ZUC and SNOW3G PMD documentation
guides with information about the latest Intel IPSec Multi-buffer
library supported.
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Pablo de Lara [Wed, 23 Feb 2022 16:01:16 +0000 (16:01 +0000)]
crypto/ipsec_mb: fix length and offset settings
KASUMI, SNOW3G and ZUC require lengths and offsets to
be set in bits or bytes depending on the algorithm.
There were some algorithms that were mixing these two,
so this commit is fixing this issue.
Fixes: ae8e085c608d ("crypto/aesni_mb: support KASUMI F8/F9") Fixes: 6c42e0cf4d12 ("crypto/aesni_mb: support SNOW3G-UEA2/UIA2") Fixes: fd8df85487c4 ("crypto/aesni_mb: support ZUC-EEA3/EIA3") Fixes: 8c835018de84 ("crypto/ipsec_mb: support ZUC-256 for aesni_mb") Cc: stable@dpdk.org Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Pablo de Lara [Wed, 23 Feb 2022 16:01:15 +0000 (16:01 +0000)]
crypto/ipsec_mb: fix ZUC operation overwrite
ZUC PMD batches crypto operations depending on their type
(encryption + tag generation, tag verification + decryption, etc),
to allow parallelization.
The array used to store the pointers to these operations was
always the same array provided by dequeue_burst() function,
and it was looping around the same positions (from 0 to ZUC_MAX_BURST - 1).
A new internal array is used to avoid overwriting the pointers
of the array provided by dequeue_burst() function.
Fixes: cf7685d68f00 ("crypto/zuc: add driver for ZUC library") Cc: stable@dpdk.org Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Pablo de Lara [Wed, 23 Feb 2022 16:01:14 +0000 (16:01 +0000)]
crypto/ipsec_mb: fix ZUC authentication verify
ZUC authentication is done over multiple buffers at a time.
When authentication verification is done, multiple scratch buffers
are using to generate the tags that will be compared afterwards.
However, the same scratch buffer was used always, instead of having
different ones for each crypto operation.
Fixes: 0b133c36ad7d ("crypto/zuc: support IPsec Multi-buffer lib v0.54") Cc: stable@dpdk.org Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Pablo de Lara [Wed, 23 Feb 2022 16:01:13 +0000 (16:01 +0000)]
crypto/ipsec_mb: check missing operation types
When processing crypto operations in ZUC PMD,
there were two operation types that were set at session level,
but not checked when the operations are enqueued and processed,
leaving the buffers untouched silently.
Fixes: cde8df1bda9d ("crypto/ipsec_mb: move zuc PMD") Cc: stable@dpdk.org Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Brian Dooley [Mon, 21 Feb 2022 18:06:58 +0000 (18:06 +0000)]
examples/l2fwd-crypto: fix port mask overflow
Coverity flags an issue with 32-bit value. If max ethports value is
configured with a value larger than 32 there will be an issue.
Coverity issue: 375863 Unintentional integer overflow
Add support to enable per port packet pool and also override
vector pool size from command line args. This is useful
on some HW to tune performance based on usecase.
Update error prints in data path to RTE_LOG_DP().
Error prints in fast path are not good for performance
as they slow down the application when few bad packets are
received.
Arek Kusztal [Mon, 21 Feb 2022 10:48:31 +0000 (10:48 +0000)]
crypto/qat: refactor asymmetric session
This patch refactors asymmetric session in Intel
QuickAssist Technology PMD and fixes some issues
with xform. Code will be now bit more scalable,
and easier readable.
Arek Kusztal [Mon, 21 Feb 2022 10:48:27 +0000 (10:48 +0000)]
crypto/qat: refactor asymmetric crypto functions
This commit refactors asummetric crypto functions
in Intel QuickAssist Technology PMD.
Functions right now are shorter and far easier readable,
plus it facilitates addition of new algorithms.
Kai Ji [Wed, 23 Feb 2022 00:50:05 +0000 (08:50 +0800)]
crypto/qat: unify raw data path functions
This patch unifies QAT's raw dp api implementations
to the same enqueue/dequeue methods used in crypto operations.
The specific functions for different QAT generation are updated
respectively. The qat_sym_hw_dp.c is removed as no longer required.
Signed-off-by: Kai Ji <kai.ji@intel.com> Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Kai Ji [Wed, 23 Feb 2022 00:50:04 +0000 (08:50 +0800)]
crypto/qat: rework burst data path
This patch enable the op_build_request function in
qat_enqueue_op_burst, and the qat_dequeue_process_response
function in qat_dequeue_op_burst.
The op_build_request invoked in crypto build request op is based
on crypto operations setup'd during session init.
Signed-off-by: Kai Ji <kai.ji@intel.com> Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Kai Ji [Wed, 23 Feb 2022 00:50:03 +0000 (08:50 +0800)]
crypto/qat: unify asymmetric functions
This patch removes qat_asym_pmd.c and integrates all the
functions into qat_asym.c. The unified/integrated asym crypto
pmd functions should make them easier to maintain.
Signed-off-by: Kai Ji <kai.ji@intel.com> Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Kai Ji [Wed, 23 Feb 2022 00:50:02 +0000 (08:50 +0800)]
crypto/qat: unify symmetric functions
This patch removes qat_sym_pmd.c and integrates all the functions into
qat_sym.c. The unified/integrated qat sym crypto pmd functions should
make them easier to maintain.
Signed-off-by: Kai Ji <kai.ji@intel.com> Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Kai Ji [Wed, 23 Feb 2022 00:50:01 +0000 (08:50 +0800)]
crypto/qat: rework asymmetric op build operation
This patch reworks the asymmetric crypto data path
implementation in QAT driver. The changes include asymmetric
crypto data path separation for QAT hardware generations, and
code optimisation of the device capabilities declaration.
Signed-off-by: Kai Ji <kai.ji@intel.com> Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Kai Ji [Wed, 23 Feb 2022 00:50:00 +0000 (08:50 +0800)]
crypto/qat: rework session functions
This patch introduces a set of set_session methods to QAT
generations. In addition, the reuse of QAT session between
generations is prohibit as the support of min_qat_dev_gen_id'
is removed.
Signed-off-by: Kai Ji <kai.ji@intel.com> Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Kai Ji [Wed, 23 Feb 2022 00:49:59 +0000 (08:49 +0800)]
crypto/qat: support symmetric build op request
This patch adds common inline functions for QAT symmetric
crypto driver to process crypto op, and the implementation of
build op request function for QAT generation 1.
Signed-off-by: Kai Ji <kai.ji@intel.com> Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Kai Ji [Wed, 23 Feb 2022 00:49:58 +0000 (08:49 +0800)]
common/qat: define build request and dequeue operations
This patch introduce build request and dequeue op function
pointers to the qat queue pair implementation. The function
pointers are assigned during qat session generation based on input
crypto operation request.
Signed-off-by: Kai Ji <kai.ji@intel.com> Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
When creating the asymmetric session mempool, the maximum private
session size of all devices is used when creating the mempool
object size.
The return value for ``rte_cryptodev_asym_get_private_session_size``
is unsigned int, whereas the variable was uint8_t, leading to a
possible overflow issue.
To fix this, the variable for private session size is now changed to
unsigned int to match the function return type.
Fixes: 1f1e4b7cbaad ("cryptodev: use single mempool for asymmetric session") Reported-by: Arek Kusztal <arkadiuszx.kusztal@intel.com> Signed-off-by: Ciara Power <ciara.power@intel.com> Acked-by: Fan Zhang <roy.fan.zhang@intel.com> Acked-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Ciara Power [Tue, 15 Feb 2022 11:07:58 +0000 (11:07 +0000)]
crypto/ipsec_mb: remove useless check
The qp is never NULL when it reaches the qp_setup_cleanup error handling
code. This is due to checks earlier in the function that return an error
if qp is NULL.
Shijith Thotton [Thu, 24 Feb 2022 04:46:07 +0000 (10:16 +0530)]
app/eventdev: add crypto producer mode
In crypto producer mode, producer core enqueues cryptodev with software
generated crypto ops and worker core dequeues crypto completion events
from the eventdev. Event crypto metadata used for above processing is
pre-populated in each crypto session.
Parameter --prod_type_cryptodev can be used to enable crypto producer
mode. Parameter --crypto_adptr_mode can be set to select the crypto
adapter mode, 0 for OP_NEW and 1 for OP_FORWARD.
This mode can be used to measure the performance of crypto adapter.
eca_cryptodev_cdev_flush() is internal function and called with
valid range of cdevs.
crypto_cdev_info structure is allocated at adapter creation time
and retrieved from the adapter for a valid cdevs which cannot be NULL
and hence no need for NULL check.
Fixes: 2ae84b39ae7b ("eventdev/crypto: store operations in circular buffer") Signed-off-by: Ganapati Kundapura <ganapati.kundapura@intel.com> Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
Timothy McDaniel [Wed, 16 Feb 2022 19:38:27 +0000 (13:38 -0600)]
event/dlb2: poll HW CQ inflights before mapping queue
When attempting to link a port and queue immediately after unlinking,
the CQ inflights may not all be processed. Poll the h/w register for
outstanding inflights instead of reading once, in case the inflights
are still being processed. Also return EBUSY if the inflight
processing is not completed in a suitable amount of time.
Fixes: 1857f1922ce2 ("event/dlb2: use new implementation of resource file") Cc: stable@dpdk.org Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Remove the memcpy usage in queue config get function for
`event` variable which is 8 byte size and use direct copy.
Also provide vector information and event buffer size in the
queue config info.
Fixes: da781e6488 ("eventdev/eth_rx: support Rx queue config get") Cc: stable@dpdk.org Signed-off-by: Naga Harish K S V <s.v.naga.harish.k@intel.com> Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
Megha Ajmera [Wed, 23 Feb 2022 17:36:30 +0000 (17:36 +0000)]
examples/qos_sched: fix core mask overflow
Masking of core mask was incorrect. Instead of using 1U for shifting, it
should be using 1LU as the result is assigned to uint64.
CID 375859: Potentially overflowing expression "1U << app_main_core" with
type "unsigned int" (32 bits, unsigned) is evaluated using 32-bit
arithmetic, and then used in a context that expects an expression of
type "uint64_t" (64 bits, unsigned).
Bruce Richardson [Wed, 16 Feb 2022 16:06:09 +0000 (16:06 +0000)]
doc: improve configuration examples in idxd guide
The documentation on how to configure device instances using
accel-config can be improved by a number of changes:
* For initial example, when only configuring one queue, omit
configuration of a second engine, which is unused later.
* Add the "max-batch-size" setting to the options being configured for
each queue
* Add a final, more complete example, showing configuration of multiple
queues on a device.
Cc: stable@dpdk.org Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Reviewed-by: Kevin Laatz <kevin.laatz@intel.com>
Bruce Richardson [Wed, 16 Feb 2022 16:06:08 +0000 (16:06 +0000)]
dma/idxd: configure maximum batch size to high value
When configuring an Intel DSA instance using the utility script
dpdk_idxd_cfg.py, explicitly set the max supported batch size value to a
high value, to ensure large bursts are supported if so desired. The
default in the linux kernel is now just 32 [1], which may not be
sufficient for all DPDK apps.
Bruce Richardson [Wed, 16 Feb 2022 16:06:07 +0000 (16:06 +0000)]
test/dma: fix missing checks for device capacity
For some DMA HW devices, e.g. those using the idxd driver, the maximum
burst size is configurable, which can lead to test failures if the value
is set too small. Add explicit check for this to give reasonable error
messages for devices which need their config adjusted.
Fixes: 1b86a66a30c2 ("test/dma: add more comprehensive copy tests") Fixes: 8fa5d2683940 ("test/dma: add burst capacity test") Cc: stable@dpdk.org Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Reviewed-by: Conor Walsh <conor.walsh@intel.com> Reviewed-by: Kevin Laatz <kevin.laatz@intel.com>
Chengwen Feng [Thu, 17 Feb 2022 02:59:11 +0000 (10:59 +0800)]
dma/hisilicon: use common PCI device naming
For DMA device 0000:7d:0.0, the original generated dmadev name starts
with the "7d:0.0", which is not expected.
This patch uses rte_pci_device_name API to generates the dmadev name.
Chengwen Feng [Thu, 17 Feb 2022 02:59:07 +0000 (10:59 +0800)]
dma/hisilicon: support Kunpeng 930
The Kunpeng930 DMA devices have the same PCI device id with Kunpeng920,
but with different PCI revision and register layout. This patch
introduces the basic initialization for Kunpeng930 DMA devices.
Bruce Richardson [Mon, 14 Feb 2022 15:30:38 +0000 (15:30 +0000)]
build: make ring mempool driver mandatory
The default mempool driver is one based on the rte_ring, and as such it
needs to be present to have just about any app (which doesn't override
the mempool) run. Given this state of affairs it is probably best to add
this default mempool driver to the always-enabled list to ensure we get
a runnable build in all cases. This means that, for example, to run some
NIC tests with testpmd in a minimal build, in most cases, all the user
should need to do is specify "-Denable_drivers=net/<nic_drv>" for the
build.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: Morten Brørup <mb@smartsharesystems.com>
Bruce Richardson [Tue, 15 Feb 2022 17:30:29 +0000 (17:30 +0000)]
buildtools/chkincs: check missing C++ guards
Simply compiling a C header with a C++ compiler is not enough to flag
missing 'extern "C"' guards. To catch missing guards, we can just use a
simple grep for the 'extern "C"' part, and error out if any files have a
miss.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Bruce Richardson [Tue, 15 Feb 2022 17:30:28 +0000 (17:30 +0000)]
buildtools/chkincs: check SDK headers for C++ compatibility
With a one-line change to the lib meson.build file we can add the SDK
headers to the list of files to be checked using the chkincs binary.
Unfortunately, many of those SDK header depend upon headers in the PCI
and vdev bus drivers, so we need to update chkincs build to ensure those
dependencies are added. We also need to allow internal APIs to be
present in these SDK headers.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Brian Dooley [Wed, 16 Feb 2022 15:14:56 +0000 (15:14 +0000)]
cryptodev: add missing C++ guards
Some public header files were missing 'extern "C"' C++ guards,
and couldn't be used by C++ applications. Add the missing guards.
Fixes: 7a3357205755 ("lib: remove C++ include guard from private headers") Cc: stable@dpdk.org Signed-off-by: Brian Dooley <brian.dooley@intel.com> Acked-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Brian Dooley [Wed, 16 Feb 2022 15:14:55 +0000 (15:14 +0000)]
bpf: add missing C++ guards
Some public header files were missing 'extern "C"' C++ guards,
and couldn't be used by C++ applications. Add the missing guards.
Fixes: 7a3357205755 ("lib: remove C++ include guard from private headers") Cc: stable@dpdk.org Signed-off-by: Brian Dooley <brian.dooley@intel.com> Acked-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Brian Dooley [Wed, 16 Feb 2022 15:14:52 +0000 (15:14 +0000)]
eventdev: add missing C++ guards
Some public header files were missing 'extern "C"' C++ guards,
and couldn't be used by C++ applications. Add the missing guards.
Fixes: dc39e2f359b5 ("eventdev: add ring structure for events") Fixes: 7a3357205755 ("lib: remove C++ include guard from private headers") Cc: stable@dpdk.org Signed-off-by: Brian Dooley <brian.dooley@intel.com> Acked-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Sean Morrissey [Tue, 15 Feb 2022 12:29:48 +0000 (12:29 +0000)]
devtools: add IWYU script to remove unused includes
This script can be used for removing headers flagged for removal by the
include-what-you-use (IWYU) tool. The script has the ability to remove
headers from specified sub-directories or dpdk as a whole and tests the
build after each removal by calling meson compile.
Tomasz Duszynski [Thu, 17 Feb 2022 11:09:22 +0000 (12:09 +0100)]
raw/cnxk_gpio: add custom IRQ handlers
Add support for custom interrupt handlers. Custom interrupt
handlers bypass kernel completely and are meant for fast
and low latency access to GPIO state.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Tomasz Duszynski [Thu, 17 Feb 2022 11:09:14 +0000 (12:09 +0100)]
raw/cnxk_gpio: add GPIO driver skeleton
Add initial support for PMD that allows to control particular pins form
userspace. Moreover PMD allows to attach custom interrupt handlers to
controllable GPIOs.
Main users of this PMD are dataplain applications requiring fast and low
latency access to pin state.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
The internal function txa_service_queue_add() is returning 0
in case of error, correct this logic to return a negative value
to indicate failure.
Fixes: a3bbf2e09756 ("eventdev: add eth Tx adapter implementation") Cc: stable@dpdk.org Signed-off-by: Naga Harish K S V <s.v.naga.harish.k@intel.com> Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
git.droids-corp.org / dpdk.git / log