Xiaoyun Wang [Mon, 14 Sep 2020 14:31:43 +0000 (22:31 +0800)]
net/hinic: fix TCAM filter set
hinic supports two methods: linear table and tcam table,
if tcam filter enables failed but linear table is ok,
which also needs to enable filter, so for this scene,
driver should not close fdir switch.
Fixes: f4ca3fd54c4d ("net/hinic: create and destroy flow director filter") Cc: stable@dpdk.org Signed-off-by: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
The decorator may be used in the future to instruct linker
to put it into dedicated sections or hide.
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com> Reviewed-by: Andy Moreton <amoreton@xilinx.com> Reviewed-by: Mark Spender <mspender@xilinx.com> Reviewed-by: Richard Houldsworth <rhouldsw@xilinx.com>
Andrew Rybchenko [Thu, 17 Sep 2020 06:34:28 +0000 (07:34 +0100)]
net/sfc/base: decorate libefx API functions
The decorators will be used in the future to mark libefx API
functions as __rte_internal.
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com> Reviewed-by: Andy Moreton <amoreton@solarflare.com> Reviewed-by: Richard Houldsworth <rhouldsw@xilinx.com>
libefx coding standard requires it and the specifier is
used for almost all functions in the header file.
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com> Reviewed-by: Andy Moreton <amoreton@solarflare.com> Reviewed-by: Richard Houldsworth <rhouldsw@xilinx.com>
examples/pipeline: add VXLAN encapsulation example
Add VXLAN encapsulation example to the SWX pipeline application. The
VXLAN tunnels can be generated with the vxlan_table.py script. Example
command line: ./build/pipeline -l0-1 -- -s ./examples/vxlan.cli
examples/pipeline: add l2fwd with MAC swap example
Add L2 Forwarding example with MAC destination and source address swap
to the SWX pipeline application. Example command line:
./build/pipeline -l0-1 -- -s ./examples/l2fwd_macswp.cli
Add network-based connectivity mechanism for the application to allow
for the exchange of configuration messages through the network as
opposed to local CLI only.
Add the PCAP file-based source (input) and sink (output) port types
for the SWX pipeline. The sink port is typically used to implement the
packet drop pipeline action. Used under the hood by the pipeline rx
and tx instructions.
Add support for building the SWX pipeline based on specification file
with syntax aligned to the P4 language. The specification file may be
generated by the P4C compiler in the future.
High-level transaction-oriented API for SWX pipeline table updates. It
supports multi-table atomic updates, i.e. multiple tables can be
updated in a single step with only the before and after table set
visible to the packets. Uses the lower-level table update mechanisms.
Instruction optimizer. Detects frequent patterns and replaces them
with some more powerful vector-like pipeline instructions without any
user effort. Executes at instruction translation, not at run-time.
pipeline: introduce SWX jump and return instructions
The jump instructions are either unconditional (jmp) or conditional on
positive/negative tests such as header validity (jmpv/jmpnv), table
lookup hit/miss (jmph/jmpnh), executed action (jmpa/jmpna), equality
(jmpeq/jmpneq), comparison result (jmplt/jmpgt). The return
instruction resumes the pipeline execution after action subroutine.
The extern instruction calls one of the member functions of a given
extern object or it calls the given extern function. The function
arguments must be written in advance to the mailbox. The results
are available in the same place after execution.
The table instruction looks up the input key into the table and then
it triggers the execution of the action found in the table entry. On
lookup miss, the default table action is executed.
The shr (i.e. shift right) instruction source can be header field (H),
meta-data field (M), extern object (E) or function (F) mailbox field,
table entry action data field (T) or immediate value (I). The
destination is HMEF.
The shl (i.e. shift left) instruction source can be header field (H),
meta-data field (M), extern object (E) or function (F) mailbox field,
table entry action data field (T) or immediate value (I). The
destination is HMEF.
The xor (i.e. bitwise exclusive or) instruction source can be header
field (H), meta-data field (M), extern object (E) or function (F)
mailbox field, table entry action data field (T) or immediate value
(I). The destination is HMEF.
The or (i.e. bitwise or) instruction source can be header field (H),
meta-data field (M), extern object (E) or function (F) mailbox field,
table entry action data field (T) or immediate value (I). The
destination is HMEF.
The and (i.e. bitwise and) instruction source can be header field (H),
meta-data field (M), extern object (E) or function (F) mailbox field,
table entry action data field (T) or immediate value (I). The
destination is HMEF.
The ckadd (i.e. checksum add) instruction is used to either compute,
verify or update the 1's complement sum commonly used by protocols
such as IPv4, TCP or UDP.
The sub (i.e. subtract) instruction source can be header field (H),
meta-data field (M), extern object (E) or function (F) mailbox field,
table entry action data field (T) or immediate value (I). The
destination is HMEF.
The add instruction source can be header field (H), meta-data field
(M), extern object (E) or function (F) mailbox field, table entry
action data field (T) or immediate value (I). The destination is HMEF.
The DMA instruction handles the bulk read transfer of one header from
the table entry action data. Typically used to generate headers, i.e.
headers that are not extracted from the input packet.
The mov (i.e. move) instruction source can be header field (H),
meta-data field (M), extern object (E) or function (F) mailbox field,
table entry action data field (T) or immediate value (I). The
destination is HMEF.
pipeline: add header validate and invalidate SWX instructions
Add instructions to flag a header as valid or invalid. This flag can
be tested by the jmpv (jump if header valid) and jmpnv (jump if header
not valid) instructions.
Add header emit and packet transmission instructions. Emit adds to the
output packet a header that is either generated (e.g. read from table
entry by action) or extracted from the input packet. Tx ends the
pipeline processing; discard is implemented by tx to special port.
Add packet reception and header extraction instructions. The Rx must
be the first pipeline instruction. Each extracted header is logically
removed from the packet, then it can be read/written by instructions,
emitted into the outgoing packet or discarded.
The SWX pipeline instructions represent the main program that defines
the life of the packet. As packets go through tables that trigger
action subroutines, the headers and meta-data get transformed along
the way.
Add tables to the SWX pipeline. The match fields are flexibly selected
from the headers and meta-data. The set of table actions is flexibly
selected for each table from the set of pipeline actions.
Add SWX actions that are dynamically-defined through instructions as
opposed to pre-defined. The actions are subroutines of the pipeline
program that triggered by table lookup. The input arguments are the
action data from the table entry (format defined by struct), the
headers and meta-data are in/out.
Add extern objects and functions to plug into the SWX pipeline any
functionality that cannot be efficiently implemented with existing
instructions, e.g. special checksum/ECC, crypto, meters, stats arrays,
heuristics, etc. In/out arguments are passed through mailbox with
format defined by struct.
Add support for dynamically-defined packet headers and meta-data to
the SWX pipeline. The header and meta-data format are defined by the
struct type they instantiate.
Add output ports to the newly introduced SWX pipeline type. Each port
instantiates a port type that defines the port operations, e.g. ethdev
port, PCAP port, etc. The TX interface is single packet, with packet
batching internally for performance.
Add input ports to the newly introduced SWX pipeline type. Each port
instantiates a port type that defines the port operations, e.g. ethdev
port, PCAP port, etc. The RX interface is single packet, with packet
batching internally for performance.
Add new improved Software Switch (SWX) pipeline type that supports
dynamically-defined packet headers, meta-data, actions and pipelines.
Actions and pipelines are defined through instructions.
Ciara Power [Mon, 21 Sep 2020 13:59:13 +0000 (14:59 +0100)]
app: remove references to make-based config
Make is no longer supported, RTE_SDK, RTE_TARGET and CONFIG options
are no longer in use.
Signed-off-by: Ciara Power <ciara.power@intel.com> Reviewed-by: Kevin Laatz <kevin.laatz@intel.com> Acked-by: Nicolas Chautru <nicolas.chautru@intel.com>
Thomas Monjalon [Wed, 30 Sep 2020 17:20:18 +0000 (19:20 +0200)]
doc: fix references to removed guide
The page "Development Kit Build System" was about make,
so it has been removed. A better help is in the Linux guide
(note: mlx4/mlx5 are supported on Linux only for now).
Fixes: 3cc6ecfdfe85 ("build: remove makefiles") Signed-off-by: Thomas Monjalon <thomas@monjalon.net> Acked-by: David Marchand <david.marchand@redhat.com> Acked-by: Ciara Power <ciara.power@intel.com>
Juraj Linkeš [Fri, 28 Aug 2020 11:45:37 +0000 (13:45 +0200)]
ci: add tests jobs in aarch64 vm
Tests requiring hugepages do not work outside of VM environment because
of security limitations. Add aarch64 builds which run tests to run in
a VM to avoid these limitations. Leave non-hugepage environments since
the tests may produce different results in hugepage and non-hugepage
environments.
Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> Acked-by: Aaron Conole <aconole@redhat.com>
Steven Lariau [Fri, 25 Sep 2020 17:43:39 +0000 (18:43 +0100)]
stack: relax pop CAS ordering
Replace the store-release by relaxed for the CAS success at the end of
pop. Release isn't needed, because there is not write to data that need
to be synchronized.
The only preceding write is when the length is decreased, but the length
CAS loop already ensures the right synchronization.
The situation to avoid is when a thread sees the old length but the new
list, that doesn't have enough items for pop to success.
But the CAS success on length before the pop loop ensures any core reads
and updates the latest length, preventing this situation.
The store-release is also used to make sure that the items are read
before the head is updated, in order to prevent a core in pop to read an
incorrect value because another core rewrites it with push.
But this isn't needed, because items are read only when removed from the
used list. Right after this, they are pushed to the free list, and the
store-release in push makes sure the items are read before they are
visible in the free list.
Signed-off-by: Steven Lariau <steven.lariau@arm.com> Reviewed-by: Dharmik Thakkar <dharmik.thakkar@arm.com> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> Acked-by: Gage Eads <gage.eads@intel.com>
Steven Lariau [Fri, 25 Sep 2020 17:43:38 +0000 (18:43 +0100)]
stack: reload head when pop fails
List head must be loaded right before continue (when failed to
find the new head).
Without this, one thread might keep trying and failing to pop items
without ever loading the new correct head.
Steven Lariau [Fri, 25 Sep 2020 17:43:37 +0000 (18:43 +0100)]
stack: remove redundant orderings on pop
The load-acquire of list->len on pop function is redundant.
Only the CAS success needs to be load-acquire.
It synchronizes with the store release in push, to ensure that the
updated head is visible when the new length is visible.
Without this, one thread in pop could see the increased length but the
old list, which doesn't have enough items yet for pop to succeed.
Signed-off-by: Steven Lariau <steven.lariau@arm.com> Reviewed-by: Dharmik Thakkar <dharmik.thakkar@arm.com> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> Acked-by: Gage Eads <gage.eads@intel.com>
Steven Lariau [Fri, 25 Sep 2020 17:43:36 +0000 (18:43 +0100)]
stack: remove acquire fence on push
An acquire fence is used to make sure loads after the fence can observe
all store operations before a specific store-release.
But push doesn't read any data, except for the head which is part of a
CAS operation (the items on the list are not read).
So there is no need for the acquire barrier.
Signed-off-by: Steven Lariau <steven.lariau@arm.com> Reviewed-by: Dharmik Thakkar <dharmik.thakkar@arm.com> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> Acked-by: Gage Eads <gage.eads@intel.com>
Steven Lariau [Fri, 25 Sep 2020 17:43:35 +0000 (18:43 +0100)]
stack: fix inconsistent weak/strong CAS
Fix cmpexchange usage of weak / strong.
The generated code is the same on x86 and ARM (there is no weak
cmpexchange), but the old usage was inconsistent.
For push and pop update size, weak is used because cmpexchange is inside
a loop.
For pop update root, strong is used even though cmpexchange is inside a
loop, because there may be a lot of operations to do in a loop iteration
(locate the new head).
Signed-off-by: Steven Lariau <steven.lariau@arm.com> Reviewed-by: Dharmik Thakkar <dharmik.thakkar@arm.com> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> Acked-by: Gage Eads <gage.eads@intel.com>
Steven Lariau [Wed, 12 Aug 2020 19:18:47 +0000 (20:18 +0100)]
test/stack: remove thread synchronisation
Remove the part that checks if there is enough room in the stack, it's
always true as long as size of stack >= MAX_BULK*rte_lcore_count().
This check used an atomic cmpset, and read / write to a shared size
variable. These operations result in some form of synchronization
that might get in the way of the actual stack testing.
Signed-off-by: Steven Lariau <steven.lariau@arm.com> Reviewed-by: Dharmik Thakkar <dharmik.thakkar@arm.com> Reviewed-by: Phil Yang <phil.yang@arm.com> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> Acked-by: Gage Eads <gage.eads@intel.com>
Steven Lariau [Wed, 12 Aug 2020 19:18:46 +0000 (20:18 +0100)]
test/stack: check errors for multi-threads
Use rte_eal_wait_lcore to wait and get the return value for all cores.
This is used to propagate any error to the main core.
Signed-off-by: Steven Lariau <steven.lariau@arm.com> Reviewed-by: Dharmik Thakkar <dharmik.thakkar@arm.com> Reviewed-by: Phil Yang <phil.yang@arm.com> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> Acked-by: Gage Eads <gage.eads@intel.com>
Steven Lariau [Wed, 12 Aug 2020 19:18:44 +0000 (20:18 +0100)]
test/stack: remove unneeded memory allocations
Replace the arguments array by one argument.
All objects in the args array have the same values, so there is no need
to use an array, only one struct is enough.
The args object is a lot smaller, and the allocation can be replaced
with a global variable.
As a consequence of using a single argument, there is no need to use a
loop to launch the test on every core one by one. Replace it with
rte_eal_mp_remote_launch.
The allocation of obj_table isn't needed either, because MAX_BULK is
small. The allocation can instead be replaced with a static array.
Signed-off-by: Steven Lariau <steven.lariau@arm.com> Reviewed-by: Dharmik Thakkar <dharmik.thakkar@arm.com> Reviewed-by: Phil Yang <phil.yang@arm.com> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> Acked-by: Gage Eads <gage.eads@intel.com>
David Marchand [Tue, 29 Sep 2020 12:12:22 +0000 (14:12 +0200)]
ethdev: fix link speed helper documentation
When generating the documentation, a new warning can be seen:
.../dpdk/lib/librte_ethdev/rte_ethdev.h:2441:
warning: argument 'link_speed' of command @param is not found in the
argument list of rte_eth_link_speed_to_str(uint32_t speed_link)
.../dpdk/lib/librte_ethdev/rte_ethdev.h:2455: warning: The following
parameters of rte_eth_link_speed_to_str(uint32_t speed_link) are not
documented: parameter 'speed_link'
Align the function prototype to its doxygen description.
Fixes: fbf931c9c392 ("ethdev: format link status text") Signed-off-by: David Marchand <david.marchand@redhat.com> Acked-by: Andrew Rybchenko <arybchenko@solarflare.com>
Bruce Richardson [Tue, 29 Sep 2020 16:55:02 +0000 (17:55 +0100)]
doc: make doxygen comply with meson werror option
When the --werror meson build option is set, we can set the WARN_AS_ERRORS
doxygen option in the doxygen config flag to get the same behaviour for API
doc building as for building the rest of DPDK. This can help catch
documentation errors sooner in the development process.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Bruce Richardson [Tue, 29 Sep 2020 16:55:00 +0000 (17:55 +0100)]
doc: hide sphinx standard output
To see only errors and warnings from the doc builds, we can send the
standard output text to a logfile and have only the stderr messages
printed. This is similar to what is done for the API documentation.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Bruce Richardson [Tue, 29 Sep 2020 16:54:59 +0000 (17:54 +0100)]
doc: put doxygen log file in build directory
The meson documentation states that projects should not rely upon the
custom_target build commands are run from any given directory. Therefore,
rather than writing the standout output from doxygen to the current
directory - which could be anywhere in future, put it into the api
directory, so that it is in a known location.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Bruce Richardson [Tue, 29 Sep 2020 16:54:58 +0000 (17:54 +0100)]
doc: align doxygen output folder with sphinx guides
The API docs were output to "<build>/doc/api/api" folder, which was
ugly-looking with the repeated "api", and inconsistent with the sphinx
guides which were written to "<build>/doc/guides/html". Changing the
doxygen output folder to "html" fixes both these issues.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Bruce Richardson [Tue, 29 Sep 2020 16:54:57 +0000 (17:54 +0100)]
doc: hide verbose doxygen standard output
The standard output of doxygen is very verbose, and since ninja mixes
stdout and stderr together it makes it difficult to see any warnings from
the doxygen run. Therefore, we can just log the standard output to file,
and only output the stderr to make warnings clear.
Suggested-by: Thomas Monjalon <thomas@monjalon.net> Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Ferruh Yigit [Mon, 17 Aug 2020 10:32:47 +0000 (11:32 +0100)]
kni: fix build with Linux 5.9
Starting from Linux 5.9 'get_user_pages_remote()' API doesn't get
'struct task_struct' parameter:
commit 64019a2e467a ("mm/gup: remove task_struct pointer for all gup code")
The change reflected to the KNI with version check.
Fan Zhang [Mon, 28 Sep 2020 10:59:18 +0000 (11:59 +0100)]
vhost/crypto: fix possible TOCTOU attack
This patch fixes the possible time-of-check to time-of-use (TOCTOU)
attack problem by copying request data and descriptor index to local
variable prior to process.
Also the original sequential read of descriptors may lead to TOCTOU
attack. This patch fixes the problem by loading all descriptors of a
request to local buffer before processing.
Fan Zhang [Mon, 28 Sep 2020 10:59:17 +0000 (11:59 +0100)]
vhost/crypto: fix data length check
This patch fixes the incorrect data length check to vhost crypto.
Instead of blindly accepting the descriptor length as data length, the
change compare the request provided data length and descriptor length
first. The security issue CVE-2020-14374 is not fixed alone by this
patch, part of the fix is done through:
"vhost/crypto: fix missed request check for copy mode".
Fan Zhang [Mon, 28 Sep 2020 10:59:14 +0000 (11:59 +0100)]
vhost/crypto: fix descriptor deduction
This patch fixes the incorrect descriptor deduction for vhost crypto.
CVE-2020-14378 Fixes: 16d2e718b8ce ("vhost/crypto: fix possible out of bound access") Cc: stable@dpdk.org Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com> Acked-by: Chenbo Xia <chenbo.xia@intel.com>
Maxime Coquelin [Wed, 23 Sep 2020 09:49:02 +0000 (11:49 +0200)]
vhost: fix external backends readiness
Commit d0fcc38f5fa4 ("vhost: improve device readiness notifications")
makes the assumption that every Virtio devices are considered
ready for preocessing as soon as first queue pair is configured
and enabled.
While this is true for Virtio-net, it isn't for Virtio-scsi
and Virtio-blk.
This patch fixes this by only making this assumption for
the builtin Virtio-net backend, and restores back to previous
behaviour for other backends.
Fixes: d0fcc38f5fa4 ("vhost: improve device readiness notifications") Reported-by: Changpeng Liu <changpeng.liu@intel.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@redhat.com> Signed-off-by: Changpeng Liu <changpeng.liu@intel.com> Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
When the BAR contains MSI-X table, pci_vfio_mmap_bar() tries to skip
the table and map the rest. "map around it" is the phrase used in the
source. The function splits the BAR into two regions: the region
before the table (first part or memreg[0]) and the region after the
table (second part or memreg[1]).
For hardware that has MSI-X vector table offset 0, the first part does
not exist (memreg[0].size == 0).
The mapping part of the function maps the first part, if it
exists. Then, it maps the second part, if it exists and "if mapping the
first part succeeded".
The recent change that replaces MAP_FAILED with NULL breaks the "if
mapping the first part succeeded" condition (1) in the snippet below.
void *map_addr = NULL;
if (memreg[0].size) {
/* actual map of first part */
map_addr = pci_map_resource(...);
}
/* if there's a second part, try to map it */
if (map_addr != NULL // -- (1)
&& memreg[1].offset && memreg[1].size) {
[...]
}
if (map_addr == NULL) {
RTE_LOG(ERR, EAL, "Failed to map pci BAR%d\n",
bar_index);
return -1;
}
When the first part does not exist, (1) sees map_addr is still NULL,
and the function fails. This behavior is a regression and fails
probing hardware with vector table offset 0.
Previously, (1) was "map_addr != MAP_FAILED", which meant
pci_map_resource() was actually attempted and failed. So, expand (1)
to check if the first part exists as well, to match the semantics of
MAP_FAILED.
Bugzilla ID: 539 Fixes: e200535c1ca3 ("mem: drop mapping API workaround") Signed-off-by: Hyong Youb Kim <hyonkim@cisco.com> Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Phil Yang [Thu, 24 Sep 2020 05:39:28 +0000 (13:39 +0800)]
ethdev: use C11 atomics for link status
Since rte_atomicXX APIs are not allowed to be used, use C11 atomic
builtins for link status update.
Signed-off-by: Phil Yang <phil.yang@arm.com> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Acked-by: Andrew Rybchenko <arybchenko@solarflare.com>
Phil Yang [Thu, 24 Sep 2020 05:39:27 +0000 (13:39 +0800)]
power: use C11 atomics for power state
Since rte_atomicXX APIs are not allowed to be used, use C11 atomic
builtins for power in use state update.
Signed-off-by: Phil Yang <phil.yang@arm.com> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Acked-by: David Hunt <david.hunt@intel.com>
Phil Yang [Thu, 24 Sep 2020 05:39:26 +0000 (13:39 +0800)]
bbdev: use C11 atomics for device processing counter
Since rte_atomicXX APIs are not allowed to be used, use C11 atomic builtins
for device processing counter.
Signed-off-by: Phil Yang <phil.yang@arm.com> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Acked-by: Nicolas Chautru <nicolas.chautru@intel.com>
Phil Yang [Thu, 24 Sep 2020 05:39:25 +0000 (13:39 +0800)]
eal: use C11 atomics for initialization check
Since rte_atomicXX APIs are not allowed to be used, use C11 builtins to
check if EAL is already initialized.
Signed-off-by: Phil Yang <phil.yang@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Radu Nicolau [Thu, 24 Sep 2020 08:18:29 +0000 (08:18 +0000)]
build: remove deprecated cpuflag macros
Replace use of RTE_MACHINE_CPUFLAG macros with regular compiler
macros, which are more complete than those provided by DPDK, and as such
it allows new instruction sets to be leveraged without having to do
extra work to set them up in DPDK.
Signed-off-by: Sean Morrissey <sean.morrissey@intel.com> Signed-off-by: Radu Nicolau <radu.nicolau@intel.com> Acked-by: David Marchand <david.marchand@redhat.com>
git.droids-corp.org / dpdk.git / log