Junxiao Shi [Thu, 9 Sep 2021 14:42:06 +0000 (14:42 +0000)]
net/memif: fix chained mbuf determination
Previously, TX functions call rte_pktmbuf_is_contiguous to determine
whether an mbuf is chained. However, rte_pktmbuf_is_contiguous is
designed to work on the first mbuf of a packet only. In case a packet
contains three or more segment mbufs in a chain, it may cause truncated
packets or rte_mbuf_sanity_check panics.
This patch updates TX functions to determine chained mbufs using
mbuf_head->nb_segs field, which works in all cases. Moreover, it
maintains that the second cacheline is only accessed when chained mbuf
is actually present.
Fixes:
09c7e63a71f9 ("net/memif: introduce memory interface PMD")
Fixes:
43b815d88188 ("net/memif: support zero-copy slave")
Cc: stable@dpdk.org
Signed-off-by: Junxiao Shi <git@mail1.yoursunny.com>
Reviewed-by: Jakub Grajciar <jgrajcia@cisco.com>
Thomas Monjalon [Mon, 30 Aug 2021 10:42:32 +0000 (12:42 +0200)]
ethdev: group constant definitions in Doxygen
A lot of flags are parts of a group but are documented alone.
The Doxygen syntax @{ and @} for grouping is used
to make flags appear together and have a common description.
Some Rx/Tx offload flags and RSS definitions are not grouped
because they need to be all properly documented first.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Kevin Traynor <ktraynor@redhat.com>
Dmitry Kozlyuk [Wed, 1 Sep 2021 08:07:52 +0000 (11:07 +0300)]
net/mlx5: fix shared RSS destruction
Shared RSS resources were released before checking that the shared RSS
has no more references. If it had, the destruction was aborted, leaving
the shared RSS in an invalid state where it could no longer be used.
Move reference counter check before resource release.
Fixes:
d2046c09aa64 ("net/mlx5: support shared action for RSS")
Cc: stable@dpdk.org
Signed-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Dmitry Kozlyuk [Wed, 1 Sep 2021 08:19:58 +0000 (11:19 +0300)]
net/mlx5: fix flow indirect action reference counting
When an indirect action is used in a flow rule with a pattern that
causes RSS expansion, each device flow generated by the expansion
incremented the reference counter of the action. When such a flow was
destroyed, its action reference counter had been decremented only once.
The action remained marked as being used and could not be destroyed.
COUNT, AGE, and CONNTRACK indirect actions have been affected
(for AGE the error was not immediately observable).
Increment action counter only once for the original flow rule.
Fixes:
81073e1f8ce1 ("net/mlx5: support shared age action")
Fixes:
2d084f69aa26 ("net/mlx5: add translation of connection tracking action")
Fixes:
f3191849f2c2 ("net/mlx5: support flow count action handle")
Cc: stable@dpdk.org
Signed-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Dmitry Kozlyuk [Wed, 1 Sep 2021 08:19:57 +0000 (11:19 +0300)]
net/mlx5: report error on indirect CT action destroy
When an indirect CT action of mlx5 PMD could not be destroyed,
rte_action_handle_destroy() was returning (-1), but the error
structure was not filled. This lead to a segfault in testpmd
on an attempt to print it. Fill the details for each possible
cause of this error.
Fixes:
c5a49265fc23 ("net/mlx5: add ASO connection tracking destroy")
Cc: stable@dpdk.org
Signed-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Michael Baum [Sun, 12 Sep 2021 10:36:28 +0000 (13:36 +0300)]
common/mlx5: fix resource cleaning in device removal
The common remove function call in a loop to remove function for each
driver which have been registered.
If all removes are succeeded, it return 0 without to free the device
which allocated in probe function. Otherwise, it free the device.
In fact we expect exactly the opposite behavior. If all removes are
failed, it returns error without freeing the device which allocated in
probe function. Otherwise, it free the device and return 0.
Replace it with the correct behavior.
Fixes:
8a41f4deccc3 ("common/mlx5: introduce layer for multiple class drivers")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Michael Baum [Sun, 12 Sep 2021 10:36:27 +0000 (13:36 +0300)]
common/mlx5: fix device list operations concurrency
The mlx5 common driver has a global list of mlx5 devices which are
probed.
In probe function it creates one and insert it to the list. Similarly it
removes the device in remove function.
These operations are not safe as there can be such operations in
parallel, by different threads.
Add global lock for the list and use it to insert or remove.
Fixes:
8a41f4deccc3 ("common/mlx5: introduce layer for multiple class drivers")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Michael Baum [Sun, 12 Sep 2021 10:36:26 +0000 (13:36 +0300)]
common/mlx5: fix class combination validation
The common probe function gets as a user argument the classes it should
create, and checks whether the combination is valid.
In case the device already exists, it checks the integration of the
above with the classes that the device has.
However, the function does not check the combination when the device
does not exist and it has to create it.
Check if the combination is valid for all cases.
Fixes:
ad435d320473 ("common/mlx5: add bus-agnostic layer")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Michael Baum [Sun, 12 Sep 2021 10:36:25 +0000 (13:36 +0300)]
net/mlx5: fix duplicate pattern option default
In order to allow/disallow configuring rules with identical patterns,
the new device argument 'allow_duplicate_pattern' was introduced.
The default is to allow, and it is initialized to 1 in PCI probe
function.
However, on auxiliary bus probing (for Sub-Function) it is not
initialized at all, so it's actually initialized to 0.
Move the initialization to default config function which is called from
both.
Fixes:
919488fbfa71 ("net/mlx5: support Sub-Function")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Michael Baum [Sun, 12 Sep 2021 10:36:24 +0000 (13:36 +0300)]
net/mlx5: fix PF leak on PCI probing failure
During PCI probe, the internal probe function is called per PF.
If one of them fails, it was missing a proper destroy for the previously
probed PFs.
This fixes the behavior by destroying all previously probed PFs.
Fixes:
08c2772fc747 ("net/mlx5: support list of representor PF")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Michael Baum [Sun, 12 Sep 2021 10:36:23 +0000 (13:36 +0300)]
net/mlx5: fix memory leak on context allocation failure
In shared device context creation, there is a missing validation when
one of the btree memory allocation fails that will cause a memory leak.
This adds a proper check to clean resources in case of failure.
Fixes:
632f0f19056f ("net/mlx5: manage shared counters in three-level table")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Kishore Padmanabha [Mon, 20 Sep 2021 07:42:14 +0000 (13:12 +0530)]
net/bnxt: add enhancements to TruFlow ULP
1. Added support to specify l4 port masks in the template. Also enabled
source mac in the wild card key for ingress flows.
2. Added support to enable offload for ipv6 traffic within the vxlan
tunnel connection.
3. The flow counters is reduced from 7168 to 6912 for Whitney.
The stats operation is updated to reflect counts for packets
at egress from CFA instead of ingress to CFA
4. The miss path for the l2 context table is updated with correct
parif and default action handler to handle the miss path for
egress flows.
5. This support enables allocation of encapsulation, modification and
action records dynamically based on a given flow actions.
6. Reduce the l2context resource requests during open_session. Move the
SMAC from the L2Context to the EM/WM
7. Remap the parif in the bd action in order to eliminate incorrect
replication of broadcast packets. The layer 4 source port mask
was incorrectly updated in the outer layer 4 source port mask
instead of inner layer 4. Add the l3 proto to egress rules, switch
to using computed fields for l4 ports, add internal smac to f1/f2
flows, add l3 proto to ingress ipv6 flows
Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Mike Baucom <michael.baucom@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Farah Smith [Mon, 20 Sep 2021 07:42:13 +0000 (13:12 +0530)]
net/bnxt: add SRAM manager shared session
Fix shared session support issues due to SRAM manager
additions. Shared session does not support slices within
RM blocks. Calculate resources required without slices
and determine base addresses using old methods for the
shared session.
Signed-off-by: Farah Smith <farah.smith@broadcom.com>
Reviewed-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Reviewed-by: Shahaji Bhosle <sbhosle@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Randy Schacher [Mon, 20 Sep 2021 07:42:12 +0000 (13:12 +0530)]
net/bnxt: allocate space dynamically for EM defrag
The dynamic pool allocation defrag function currently uses stack
allocation. To improve use of stack space, dynamically allocate
and deallocate memory for use to defragment the dynamic pool of
EM resources.
Signed-off-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Peter Spreadborough <peter.spreadborough@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Farah Smith [Mon, 20 Sep 2021 07:42:11 +0000 (13:12 +0530)]
net/bnxt: decrease log level of a debug message
Adjust info message to debug level to prevent excessive
logging.
Signed-off-by: Farah Smith <farah.smith@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Kishore Padmanabha [Mon, 20 Sep 2021 07:42:10 +0000 (13:12 +0530)]
net/bnxt: add flow templates for Thor
1. Add support for egress flows with port and count action for
Thor platform.
2. Added templates to support VXLAN encapsulation feature for Thor.
3. Added support for VXLAN decap and VLAN pop actions along with
the ingress flow.
4. Added templates to enable VXLAN decap support for f1 and f2 flows.
5. Added templates Thor VF Rep support
6. Added Thor ingress mod table actions for NAT, NAPT, and TTL.
7. Added mirror/sample table support
8. Added supported for IPv6 flows for Thor.
Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Mike Baucom <michael.baucom@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Shahaji Bhosle <sbhosle@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Kishore Padmanabha [Mon, 20 Sep 2021 07:42:09 +0000 (13:12 +0530)]
net/bnxt: add wildcard TCAM byte order for Thor
The wild card TCAM for Thor platform is different from the profile TCAM
byte order.
Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Shuanglin Wang <shuanglin.wang@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Kishore Padmanabha [Mon, 20 Sep 2021 07:42:08 +0000 (13:12 +0530)]
net/bnxt: support dynamic encap action
The encapsulation record processing is enhanced to handle data
dynamically. Different combinations of VXLAN encapsulation using
no VLAN or single or double VLAN can be supported and also supports
both IPv4 and IPv6 versions.
Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Kishore Padmanabha [Mon, 20 Sep 2021 07:42:07 +0000 (13:12 +0530)]
net/bnxt: support tunnel offload
Add support for tunnel offload APIs. Specifically the following
are supported.
tunnel_decap_set, tunnel_match, tunnel_action_decap_release,
tunnel_item_release.
This provides support for VXLAN decap action where two flows
can indicate tunnel offload rule. The first flow indicates the
tunnel properties and second flow indicates the inner packet
structure. The templates are updated to support this
feature.
Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Shahaji Bhosle <sbhosle@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Kishore Padmanabha [Mon, 20 Sep 2021 07:42:06 +0000 (13:12 +0530)]
net/bnxt: support flow template for Thor
Template adds non-VFR based support for testpmd with:
matches to include
- DMAC, SIP, DIP, Proto, Sport, Dport
- SIP, DIP, Proto, Sport, Dport
actions:
- count, drop
Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Farah Smith [Mon, 20 Sep 2021 07:42:05 +0000 (13:12 +0530)]
net/bnxt: add SRAM manager model
The SRAM manager supports allocation and free of variable sized
records within SRAM memory. These record sizes are 8, 16, 32, or
64B. The SRAM manager algorithm will not fragment memory during
run time. Previous implementation only included fixed size 64B
records regardless of the size required.
Signed-off-by: Farah Smith <farah.smith@broadcom.com>
Reviewed-by: Shahaji Bhosle <sbhosle@broadcom.com>
Reviewed-by: Peter Spreadborough <peter.spreadborough@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Jay Ding [Mon, 20 Sep 2021 07:42:04 +0000 (13:12 +0530)]
net/bnxt: support flow meter drop counter
This patch adds flow meter drop counter support for Thor.
Signed-off-by: Jay Ding <jay.ding@broadcom.com>
Reviewed-by: Farah Smith <farah.smith@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Peter Spreadborough [Mon, 20 Sep 2021 07:42:03 +0000 (13:12 +0530)]
net/bnxt: enable dynamic pool allocator
Enable dynamic entry allocator for Exact Match SRAM entries.
Deprecate static entry allocator code.
Signed-off-by: Peter Spreadborough <peter.spreadborough@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Farah Smith [Mon, 20 Sep 2021 07:42:02 +0000 (13:12 +0530)]
net/bnxt: update TruFlow core index table
Update the TruFlow core index table and
remove unused shadow table functionality.
Signed-off-by: Farah Smith <farah.smith@broadcom.com>
Reviewed-by: Peter Spreadborough <peter.spreadborough@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Ashwin Sekhar T K [Fri, 17 Sep 2021 11:23:09 +0000 (16:53 +0530)]
common/cnxk: align NPA stack to ROC cache line size
Network Pool accelerator (NPA) is part of ROC (Rest Of Chip). So
NPA structures should be aligned to ROC Cache line size and not
CPU cache line size.
Non alignment of NPA stack to ROC cache line will result in
undefined runtime NPA behaviour.
Fixes:
f765f5611240 ("common/cnxk: add NPA pool HW operations")
Cc: stable@dpdk.org
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Harman Kalra [Mon, 20 Sep 2021 14:49:25 +0000 (20:19 +0530)]
net/octeontx: fix access to indirect buffers
Issue has been observed where fields of indirect buffers are
accessed after being set free by the diver. Also fixing freeing
of direct buffers to correct aura.
Fixes:
5cbe184802aa ("net/octeontx: support fast mbuf free")
Cc: stable@dpdk.org
Signed-off-by: David George <david.george@sophos.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Ashwin Sekhar T K [Fri, 17 Sep 2021 09:34:37 +0000 (15:04 +0530)]
common/cnxk: avoid using stashing option of stype
Avoid using stashing option of stype in NPA in cn10k-a0 stepping.
This is a workaround for a HW Errata due to which NPA stashing operations
will never result in writing the data into L2 cache. But instead, it will
be written into LLC.
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Ashwin Sekhar T K [Fri, 17 Sep 2021 09:34:36 +0000 (15:04 +0530)]
common/cnxk: update ROC models
Made following updates to ROC (Rest of Chip) models.
- Use consistent upper/lower case in macros defining different
ROC models.
- Add API to detect cn96 Cx stepping.
- Make all current cn10k models as A0 stepping.
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Yuying Zhang [Sat, 18 Sep 2021 06:49:30 +0000 (06:49 +0000)]
net/ice: fix flow priority support in non-pipeline mode
Lower values denote higher priority with 0 as the maximum.
The usage of priority in non-pipeline mode is wrong.
This patch fixed this issue in switch filter and added input
validation of priority in FDIR, RSS and ACL filter which
only support one priority level.
Fixes:
2321e34c23b3 ("net/ice: support flow priority for DCF switch filter")
Cc: stable@dpdk.org
Signed-off-by: Yuying Zhang <yuying.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Robin Zhang [Wed, 25 Aug 2021 08:34:35 +0000 (08:34 +0000)]
net/iavf: enable interrupt polling
For VF hosted by Intel 700 series NICs, internal Rx interrupt and adminq
interrupt share the same source, that cause a lot CPU cycles be wasted on
interrupt handler on Rx path.
The patch disable PCI interrupt and remove the interrupt handler, replace
it with a low frequency(50ms) interrupt polling daemon which is
implemented by registering an alarm callback periodically.
The virtual channel capability bit VIRTCHNL_VF_OFFLOAD_WB_ON_ITR can be
used to negotiate if iavf PMD needs to enable background alarm or not, so
ideally this change will not impact the case hosted by Intel 800 series
NICS.
This patch implements the same logic with an early i40e commit:
commit
864a800d706d ("net/i40e: remove VF interrupt handler")
Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Pallavi Kadam <pallavi.kadam@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Wenjun Wu [Thu, 16 Sep 2021 05:04:27 +0000 (13:04 +0800)]
net/iavf: remove support for IP fragment default RSS
To support independent IP fragment default RSS, considerable
additional work need to be done, so we decide to remove this
feature to avoid some unexpected behavior we have observed,
meanwhile user always can use rte_flow to create RSS for IP
fragment packet explicitly.
Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Wenjun Wu [Thu, 16 Sep 2021 05:03:51 +0000 (13:03 +0800)]
net/ice: remove support for IP fragment default RSS
To support independent IP fragment default RSS, considerable
additional work need to be done, so we decide to remove this
feature to avoid some unexpected behavior we have observed,
meanwhile user always can use rte_flow to create RSS for IP
fragment packet explicitly.
Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Lingyu Liu [Mon, 13 Sep 2021 15:34:02 +0000 (15:34 +0000)]
net/iavf: fix QFI fields of GTPU UL/DL for flow director
Fix QFI (QoS Flow Identifier) fields matching of GTPU UL/DL for FDIR.
Fixes:
78e8a87f6324 ("net/iavf: fix GTPU UL and DL support for flow director")
Cc: stable@dpdk.org
Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Lingyu Liu <lingyu.liu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Qiming Chen [Thu, 16 Sep 2021 14:04:00 +0000 (22:04 +0800)]
net/iavf: fix mbuf leak
In the iavf_dev_rx_queue_start function, if the iavf_switch_queue
or iavf_switch_queue_lv function fails, the previously applied mbuf
is not released, resulting in leakage. The patch fixes the problem.
Fixes:
9cf9c02bf6ee ("net/iavf: add enable/disable queues for large VF")
Cc: stable@dpdk.org
Signed-off-by: Qiming Chen <chenqiming_huawei@163.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Simei Su [Wed, 15 Sep 2021 05:34:22 +0000 (13:34 +0800)]
net/ice: support 1PPS
The E810 supports four single-ended GPIO signals (SDP[20:23]). The 1PPS
signal outputs via SDP[20:23], which is measured by an oscilloscope.
This feature can be turned by a devargs which can select GPIO pin index
flexibly. Pin index 0 means SDP20, pin index 1 means SDP21 and so on.
The example for test command is as below:
./build/app/dpdk-testpmd -a af:00.0,pps_out='[pin:2]' -c f -n 4 -- -i
Signed-off-by: Simei Su <simei.su@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Qi Zhang [Fri, 17 Sep 2021 14:43:22 +0000 (22:43 +0800)]
net/ice/base: add API for parser profile initialization
Add API ice_parser_profile_init to init a parser profile base on
a parser result and a mask buffer. The ice_parser_profile can feed to
low level FXP engine to create HW profile / field vector directly.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Fri, 17 Sep 2021 14:43:21 +0000 (22:43 +0800)]
net/ice/base: support tunnel port for parser
UDP tunnel can be added/deleted for vxlan, geneve, ecpri through
below APIs:
ice_parser_vxlan_tunnel_set
ice_parser_geneve_tunnel_set
ice_parser_ecpri_tunnel_set
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Fri, 17 Sep 2021 14:43:20 +0000 (22:43 +0800)]
net/ice/base: support double VLAN mode configure for parser
Add API ice_parser_dvm_set to support turn on/off parser's
double vlan mode.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Fri, 17 Sep 2021 14:43:19 +0000 (22:43 +0800)]
net/ice/base: add parser execution main loop
Implement function ice_parser_rt_execute which perform the main
loop of the parser.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Fri, 17 Sep 2021 14:43:18 +0000 (22:43 +0800)]
net/ice/base: add helper function to aggregate flags
Add internal helper function ice_xlt_kb_flg_get to aggregate 64 bit
packet flag into 16 bit key builder flags.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Fri, 17 Sep 2021 14:43:17 +0000 (22:43 +0800)]
net/ice/base: add helper function to redirect flags
Add internal helper function ice_flg_redirect to redirect parser flags
to packet flags.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Fri, 17 Sep 2021 14:43:16 +0000 (22:43 +0800)]
net/ice/base: add helper for ptype markers match
Add internal helper function ice_ptype_mk_tcam_match for ptype markers
matching in tcam table.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Fri, 17 Sep 2021 14:43:15 +0000 (22:43 +0800)]
net/ice/base: add helper for parse graph key matching
Add below two internal helper functions for parse graph key matching
in cam table:
ice_pg_cam_match
ice_pg_nm_cam_match
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Fri, 17 Sep 2021 14:43:14 +0000 (22:43 +0800)]
net/ice/base: add helper function for boost TCAM match
Add internal helper function ice_bst_tcam_match to perform ternary
match on boost TCAM.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Fri, 17 Sep 2021 14:43:13 +0000 (22:43 +0800)]
net/ice/base: add parser runtime skeleton
Add parser runtime data struct ice_parser_rt.
Add below APIs for parser runtime preparation:
ice_parser_rt_reset
ice_parser_rt_pkt_buf_set
Add below API skeleton for parser runtime execution:
ice_parser_rt_execute
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Fri, 17 Sep 2021 14:43:12 +0000 (22:43 +0800)]
net/ice/base: init XLT key builder for parser
Parse below DDP section into struct ice_xlt_kb:
ICE_SID_XLT_KEY_BUILDER_SW
ICE_SID_XLT_KEY_BUILDER_FD
ICE_SID_XLT_KEY_BUILDER_RSS
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Fri, 17 Sep 2021 14:43:11 +0000 (22:43 +0800)]
net/ice/base: init flag redirect table for parser
Parse DDP section ICE_SID_RXPARSER_FLAG_REDIR into an array of
ice_flag_rd_item.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Fri, 17 Sep 2021 14:43:10 +0000 (22:43 +0800)]
net/ice/base: init protocol group table for parser
Parse DDP section ICE_SID_RXPARSER_PROTO_GRP into an array of
ice_proto_grp_item.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Fri, 17 Sep 2021 14:43:09 +0000 (22:43 +0800)]
net/ice/base: init marker group table for parser
Parse DDP section ICE_SID_RXPARSER_MARKER_GRP into an array of
ice_mk_grp_item.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Fri, 17 Sep 2021 14:43:08 +0000 (22:43 +0800)]
net/ice/base: init ptype marker TCAM table for parser
Parse DDP section ICE_SID_RXPARSER_MARKER_PTYPE into an array of
ice_ptype_mk_tcam_item.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Fri, 17 Sep 2021 14:43:07 +0000 (22:43 +0800)]
net/ice/base: init boost TCAM table for parser
Parse DDP section ICE_SID_RXPARSER_CAM into an array of
ice_bst_tcam_item.
Parse DDP section ICE_SID_LBL_RXPARSER_TMEM into an array of
ice_lbl_item.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Fri, 17 Sep 2021 14:43:06 +0000 (22:43 +0800)]
net/ice/base: init parse graph CAM table for parser
Parse DDP section ICE_SID_RXPARSER_CAM or ICE_SID_RXPARSER_PG_SPILL
into an array of struct ice_pg_cam_item.
Parse DDP section ICE_SID_RXPARSER_NOMATCH_CAM or
ICE_SID_RXPARSER_NOMATCH_SPILL into an array of struct ice_pg_nm_cam_item.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Fri, 17 Sep 2021 14:43:05 +0000 (22:43 +0800)]
net/ice/base: init metainit table for parser
Parse DDP section ICE_SID_RXPARSER_METADATA_INIT into an array of
struct ice_metainit_item.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Fri, 17 Sep 2021 14:43:04 +0000 (22:43 +0800)]
net/ice/base: init IMEM table for parser
Parse DDP section ICE_SID_RXPARSER_IMEM into an array of
struct ice_imem_item.
The Instruction Memory (IMEM) section contains three VLIW instructions
for the ALUs, a key extraction instruction for the Parse Graph CAM, and
several other fields.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Fri, 17 Sep 2021 14:43:03 +0000 (22:43 +0800)]
net/ice/base: add parser create and destroy skeleton
Add new parser module which can parse a packet in binary
and generate information like ptype, protocol/offset pairs
and flags which can be used to feed the FXP profile creation
directly.
The patch added skeleton of the parser instance create and
destroy APIs:
ice_parser_create
ice_parser_destroy
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Thu, 16 Sep 2021 09:53:04 +0000 (17:53 +0800)]
net/ice/base: update auto-generated hardware register
Update ice_hw_autogen.h.
Remove duplicated one in ice_nvm.h.
Replace ICE_NVM_ACCESS_GL_HIBA_MAX with GL_HIBA_MAX_INDEX.
Signed-off-by: Scott W Taylor <scott.w.taylor@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Thu, 16 Sep 2021 09:53:03 +0000 (17:53 +0800)]
net/ice/base: support SMA controller
Add support for controlling SMA (SubMiniature version A) connectors
using GPIO get/set AQs.
Signed-off-by: Maciej Machnikowski <maciej.machnikowski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Thu, 16 Sep 2021 09:53:02 +0000 (17:53 +0800)]
net/ice/base: add get/set functions for shared parameters
Add functions used by the driver for setting and getting the shared
driver parameters. These will be used by the driver in order to share
the PTP clock index identifier between PF drivers.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Thu, 16 Sep 2021 09:53:01 +0000 (17:53 +0800)]
net/ice/base: add GCO defines and GCO flex descriptor
Added the memory needed for the generic checksum offload (GCO)
feature, including the new flex descriptor ICE_RXDID_GSC.
Signed-off-by: Alice Michael <alice.michael@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Thu, 16 Sep 2021 09:53:00 +0000 (17:53 +0800)]
net/ice/base: add helper to check for 100M speed support
Add a helper function to check if the underlying part can
support 100M speeds.
Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Thu, 16 Sep 2021 09:52:59 +0000 (17:52 +0800)]
net/ice/base: add package segment ID
DDP package format is shared with different devices, for E810 device
we only support SEGMENT_TYPE_ICE_810.
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Thu, 16 Sep 2021 09:52:58 +0000 (17:52 +0800)]
net/ice/base: allow tool access to manageability register
E810-T supports signed netlists and to support this, the NVM update
tool needs to be able to read the GL_MNG_DEF_DEVID register. Add
said register to the allowlist in ice_validate_nvm_rw_reg.
Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Thu, 16 Sep 2021 09:52:57 +0000 (17:52 +0800)]
net/ice/base: change address parameter to 16-bit
Change one of the input parameter (addr) in ice_read_cgu_reg_e822 and
ice_write_cgu_reg_e822 functions. This will avoid the shrink down
conversion from addr to cgu_msg.msg_addr_low.
Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Thu, 16 Sep 2021 09:52:56 +0000 (17:52 +0800)]
net/ice/base: allow to enable LAN and loopback in switch
Currently shared code API does not allow to set/unset lb_en
and lan_en flags for advanced rules during their creation.
Because of that we have to use a workaround in switchdev
which is to update rule immediately after its creation.
This change will allow us to set/unset those flags right
away.
Signed-off-by: Wojciech Drewek <wojciech.drewek@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Thu, 16 Sep 2021 09:52:55 +0000 (17:52 +0800)]
net/ice/base: use macro instead of open-coded division
For some operating systems, 64-bit division requires using specific
implementations. Use the DIV_64BIT macro to replace open-coded division
so that the driver may convert this to the appropriate operating-system
specific implementation when necessary.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Thu, 16 Sep 2021 09:52:54 +0000 (17:52 +0800)]
net/ice/base: include more E810T adapters
Expand the ice_is_e810t to include:
- Intel(R) Ethernet Network Adapter E810-C-Q2T
- Intel(R) Ethernet 25G 4P E810-XXV-st
Signed-off-by: Maciej Machnikowski <maciej.machnikowski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Qi Zhang [Thu, 16 Sep 2021 09:52:53 +0000 (17:52 +0800)]
net/ice/base: calculate logical PF ID
In some devices, the function numbers used are non-contiguous. For
example, some two port devices will report as functions 0 and 2.
When distributing RSS and FDIR masks, which are global resources across
the active devices, it is required to have a contiguous PF id, which can
be described as a logical PF id. In the case above, function 0 would
have a logical PF id of 0, and function 2 would have a logical PF id of
1.
Using logical PF id can properly describe which slice of resources can
be used by a particular PF.
Cc: stable@dpdk.org
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
Ivan Ilchenko [Wed, 15 Sep 2021 10:40:17 +0000 (13:40 +0300)]
net/sfc: fix getting accumulative SW xstat
Add missing initialisation of the accumulative SW xstat to
zero since it is sum of per-queue xstats.
Fixes:
fdd7719eb3c1 ("net/sfc: add xstats for Rx/Tx doorbells")
Cc: stable@dpdk.org
Signed-off-by: Ivan Ilchenko <ivan.ilchenko@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Alvin Zhang [Wed, 15 Sep 2021 05:47:04 +0000 (13:47 +0800)]
ethdev: add IPv4 and L4 checksum RSS offload types
This patch defines new RSS offload types for IPv4 and
L4(TCP/UDP/SCTP) checksum, which are required when users want
to distribute packets based on the IPv4 or L4 checksum field.
For example "flow create 0 ingress pattern eth / ipv4 / end
actions rss types ipv4-chksum end queues end / end", this flow
causes all matching packets to be distributed to queues on
basis of IPv4 checksum.
Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Reviewed-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Aman Deep Singh <aman.deep.singh@intel.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Dapeng Yu [Wed, 15 Sep 2021 05:08:02 +0000 (13:08 +0800)]
net/bonding: fix memory leak on closing device
If the bond device was created by vdev mode, the kvlist was not free
after the bond device was closed.
This patch fixes it.
Fixes:
144dc4739975 ("net/bonding: fix leak on remove")
Cc: stable@dpdk.org
Signed-off-by: Dapeng Yu <dapengx.yu@intel.com>
Acked-by: Min Hu (Connor) <humin29@huawei.com>
Anatoly Burakov [Fri, 10 Sep 2021 12:30:09 +0000 (12:30 +0000)]
mem: promote some shared memory config API to stable
As per ABI policy, move the formerly experimental API's to the stable
section.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Anatoly Burakov [Fri, 10 Sep 2021 12:30:08 +0000 (12:30 +0000)]
mem: promote DMA mask API to stable
As per ABI policy, move the formerly experimental API's to the stable
section.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Anatoly Burakov [Fri, 10 Sep 2021 12:30:07 +0000 (12:30 +0000)]
mem: promote external memory API to stable
As per ABI policy, move the formerly experimental API's to the stable
section.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Anatoly Burakov [Fri, 10 Sep 2021 12:30:06 +0000 (12:30 +0000)]
mem: promote memseg API to stable
As per ABI policy, move the formerly experimental API's to the stable
section.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Anatoly Burakov [Fri, 10 Sep 2021 12:30:05 +0000 (12:30 +0000)]
malloc: promote some experimental API to stable
As per ABI policy, move the formerly experimental API's to the stable
section.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Anatoly Burakov [Fri, 10 Sep 2021 12:30:04 +0000 (12:30 +0000)]
fbarray: promote experimental API to stable
As per ABI policy, move the formerly experimental API's to the stable
section.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Anatoly Burakov [Fri, 10 Sep 2021 12:30:03 +0000 (12:30 +0000)]
ipc: promote experimental API to stable
As per ABI policy, move the formerly experimental API's to the stable
section.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Tejasree Kondoj [Tue, 28 Sep 2021 12:07:41 +0000 (17:37 +0530)]
test/crypto: add tunnel header verification cases
Added test cases to verify tunnel header in IPsec inbound.
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Tejasree Kondoj [Tue, 28 Sep 2021 12:07:40 +0000 (17:37 +0530)]
common/cnxk: support tunnel header verification
Added support to verify tunnel header in IPsec inbound.
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Tejasree Kondoj [Tue, 28 Sep 2021 12:07:39 +0000 (17:37 +0530)]
security: add option to configure tunnel header verification
Add option to indicate whether outer header verification
need to be done as part of inbound IPsec processing.
With inline IPsec processing, SA lookup would be happening
in the Rx path of rte_ethdev. When rte_flow is configured to
support more than one SA, SPI would be used to lookup SA.
In such cases, additional verification would be required to
ensure duplicate SPIs are not getting processed in the inline path.
For lookaside cases, the same option can be used by application
to offload tunnel verification to the PMD.
These verifications would help in averting possible DoS attacks.
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Anoob Joseph [Tue, 28 Sep 2021 10:59:59 +0000 (16:29 +0530)]
examples/ipsec-secgw: clear soft expiry configuration
Soft expiry is not a mandatory IPsec feature. It is verified separately
with IPsec unit tests. So configuration of the same is not required.
Also, soft expiry tracking can cause perf degradation with some PMDs.
Since a separate UT is available and the same setting in ipsec-secgw is
not verifying the functionality, remove the same by clearing life
configuration.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Anoob Joseph [Tue, 28 Sep 2021 10:59:58 +0000 (16:29 +0530)]
test/crypto: add packet hard expiry cases
Add tests to validate packets hard expiry handling.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Anoob Joseph [Tue, 28 Sep 2021 10:59:57 +0000 (16:29 +0530)]
test/crypto: add packet soft expiry cases
Add tests to validate packets soft expiry handling.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Anoob Joseph [Tue, 28 Sep 2021 10:59:56 +0000 (16:29 +0530)]
crypto/octeontx2: add checks for life configuration
Lifetime tracking is not supported by hardware and is not implemented in
software either. Return failure when lifetime is configured.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Anoob Joseph [Tue, 28 Sep 2021 10:59:55 +0000 (16:29 +0530)]
common/cnxk: support lifetime configuration
Add support for SA lifetime configuration. Expiry can
be either in units of octets or packets.
Also, updated cryptodev dequeue path to update crypto op result to
indicate soft expiry.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Anoob Joseph [Tue, 28 Sep 2021 10:59:54 +0000 (16:29 +0530)]
security: add SA lifetime configuration
Add SA lifetime configuration to register soft and hard expiry limits.
Expiry can be in units of number of packets or bytes. Crypto op
status is also updated to include new field, aux_flags, which can be
used to indicate cases such as soft expiry in case of lookaside
protocol operations.
In case of soft expiry, the packets are successfully IPsec processed but
the soft expiry would indicate that SA needs to be reconfigured. For
inline protocol capable ethdev, this would result in an eth event while
for lookaside protocol capable cryptodev, this can be communicated via
`rte_crypto_op.aux_flags` field.
In case of hard expiry, the packets will not be IPsec processed and
would result in error.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Anoob Joseph [Tue, 7 Sep 2021 16:17:42 +0000 (21:47 +0530)]
test/crypto: add outbound known vector cases for IV
Added outbound known vector test cases for IV generated
by app. The tests would be skipped on PMDs which do not
support IV provided by application.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Tejasree Kondoj [Tue, 7 Sep 2021 16:17:41 +0000 (21:47 +0530)]
crypto/cnxk: add IV in SA in lookaside IPsec debug mode
Adding IV in SA in lookaside IPsec debug mode. It helps
to verify lookaside PMD using known outbound vectors in
lookaside autotest.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Anoob Joseph [Tue, 7 Sep 2021 16:17:40 +0000 (21:47 +0530)]
security: support user-specified IV
Enabled user to provide IV to be used per security
operation. This would be used with lookaside protocol
offload for comparing against known vectors.
By default, PMD would internally generate random IV.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Tejasree Kondoj [Sat, 25 Sep 2021 15:35:32 +0000 (21:05 +0530)]
test/crypto: add UDP-encapsulated IPsec cases
Added tests to verify UDP encapsulation with IPsec.
The tests have IPsec packets generated from plain packets
and verifies that UDP header is added. Subsequently, the
packets are decapsulated and then resultant packet is
verified by comparing against original packet.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Ciara Power <ciara.power@intel.com>
Tejasree Kondoj [Sat, 25 Sep 2021 15:35:31 +0000 (21:05 +0530)]
test/crypto: add IV gen cases for IPsec
Added cases to verify IV generated by PMD for lookaside IPsec.
The tests compare IV generated for a batch of packets and ensures that
IV is not getting repeated in the batch.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Ciara Power <ciara.power@intel.com>
Tejasree Kondoj [Sat, 25 Sep 2021 15:35:30 +0000 (21:05 +0530)]
test/crypto: add lookaside IPsec ICV corrupt case
Add negative test to validate IPsec inbound processing failure with ICV
corruption. The tests would first do IPsec encapsulation and corrupt
ICV of the generated IPsec packet. Then the packet is submitted to IPsec
outbound processing for decapsulation. Test case would validate that PMD
returns an error in such cases.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Ciara Power <ciara.power@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Anoob Joseph [Sat, 25 Sep 2021 15:35:29 +0000 (21:05 +0530)]
test/crypto: add combined mode IPsec cases
Add framework to test IPsec features with all supported
combinations of ciphers.
Combined mode tests are used to test all IPsec features against all
ciphers supported by the PMD. The framework is introduced to avoid
testing with any specific algo, thereby making it mandatory to be
supported. Also, testing with all supported combinations will help with
increasing coverage as well.
The tests would first do IPsec encapsulation and do sanity checks. Based
on flags, packet would be updated or additional checks are done,
followed by IPsec decapsulation. Since the encrypted packet is generated
by the test, known vectors are not required.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Ciara Power <ciara.power@intel.com>
Anoob Joseph [Sat, 25 Sep 2021 15:35:28 +0000 (21:05 +0530)]
test/crypto: add lookaside IPsec cases
Added test case for lookaside IPsec. Inbound known vector
tests are added.
Cipher list: AES-GCM 128, 192 & 256
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Ciara Power <ciara.power@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Rebecca Troy [Fri, 17 Sep 2021 15:12:07 +0000 (15:12 +0000)]
test/compress: fix buffer overflow
Fixes stack buffer overflow bug in compressdev autotest, which
was caused by the use of buf_idx in the debug logs. Originally, buf_idx
was treated as an array instead of the reference of an integer.
This was fixed by replacing the use of buf_idx[priv_data->orig_idx] with
the variable i.
Fixes:
466a2c4bb5f4 ("test/compress: improve debug logs")
Fixes:
6bbc5a923625 ("test/compress: refactor unit tests")
Cc: stable@dpdk.org
Signed-off-by: Rebecca Troy <rebecca.troy@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Michael Baum [Mon, 13 Sep 2021 19:16:46 +0000 (22:16 +0300)]
crypto/mlx5: fix indirect mkey cleaning
The driver creates an indirect mkey per entry in the queue to manage the
crypto operation using the BSF fields.
The indirect mkeys were never released neither while error occurs in the
creation phase nor when the queue is released.
Clean the indirect mkeys in the above cases.
Fixes:
c2a42d19d967 ("crypto/mlx5: add WQE set initialization")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Tal Shnaiderman [Mon, 13 Sep 2021 14:02:24 +0000 (17:02 +0300)]
crypto/mlx5: fix queue indexing
The crypto QP consumer (ci) and producer (pi) indexes are increased
with each successful enqueue/dequeue operations.
However the QP pi index is calculated with a wraparound the number
of elements while the QP ci does not.
This is causing incorrect engine calculation for encqueued WQ values
(wq->pi - wq->ci) and eventually the device stops accepting new enqueue
operations.
Fixed by removing the wraparound on QP pi and using a temp calculation
where wraparound values are needed.
Fixes:
8e196c08ab53 ("crypto/mlx5: support enqueue/dequeue operations")
Cc: stable@dpdk.org
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
David George [Fri, 24 Sep 2021 11:20:36 +0000 (16:50 +0530)]
common/cpt: rework pending queue
Replace pending queue with one that allows concurrent single producer and
single consumer. This relaxes the restriction of only allowing a single
lcore to operate on a given queue pair.
Signed-off-by: David George <david.george@sophos.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Anoob Joseph [Thu, 16 Sep 2021 06:07:51 +0000 (11:37 +0530)]
examples/ipsec-secgw: fix parsing of flow queue
Documentation specifies that flow port & queue is provided as,
<...> port 0 queue 0
But code is expecting the same as,
<...> port 0 0
Fix the above to match documentation.
Fixes:
8e693616fcb2 ("examples/ipsec-secgw: enable flow based distribution")
Cc: stable@dpdk.org
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Kiran Kumar K [Thu, 16 Sep 2021 08:38:38 +0000 (14:08 +0530)]
test/crypto-perf: test asymmetric crypto throughput
Added support for asymmetric crypto perf throughput test.
Only modex is supported for now.
One new optype has been added.
--optype modex
./dpdk-test-crypto-perf -c 0x3 -- --devtype crypto_cn9k --optype modex
--ptest throughput
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>