dpdk.git
2 years agoevent/cnxk: fix QoS parameter handling
Shijith Thotton [Fri, 20 May 2022 07:11:05 +0000 (12:41 +0530)]
event/cnxk: fix QoS parameter handling

Fixed QoS parameters getting over written and IAQ/TAQ threshold
calculation.

Fixes: 910da32c53a9 ("event/cnxk: add device start")
Cc: stable@dpdk.org
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2 years agocommon/cnxk: add lower bound check for SSO resources
Hanumanth Pothula [Tue, 31 May 2022 12:19:50 +0000 (17:49 +0530)]
common/cnxk: add lower bound check for SSO resources

Observing a crash when the user runs the second test case, with the
first test case using all HWGRP and HWS, SSO resources. This happens
as there are no HWGRP and HWS resources left for the second test case.

Make sure to process a test case only when valid HWGRPS and HWS
are present by adding lower bound check for HWGRPS and HWS.

Signed-off-by: Hanumanth Pothula <hpothula@marvell.com>
2 years agoevent/dlb2: fix check of QID in-flight
Timothy McDaniel [Mon, 6 Jun 2022 16:03:11 +0000 (11:03 -0500)]
event/dlb2: fix check of QID in-flight

If QID inflights is set to an invalid value, it can cause the
PMD to hang.  This commit adds checks to make sure that the
value is valid before programming the hardware.

Fixes: 1857f1922ce2 ("event/dlb2: use new implementation of resource file")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2 years agoevent/dlb2: rework queue drain handling
Timothy McDaniel [Mon, 6 Jun 2022 15:55:17 +0000 (10:55 -0500)]
event/dlb2: rework queue drain handling

Previously, anything that prevented the CQs from being drained
would hang the PMD for an unacceptably long time. This commit updates
the drain logic to be resource and time based, thus eliminating
the potential for a long hang when draining the queues in preparation
for a reset.

Fixes: 1857f1922ce2 ("event/dlb2: use new implementation of resource file")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2 years agoevent/dlb2: improve enqueue efficiency
Timothy McDaniel [Mon, 6 Jun 2022 15:29:53 +0000 (10:29 -0500)]
event/dlb2: improve enqueue efficiency

If user tried to send 64 events, it will take 64 credits. Enqueue API
only gets 32 credits each time. If it does not have sufficient credits,
it just fails and returns. Enqueue API does not retry. On next enqueue,
it will get 32 more and send will work. This results in alternate
enqueues failing.

Add check to make sure DLB2_MAX_ENQUEUE_DEPTH <=
both DLB2_SW_CREDIT_QUANTA_DEFAULT and DLB2_SW_CREDIT_BATCH_SZ.

Add enough retires in the driver to satisfy max enqueue depth credits
based on set quanta. Note the credit quanta size is different for each
port. Retry count = Max enqueue depth / credit quanta in driver before
returning no credit.

Fixes: 3a6d0c04e7fb ("event/dlb2: add port setup")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2 years agoevent/octeontx: fix SSO fast path
Harman Kalra [Tue, 24 May 2022 08:42:25 +0000 (14:12 +0530)]
event/octeontx: fix SSO fast path

Segmentation fault is observed as soon as any  application
with ethdev event is launched as ev->mbuf was not set properly.

Fixing sub event type violation as in OCTEONTX event device
sub_event_type is used to store the ethernet port identifier
when work is received from OCTEONTX ethernet device. This violates
the event device spec as sub_event_type should be 0 in the initial
receive stage. Setting sub_event_type to 0 after copying the port id
in single workslot mode.

Fixes: 44a2cebbd489 ("crypto/octeontx: add crypto adapter data path")
Cc: stable@dpdk.org
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2 years agocrypto/qat: use intel-ipsec-mb for partial hash and AES
Kai Ji [Mon, 13 Jun 2022 17:02:59 +0000 (01:02 +0800)]
crypto/qat: use intel-ipsec-mb for partial hash and AES

Since openssl 3.0 now deprecates the low level API QAT required to
perform partial hash & AES operation when creating the session. This
patch add in qat_ipsec_mb_lib driver parameter to allow QAT PMD to
switch APIs between openssl and intel ipsec-mb library.

Signed-off-by: Kai Ji <kai.ji@intel.com>
Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Ciara Power <ciara.power@intel.com>
2 years agotest/ipsec: fix performance test
Vladimir Medvedkin [Tue, 21 Jun 2022 13:30:45 +0000 (13:30 +0000)]
test/ipsec: fix performance test

This patch initializes with 0 rte_ipsec_sa_prm inside the
ipsec_sa struct.
Before it was passed uninitialized to rte_ipsec_sa_init(),
which does not check whether prm->ipsec_xform.esn.value is
greater than sa->sqn_mask.

Bugzilla ID: 1023
Fixes: f7f3ac6dcbe2 ("test/ipsec: add performance cases")
Cc: stable@dpdk.org
Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
2 years agotest/crypto: fix cipher offset for ZUC
Ciara Power [Tue, 21 Jun 2022 11:41:32 +0000 (11:41 +0000)]
test/crypto: fix cipher offset for ZUC

The cipher offset in bits was not being used in ZUC encryption test
functions when creating the operation, it was hardcoded to 0.
This is fixed to use the offset from the test vector as intended.

Fixes: fd01a9be38d5 ("test/crypto: move IV to crypto op private data")
Cc: stable@dpdk.org
Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Kai Ji <kai.ji@intel.com>
2 years agocrypto/openssl: update DSA routine with 3.0 EVP API
Kai Ji [Tue, 21 Jun 2022 15:42:14 +0000 (23:42 +0800)]
crypto/openssl: update DSA routine with 3.0 EVP API

This patch updates asymmetric DSA routine in crypto openssl pmd
to adopt openssl 3.0 EVP apis. Divided the single combined DSA sign
test to two individual DSA sign and DSA verfiy tests.

Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocrypto/openssl: update DH routine with 3.0 EVP API
Kai Ji [Tue, 21 Jun 2022 15:42:13 +0000 (23:42 +0800)]
crypto/openssl: update DH routine with 3.0 EVP API

This patch updates asymmetric DH routine in crypto openssl pmd
to adopt openssl 3.0 EVP apis.

Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocrypto/openssl: update RSA routine with 3.0 EVP API
Kai Ji [Tue, 21 Jun 2022 15:42:12 +0000 (23:42 +0800)]
crypto/openssl: update RSA routine with 3.0 EVP API

This patch updates asymmetric RSA routine in crypto openssl pmd
to adopt openssl 3.0 EVP apis.

Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocrypto/openssl: update HMAC routine with 3.0 EVP API
Kai Ji [Tue, 21 Jun 2022 15:42:11 +0000 (23:42 +0800)]
crypto/openssl: update HMAC routine with 3.0 EVP API

This patch update the symmetric HMAC routine in crypto openssl
pmd to adopt openssl 3.0 EVP apis.

Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agotest/ipsec: check for devices before testing
Stanislaw Kardach [Wed, 1 Jun 2022 11:00:17 +0000 (13:00 +0200)]
test/ipsec: check for devices before testing

Make sure that ipsec_perf_autotest checks if there are any crypto
devices available before it starts performance testing.
Same test is performed in the ipsec_autotest so it seems prudent to do
it here too to not introduce false failures.

Signed-off-by: Stanislaw Kardach <kda@semihalf.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocrypto/cnxk: add CPT hardware flow control checks
Anoob Joseph [Mon, 20 Jun 2022 11:59:03 +0000 (17:29 +0530)]
crypto/cnxk: add CPT hardware flow control checks

Add hardware supported flow control checks before enqueueing to CPT.
Since both poll mode and event mode can be used at the same time, add
hardware flow control checks to make sure s/w doesn't over submit to
hardware queues. For cn9k, queue depth usage is not high and so FC check
is omitted for poll mode.

To allow for more accurate updates, flow control hardware setting is
updated to give an update per 32 packets. In case of crypto adapter,
multiple cores can enqueue to the same CPT LF at the same time. To
allow such a case, flow control threshold is updated when the adapter
is configured.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocrypto/cnxk: support scatter gather mode
Tejasree Kondoj [Mon, 20 Jun 2022 12:26:54 +0000 (17:56 +0530)]
crypto/cnxk: support scatter gather mode

Adding scatter gather support for zuc, snow3g
and aes-ctr-cmac chained operations on cn9k.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocrypto/cnxk: support stream cipher chained operations
Tejasree Kondoj [Mon, 20 Jun 2022 12:26:53 +0000 (17:56 +0530)]
crypto/cnxk: support stream cipher chained operations

Adding support for zuc, snow3g and aes-ctr-cmac
chained operations on cn9k using key and IV scheme
in microcode.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocrypto/cnxk: fix CMAC IV
Tejasree Kondoj [Mon, 20 Jun 2022 12:26:52 +0000 (17:56 +0530)]
crypto/cnxk: fix CMAC IV

Fixing CMAC IV length to 16 bytes.

Fixes: 759b5e653580 ("crypto/cnxk: support AES-CMAC")

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocrypto/cnxk: add anti-replay as per new firmware
Tejasree Kondoj [Mon, 20 Jun 2022 07:18:07 +0000 (12:48 +0530)]
crypto/cnxk: add anti-replay as per new firmware

Adding anti-replay changes as per new FP-FC microcode.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocrypto/cnxk: improve fast path
Anoob Joseph [Mon, 20 Jun 2022 07:18:06 +0000 (12:48 +0530)]
crypto/cnxk: improve fast path

Remove SA & packet accesses in dequeue path by adjusting the headers in
the enqueue path for outbound packets. For inbound packets, add extra
esn_en flag in the SA to minimize cache line accesses in the datapath.

Also, use seq_lo for IPID. IPID just need to be unique. Instead of
incrementing per packet, use ESN low bits.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocrypto/cnxk: move IPsec SA creation to common
Vidya Sagar Velumuri [Mon, 20 Jun 2022 07:18:05 +0000 (12:48 +0530)]
crypto/cnxk: move IPsec SA creation to common

Move the IPsec SA creation to common.
The code can be used by fastpath also to create the SAs
Add changes to support new full context microcode

Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocrypto/qat: fix missing copy guards in asym mod
Arek Kusztal [Fri, 17 Jun 2022 11:19:37 +0000 (12:19 +0100)]
crypto/qat: fix missing copy guards in asym mod

This commit fixes missing guards for size of memcpy,
it is needed to prevent faulty access when incorrect length
passed from the user.

Fixes: 3b78aa7b2317 ("crypto/qat: refactor asymmetric crypto functions")
Cc: stable@dpdk.org
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
2 years agocrypto/scheduler: fix queue pair in scheduler failover
Jakub Wysocki [Wed, 15 Jun 2022 13:13:49 +0000 (14:13 +0100)]
crypto/scheduler: fix queue pair in scheduler failover

This commit fixes wrong qp_id value in cryptodev scheduler in failover
mode.

Fixes: 37f075dad1e9 ("crypto/scheduler: add fail-over scheduling mode")
Cc: stable@dpdk.org
Signed-off-by: Jakub Wysocki <jakubx.wysocki@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
2 years agocrypto/qat: fix cleanup function default behaviour
Arek Kusztal [Wed, 15 Jun 2022 05:57:56 +0000 (06:57 +0100)]
crypto/qat: fix cleanup function default behaviour

Full cookie data should be cleared by default if not algorithm
specified. This is protection in case algorithm specific cleanup
is not implemented.

Fixes: 3b78aa7b2317 ("crypto/qat: refactor asymmetric crypto functions")
Cc: stable@dpdk.org
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
2 years agoexamples/fips_validation: fix link to libjansson
David Marchand [Tue, 7 Jun 2022 10:02:02 +0000 (12:02 +0200)]
examples/fips_validation: fix link to libjansson

When compiling this example out of DPDK, linking the executable fails
with:

  ## Building fips_validation
  /usr/bin/ld: /tmp/ccQjeHBg.o: in function `fips_test_init':
  fips_validation.c:(.text+0x7ab): undefined reference to `json_loadf'
  /usr/bin/ld: /tmp/ccQjeHBg.o: in function
     `fips_test_parse_one_json_vector_set':
  fips_validation.c:(.text+0xc2e): undefined reference to `json_object_get'
  /usr/bin/ld: fips_validation.c:(.text+0xc36): undefined reference to
     `json_string_value'
  /usr/bin/ld: /tmp/ccQjeHBg.o: in function `fips_test_parse_one_json_group':
  fips_validation.c:(.text+0xd00): undefined reference to `json_object_get'
  /usr/bin/ld: fips_validation.c:(.text+0xd14): undefined reference to
     `json_integer_value'
  ...

Code in an example can't rely on RTE_HAS_JANSSON, because it only
indicates that the jansson library was available at the time of dpdk
compilation.

Prefer a local build flag (like what is done in vm_power_manager).
And add linking to libjansson, if available.

Fixes: f556293fd58e ("examples/fips_validation: add JSON info to header")

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
2 years agotest/ipsec: fix build with GCC 12
David Marchand [Thu, 16 Jun 2022 09:33:20 +0000 (11:33 +0200)]
test/ipsec: fix build with GCC 12

GCC 12 raises the following warning:

In function ‘_mm256_loadu_si256’,
    inlined from ‘rte_mov32’ at
        ../lib/eal/x86/include/rte_memcpy.h:319:9,
    inlined from ‘rte_mov128’ at
        ../lib/eal/x86/include/rte_memcpy.h:344:2,
    inlined from ‘rte_memcpy_generic’ at
        ../lib/eal/x86/include/rte_memcpy.h:438:4,
    inlined from ‘rte_memcpy’ at
        ../lib/eal/x86/include/rte_memcpy.h:882:10,
    inlined from ‘setup_test_string.constprop’ at
        ../app/test/test_ipsec.c:572:4:
/usr/lib/gcc/x86_64-redhat-linux/12/include/avxintrin.h:929:10: error:
    array subscript ‘__m256i_u[3]’ is partly outside array bounds of
    ‘const char[108]’ [-Werror=array-bounds]
  929 |   return *__P;
      |          ^~~~
../app/test/test_ipsec.c: In function ‘setup_test_string.constprop’:
../app/test/test_ipsec.c:539:12: note: at offset 96 into object
    ‘null_plain_data’ of size 108
  539 | const char null_plain_data[] =
      |            ^~~~~~~~~~~~~~~

Add a hint so that the compiler understands the copied data is within
the passed string boundaries.

Bugzilla ID: 848
Fixes: 05fe65eb66b2 ("test/ipsec: introduce functional test")
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
2 years agocrypto/cnxk: fix build with GCC 12
Ankur Dwivedi [Fri, 17 Jun 2022 13:39:30 +0000 (19:09 +0530)]
crypto/cnxk: fix build with GCC 12

The following warning is observed with GCC 12 compilation:

In file included from ../drivers/crypto/cnxk/cn10k_cryptodev_ops.c:17:
In function ‘fill_sg_comp_from_iov’,
    inlined from ‘cpt_pdcp_chain_alg_prep’ at
        ../drivers/crypto/cnxk/cnxk_se.h:1194:8,
    inlined from ‘cpt_fc_enc_hmac_prep’ at
        ../drivers/crypto/cnxk/cnxk_se.h:1871:9,
    inlined from ‘fill_digest_params’ at
        ../drivers/crypto/cnxk/cnxk_se.h:2829:8,
    inlined from ‘cpt_sym_inst_fill’ at
        ../drivers/crypto/cnxk/cn10k_cryptodev_ops.c:92:9,
    inlined from ‘cn10k_cpt_fill_inst.constprop’ at
        ../drivers/crypto/cnxk/cn10k_cryptodev_ops.c:146:10:
../drivers/crypto/cnxk/cnxk_se.h:222:52: warning: array subscript 0 is
outside array bounds of ‘struct roc_se_buf_ptr[0]’ [-Warray-bounds]
  222 |           e_vaddr = (uint64_t)bufs[j].vaddr;
      |                               ~~~~~~~^~~~~~
../drivers/crypto/cnxk/cnxk_se.h:223:48: warning: array subscript 0 is
outside array bounds of ‘struct roc_se_buf_ptr[0]’ [-Warray-bounds]
  223 |           e_len = (size > bufs[j].size) ? bufs[j].size : size;
      |                           ~~~~~~~^~~~~

This patch resolves the warning.

Fixes: 3de331795f73 ("crypto/cnxk: add flexi cipher encryption")
Cc: stable@dpdk.org
Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Reviewed-by: Anoob Joseph <anoobj@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tested-by: David Marchand <david.marchand@redhat.com>
2 years agocommon/cpt: fix build with GCC 12
Ankur Dwivedi [Fri, 17 Jun 2022 13:39:29 +0000 (19:09 +0530)]
common/cpt: fix build with GCC 12

The following warning is observed with GCC 12 compilation:

In function ‘fill_sg_comp_from_iov’,
    inlined from ‘cpt_zuc_snow3g_enc_prep’ at
        ../drivers/common/cpt/cpt_ucode.h:1672:9,
    inlined from ‘cpt_fc_enc_hmac_prep’ at
        ../drivers/common/cpt/cpt_ucode.h:2472:3,
    inlined from ‘fill_digest_params’ at
        ../drivers/common/cpt/cpt_ucode.h:3548:14,
    inlined from ‘otx_cpt_enq_single_sym’ at
        ../drivers/crypto/octeontx/otx_cryptodev_ops.c:541:9,
    inlined from ‘otx_cpt_enq_single_sym_sessless’ at
        ../drivers/crypto/octeontx/otx_cryptodev_ops.c:584:8,
    inlined from ‘otx_cpt_enq_single’ at
        ../drivers/crypto/octeontx/otx_cryptodev_ops.c:611:11,
    inlined from ‘otx_cpt_pkt_enqueue’ at
        ../drivers/crypto/octeontx/otx_cryptodev_ops.c:643:9,
    inlined from ‘otx_cpt_enqueue_sym’ at
        ../drivers/crypto/octeontx/otx_cryptodev_ops.c:668:9:
../drivers/common/cpt/cpt_ucode.h:415:36: warning: array subscript 0 is
outside array bounds of ‘buf_ptr_t[0]’ {aka ‘struct buf_ptr[]’}
[-Warray-bounds]
  415 |                         e_dma_addr = bufs[j].dma_addr;
      |                         ~~~~~~~~~~~^~~~~~~~~~~~~~~~~~
../drivers/common/cpt/cpt_ucode.h:416:48: warning: array subscript 0 is
outside array bounds of ‘buf_ptr_t[0]’ {aka ‘struct buf_ptr[]’}
[-Warray-bounds]
  416 |                         e_len = (size > bufs[j].size) ?
      |                                         ~~~~~~~^~~~~

This patch resolves the warning.

Bugzilla ID: 861
Fixes: 9be415daf469 ("common/cpt: add common defines for microcode")
Fixes: b74652f3a91f ("common/cpt: add microcode interface for encryption")
Cc: stable@dpdk.org
Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Reviewed-by: Anoob Joseph <anoobj@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tested-by: David Marchand <david.marchand@redhat.com>
2 years agotest/crypto-perf: support SDAP for PDCP operations
Gagandeep Singh [Mon, 6 Jun 2022 04:00:58 +0000 (09:30 +0530)]
test/crypto-perf: support SDAP for PDCP operations

Add a command line option "--enable-sdap" to enable
Service Data Adaptation Protocol.

example command:
./dpdk-test-crypto-perf -c 0xc  --log-level=8 --
--devtype crypto_dpaa2_sec --optype pdcp --cipher-algo aes-ctr
--cipher-op encrypt --auth-algo zuc-eia3 --auth-op generate
--auth-key-sz 16 --ptest throughput --total-ops 100000 --burst-sz 64
--buffer-sz 64,390,1512  --pool-sz 4096 --silent --pdcp-sn-sz 12
--pdcp-domain control --enable-sdap

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agocrypto/cnxk: pass sub-event type in event
Anoob Joseph [Fri, 10 Jun 2022 09:24:30 +0000 (14:54 +0530)]
crypto/cnxk: pass sub-event type in event

Response info may have valid sub_event_type. Pass this to the event
generated by CPT.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Reviewed-by: Shijith Thotton <sthotton@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2 years agocrypto/octeontx: pass sub-event type in event
Anoob Joseph [Fri, 10 Jun 2022 09:24:29 +0000 (14:54 +0530)]
crypto/octeontx: pass sub-event type in event

Response info may have valid sub_event_type. Pass this to the event
generated by CPT.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Reviewed-by: Shijith Thotton <sthotton@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2 years agocrypto/cnxk: fix condition check
Volodymyr Fialko [Thu, 9 Jun 2022 09:27:31 +0000 (11:27 +0200)]
crypto/cnxk: fix condition check

The value of ec_mdata cannot be NULL, instead check that value of
private_data_offset was set.

Coverity issue: 378861, 378865
Fixes: 97ebfda82910 ("crypto/cnxk: add event metadata set operation")

Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2 years agocrypto/cnxk: swap ZUC-256 IV
Ankur Dwivedi [Fri, 3 Jun 2022 07:13:07 +0000 (12:43 +0530)]
crypto/cnxk: swap ZUC-256 IV

The microcode expects the IV to be in reverse of what is provided
by dpdk test app. Also the first 8 bytes of reversed IV is
compressed to 6 bytes.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2 years agocommon/cnxk: swap ZUC-256 key
Ankur Dwivedi [Fri, 3 Jun 2022 07:13:06 +0000 (12:43 +0530)]
common/cnxk: swap ZUC-256 key

The microcode expects zuc-256 key to be in reverse of what is
provided by dpdk test app. This patch swaps the zuc-256 key.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2 years agoexamples/ipsec-secgw: fix packet type parsing
Radu Nicolau [Fri, 10 Jun 2022 10:45:54 +0000 (11:45 +0100)]
examples/ipsec-secgw: fix packet type parsing

Add new packet type flags instead of overwriting.

Fixes: d04bb1c52647 ("examples/ipsec-secgw: use HW parsed packet type in poll mode")

Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agoexamples/ipsec-secgw: add option for descriptors per QP
Volodymyr Fialko [Thu, 9 Jun 2022 13:01:29 +0000 (15:01 +0200)]
examples/ipsec-secgw: add option for descriptors per QP

Added option to configure number of queue pair descriptors via command
line (--desc-nb NUMBER_OF_DESC).

When the crypto processing takes longer durations, small queue pair size
would result in cryptodev enqueue failures. Larger queue pair size would
allow more packets to stay in flight simultaneously and reduce enqueue
failures.

Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2 years agoexamples/ipsec-secgw: fix ESN setting
Radu Nicolau [Tue, 14 Jun 2022 12:43:13 +0000 (13:43 +0100)]
examples/ipsec-secgw: fix ESN setting

Fix ESN option flag and initial value for the rte_ipsec library path.

Fixes: 560029d5cfc9 ("examples/ipsec-secgw: define initial ESN value")
Cc: stable@dpdk.org
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
2 years agotest/crypto: fix build with optimization=1
Rahul Lakkireddy [Mon, 13 Jun 2022 09:52:23 +0000 (15:22 +0530)]
test/crypto: fix build with optimization=1

Fail IPSec ESN and antireplay cases, if there are no packets. Fixes
following warning when using optimization=1 build flag with GCC 11.

../app/test/test_cryptodev.c: In function ‘test_ipsec_pkt_replay’:
../app/test/test_cryptodev.c:10074:15: warning: ‘td_outb’ may be used uninitialized [-Wmaybe-uninitialized]
         ret = test_ipsec_proto_process(td_outb, td_inb, nb_pkts, true,
               ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
                                        &flags);
                                        ~~~~~~~
../app/test/test_cryptodev.c:9150:1: note: by argument 1 of type ‘const struct ipsec_test_data[]’ to ‘test_ipsec_proto_process’ declared here
 test_ipsec_proto_process(const struct ipsec_test_data td[],
 ^~~~~~~~~~~~~~~~~~~~~~~~
../app/test/test_cryptodev.c:10056:32: note: ‘td_outb’ declared here
         struct ipsec_test_data td_outb[IPSEC_TEST_PACKETS_MAX];
                                ^~~~~~~

Bugzilla ID: 1032
Fixes: d02c6bfcb99a ("test/crypto: add ESN and antireplay cases")
Cc: stable@dpdk.org
Reported-by: Daxue Gao <daxuex.gao@intel.com>
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2 years agonet/iavf: fix NAT-T payload length
Radu Nicolau [Wed, 25 May 2022 13:59:12 +0000 (14:59 +0100)]
net/iavf: fix NAT-T payload length

Correct the length calculation used for NAT-T

Fixes: 6bc987ecb860 ("net/iavf: support IPsec inline crypto")
Cc: stable@dpdk.org
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
2 years agoexamples/ipsec-secgw: fix NAT-T header fields
Radu Nicolau [Wed, 25 May 2022 13:59:11 +0000 (14:59 +0100)]
examples/ipsec-secgw: fix NAT-T header fields

Use the proper IP protocol (UDP instead of ESP) and set the ports when
UDP encapsulation is enabled.

Fixes: 9ae86b4cfc77 ("examples/ipsec-secgw: support UDP encap for inline crypto")
Cc: stable@dpdk.org
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
2 years agoipsec: fix NAT-T ports and length
Radu Nicolau [Wed, 25 May 2022 13:59:10 +0000 (14:59 +0100)]
ipsec: fix NAT-T ports and length

Fix the UDP header fields, wrong byte order used for src and dst port
and wrong offset used when updating UDP datagram length.

Fixes: 01eef5907fc3 ("ipsec: support NAT-T")
Cc: stable@dpdk.org
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
2 years agobaseband/acc100: configure ACC101 from PF
Nicolas Chautru [Tue, 31 May 2022 22:31:47 +0000 (15:31 -0700)]
baseband/acc100: configure ACC101 from PF

Adding companion function common to ACC100/ACC101 which
can be called from bbdev-test when running from PF.

Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2 years agobaseband/acc100: modify validation code for ACC101
Nicolas Chautru [Tue, 31 May 2022 22:31:46 +0000 (15:31 -0700)]
baseband/acc100: modify validation code for ACC101

The validation requirement is different for the two
devices.

Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
Reviewed-by: Hernan Vargas <hernan.vargas@intel.com>
2 years agobaseband/acc100: introduce PMD for ACC101
Nicolas Chautru [Tue, 31 May 2022 22:31:45 +0000 (15:31 -0700)]
baseband/acc100: introduce PMD for ACC101

Added support for ACC101 as a derivative of ACC100.
Integrated in unified driver and reusing existing code when possible.

Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2 years agobaseband/acc100: remove RTE prefix for internal macros
Nicolas Chautru [Tue, 31 May 2022 22:31:44 +0000 (15:31 -0700)]
baseband/acc100: remove RTE prefix for internal macros

Cosmetic update to remove RTE_ prefix for a define
kept internal.

Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2 years agobaseband/acc100: add protection for some negative scenario
Nicolas Chautru [Tue, 31 May 2022 22:31:43 +0000 (15:31 -0700)]
baseband/acc100: add protection for some negative scenario

Catch exception in PMD in case of invalid input parameter.

Fixes: 5ad5060f8f7a ("baseband/acc100: add LDPC processing functions")
Cc: stable@dpdk.org
Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2 years agobaseband/acc100: update companion PF configure function
Nicolas Chautru [Tue, 31 May 2022 22:31:42 +0000 (15:31 -0700)]
baseband/acc100: update companion PF configure function

Update of the device configuration function from PF used for bbdev-test
to latest sequence for ACC199 PRQ device and matching version in
pf_bb_config 22.03.

Fixes: b17d70922d5d ("baseband/acc100: add configure function")
Cc: stable@dpdk.org
Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
Reviewed-by: Hernan Vargas <hernan.vargas@intel.com>
2 years agoeal/x86: drop export of internal alignment macro
David Marchand [Tue, 21 Jun 2022 14:13:25 +0000 (16:13 +0200)]
eal/x86: drop export of internal alignment macro

ALIGNMENT_MASK is only used internally.
Besides it lacks a DPDK-related prefix.
Hide it from external eyes.

Fixes: f5472703c0bd ("eal: optimize aligned memcpy on x86")
Cc: stable@dpdk.org
Reported-by: Morten Brørup <mb@smartsharesystems.com>
Signed-off-by: David Marchand <david.marchand@redhat.com>
2 years agosched: fix floating point math
Stephen Hemminger [Thu, 26 May 2022 20:26:53 +0000 (13:26 -0700)]
sched: fix floating point math

The function rte_pie_drop was attempting to do a random probability
drop, but because of incorrect usage of fixed point divide
it would always return 1.

Change to use new rte_drand() instead.

Fixes: 44c730b0e379 ("sched: add PIE based congestion management")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Jasvinder Singh <jasvinder.singh@intel.com>
2 years agosched: remove unnecessary floating point
Stephen Hemminger [Thu, 26 May 2022 20:26:52 +0000 (13:26 -0700)]
sched: remove unnecessary floating point

The qdelay variable is derived from and compared to 64 bit
value so it doesn't have to be floating point.

Fixes: 44c730b0e379 ("sched: add PIE based congestion management")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Jasvinder Singh <jasvinder.singh@intel.com>
2 years agoeal: provide pseudo-random floating point number
Stephen Hemminger [Thu, 26 May 2022 20:26:51 +0000 (13:26 -0700)]
eal: provide pseudo-random floating point number

The PIE code and other applications can benefit from having a
fast way to get a random floating point value. This new function
is equivalent to drand() in the standard library.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
2 years agocommon/cnxk: support switching CPRI/ETH back and forth
Tomasz Duszynski [Sat, 4 Jun 2022 16:26:51 +0000 (18:26 +0200)]
common/cnxk: support switching CPRI/ETH back and forth

Add support for toggling modes between ETH and CPRI on
newer MACs (RPM).

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2 years agocommon/cnxk: sync eth mode change command with firmware
Tomasz Duszynski [Sat, 4 Jun 2022 16:26:50 +0000 (18:26 +0200)]
common/cnxk: sync eth mode change command with firmware

Layout of eth mode change command defined by firmware has been changed
recently. So in order to retain compatibility between ROC and firmware
update existing codebase.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2 years agocommon/cnxk: remove unused constants
Tomasz Duszynski [Sat, 4 Jun 2022 16:26:49 +0000 (18:26 +0200)]
common/cnxk: remove unused constants

Some constants are redundant hence remove them.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2 years agoraw/cnxk_bphy: support changing CPRI misc settings
Tomasz Duszynski [Sat, 4 Jun 2022 16:26:48 +0000 (18:26 +0200)]
raw/cnxk_bphy: support changing CPRI misc settings

Add support for changing miscellaneous CPRI settings.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2 years agoraw/cnxk_bphy: support enabling Tx for CPRI SERDES
Tomasz Duszynski [Sat, 4 Jun 2022 16:26:47 +0000 (18:26 +0200)]
raw/cnxk_bphy: support enabling Tx for CPRI SERDES

Add support for enabling or disablig TX for SERDES
configured in CPRI mode.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2 years agoraw/cnxk_bphy: support switching from eCPRI to CPRI
Tomasz Duszynski [Sat, 4 Jun 2022 16:26:46 +0000 (18:26 +0200)]
raw/cnxk_bphy: support switching from eCPRI to CPRI

Add support for switching from ethernet (eCPRI) to CPRI mode.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2 years agocommon/cnxk: do not switch affinity back and forth
Tomasz Duszynski [Sat, 4 Jun 2022 16:26:45 +0000 (18:26 +0200)]
common/cnxk: do not switch affinity back and forth

Switching affinity back and forth was used as a mean to pass CPU number
to IRQ registration routine which is an overkill.

Simplify current logic by extending IRQ registration routine parameter
list with a CPU which should run IRQ handler.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2 years agoraw/cnxk_bphy: add doxygen comments
Jakub Palider [Sat, 4 Jun 2022 16:26:44 +0000 (18:26 +0200)]
raw/cnxk_bphy: add doxygen comments

Documentation in doxygen format is important for API
headers used by end user. This patch fills BPHY and CGX
interface with missing bits.

Signed-off-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2 years agocommon/cnxk: use wider mask to extract RPM ID
Tomasz Duszynski [Sat, 4 Jun 2022 16:26:43 +0000 (18:26 +0200)]
common/cnxk: use wider mask to extract RPM ID

Some platforms have more RPMs available than the others. Take than
into account when retrieving id of a particular RPM.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tested-by: Jerin Jacob <jerinj@marvell.com>
2 years agocommon/cnxk: update register access for CNF10xxN
Tomasz Duszynski [Sat, 4 Jun 2022 16:26:42 +0000 (18:26 +0200)]
common/cnxk: update register access for CNF10xxN

Due to HW changes some fields which were used to enable
xmit were moved elsewhere. This patch takes care of this.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tested-by: Jerin Jacob <jerinj@marvell.com>
2 years agotest: drop reference to removed tests
David Marchand [Mon, 13 Jun 2022 07:37:00 +0000 (09:37 +0200)]
test: drop reference to removed tests

cycles_autotest and delay_us_sleep_autotest tests were removed in the
commit ee00af60170b ("test: remove strict timing requirements some tests")
and were wrongly reintroduced later.

Bugzilla ID: 1021
Fixes: 74822233bdc2 ("test: create a list of extra tests")
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
2 years agodma/idxd: fix AVX2 in non-datapath functions
Bruce Richardson [Fri, 17 Jun 2022 10:59:20 +0000 (11:59 +0100)]
dma/idxd: fix AVX2 in non-datapath functions

While all systems which will use the idxd driver for hardware will
support AVX2, if the driver is present the initialization functions e.g.
to register logs, will be called on all systems - irrespective of HW
support. This can cause issues if the system running DPDK does not have
AVX2, and the compiler has included AVX instructions in the
initialization code.

To fix this, remove AVX2 instruction set from the whole build of the
driver. Instead, we add "target(avx2)" attribute to all datapath
functions, so those - and only those functions - will having AVX2
instructions in them.

Bugzilla ID: 1038
Fixes: 3d36a0a1c7de ("dma/idxd: add data path job submission")
Cc: stable@dpdk.org
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Conor Walsh <conor.walsh@intel.com>
2 years agodma/idxd: fix default for workqueue options
Bruce Richardson [Fri, 17 Jun 2022 11:17:50 +0000 (12:17 +0100)]
dma/idxd: fix default for workqueue options

When no --wq-option flag is passed to dpdk_idxd_cfg.py script, the
default value used by argparse is None. This leads to later errors which
are expecting an array value:

TypeError: 'NoneType' object is not iterable

This is fixed by specifying that the empty array should be the default
if no flags are passed.

Fixes: 94b0f04dc0e3 ("dma/idxd: add generic option for queue config")

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Sunil Pai G <sunil.pai.g@intel.com>
Acked-by: Conor Walsh <conor.walsh@intel.com>
2 years agotest: enable most driver tests on Windows
Tyler Retzlaff [Fri, 20 May 2022 10:12:06 +0000 (03:12 -0700)]
test: enable most driver tests on Windows

Enable most of the driver tests to run on Windows, most tests will be
skipped since the drivers themselves are not available on Windows.

Tests not removed from conditional run:

cryptodev_openssl_asym_autotest
  Test fails because it does not bother checking to see if required
  driver is available as the other cryptodev tests do.
  The test should be updated to fix the issue.

eventdev_selftest_octeontx, eventdev_selftest_sw
  Because it has a dependency on eventdev library which doesn't build
  on Windows. These should be resolved by including/running the tests
  dependent on if dpdk_conf.has('RTE_LIB_EVENT')

dump_xxx tests are still to be evaluated, no attempt has been made
to move these out of conditional run for Windows.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
2 years agotest/crypto: remove Windows conditional compilation
Tyler Retzlaff [Fri, 20 May 2022 10:12:05 +0000 (03:12 -0700)]
test/crypto: remove Windows conditional compilation

Build the test/crypto harnesses on Windows to allow them to be listed
as tests to run.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
2 years agovhost: remove unneeded header includes
Sean Morrissey [Mon, 20 Jun 2022 10:40:30 +0000 (10:40 +0000)]
vhost: remove unneeded header includes

These header includes have been flagged by the iwyu_tool
and removed.

Signed-off-by: Sean Morrissey <sean.morrissey@intel.com>
Acked-by: Chenbo Xia <chenbo.xia@intel.com>
2 years agotimer: remove unneeded header includes
Sean Morrissey [Mon, 20 Jun 2022 10:40:29 +0000 (10:40 +0000)]
timer: remove unneeded header includes

These header includes have been flagged by the iwyu_tool
and removed.

Signed-off-by: Sean Morrissey <sean.morrissey@intel.com>
2 years agosched: remove unneeded header includes
Sean Morrissey [Mon, 20 Jun 2022 10:40:28 +0000 (10:40 +0000)]
sched: remove unneeded header includes

These header includes have been flagged by the iwyu_tool
and removed.

Signed-off-by: Sean Morrissey <sean.morrissey@intel.com>
2 years agorawdev: remove unneeded header includes
Sean Morrissey [Mon, 20 Jun 2022 10:40:27 +0000 (10:40 +0000)]
rawdev: remove unneeded header includes

These header includes have been flagged by the iwyu_tool
and removed.

Signed-off-by: Sean Morrissey <sean.morrissey@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2 years agopower: remove unneeded header includes
Sean Morrissey [Mon, 20 Jun 2022 10:40:26 +0000 (10:40 +0000)]
power: remove unneeded header includes

These header includes have been flagged by the iwyu_tool
and removed.

Signed-off-by: Sean Morrissey <sean.morrissey@intel.com>
2 years agonet: remove unneeded header includes
Sean Morrissey [Mon, 20 Jun 2022 10:40:25 +0000 (10:40 +0000)]
net: remove unneeded header includes

These header includes have been flagged by the iwyu_tool
and removed.

Signed-off-by: Sean Morrissey <sean.morrissey@intel.com>
2 years agometer: remove unneeded header includes
Sean Morrissey [Mon, 20 Jun 2022 10:40:24 +0000 (10:40 +0000)]
meter: remove unneeded header includes

These header includes have been flagged by the iwyu_tool
and removed.

Signed-off-by: Sean Morrissey <sean.morrissey@intel.com>
2 years agojobstats: remove unneeded header includes
Sean Morrissey [Mon, 20 Jun 2022 10:40:23 +0000 (10:40 +0000)]
jobstats: remove unneeded header includes

These header includes have been flagged by the iwyu_tool
and removed.

Signed-off-by: Sean Morrissey <sean.morrissey@intel.com>
2 years agohash: remove unneeded header includes
Sean Morrissey [Mon, 20 Jun 2022 10:40:22 +0000 (10:40 +0000)]
hash: remove unneeded header includes

These header includes have been flagged by the iwyu_tool
and removed.

Signed-off-by: Sean Morrissey <sean.morrissey@intel.com>
2 years agogso: remove unneeded header includes
Sean Morrissey [Mon, 20 Jun 2022 10:40:21 +0000 (10:40 +0000)]
gso: remove unneeded header includes

These header includes have been flagged by the iwyu_tool
and removed.

Signed-off-by: Sean Morrissey <sean.morrissey@intel.com>
2 years agogpudev: remove unneeded header includes
Sean Morrissey [Mon, 20 Jun 2022 10:40:20 +0000 (10:40 +0000)]
gpudev: remove unneeded header includes

These header includes have been flagged by the iwyu_tool
and removed.

Signed-off-by: Sean Morrissey <sean.morrissey@intel.com>
2 years agoethdev: remove unneeded header includes
Sean Morrissey [Mon, 20 Jun 2022 10:40:19 +0000 (10:40 +0000)]
ethdev: remove unneeded header includes

These header includes have been flagged by the iwyu_tool
and removed.

Signed-off-by: Sean Morrissey <sean.morrissey@intel.com>
2 years agoeal: remove unneeded header includes
Sean Morrissey [Mon, 20 Jun 2022 10:40:18 +0000 (10:40 +0000)]
eal: remove unneeded header includes

These header includes have been flagged by the iwyu_tool
and removed.

Signed-off-by: Sean Morrissey <sean.morrissey@intel.com>
2 years agocmdline: remove unneeded header includes
Sean Morrissey [Mon, 20 Jun 2022 10:40:17 +0000 (10:40 +0000)]
cmdline: remove unneeded header includes

These header includes have been flagged by the iwyu_tool
and removed.

Signed-off-by: Sean Morrissey <sean.morrissey@intel.com>
2 years agotest/trace: add a test with traces enabled
Chengwen Feng [Fri, 17 Jun 2022 02:29:13 +0000 (10:29 +0800)]
test/trace: add a test with traces enabled

Currently trace_autotest unit test is executed with traces disabled.
This patch introduces trace_autotest unit test with traces enabled,
and the traces file is written to the directory where dpdk-test is
located.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
2 years agotrace: fix init with long file prefix
Chengwen Feng [Fri, 17 Jun 2022 02:29:11 +0000 (10:29 +0800)]
trace: fix init with long file prefix

Bug scenario:
1. start testpmd:
  $ dpdk-testpmd -l 4-6 -a 0000:7d:00.0 --trace=.* \
    --file-prefix=trace_autotest -- -i
2. then observed:
  EAL: eal_trace_init():93 failed to initialize trace [File exists]
  EAL: FATAL: Cannot init trace
  EAL: Cannot init trace
  EAL: Error - exiting with code: 1

The root cause it that the offset set wrong with long file-prefix and
then lead the strftime return failed.

At the same time, trace_session_name_generate() uses errno as the return
value, but the errno was not set if strftime returned zero.
A previously set errno (EEXIST or ENOENT from call to mkdir for creating
the runtime configuration directory) was returned in this case.
This is fragile and may lead to incorrect logic if errno was set
to 0 previously.
This also resulted in inaccurate prompting.
Set errno to ENOSPC if strftime return zero.

Fixes: 321dd5f8fa62 ("trace: add internal init and fini interface")
Cc: stable@dpdk.org
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2 years agotrace: fix crash when exiting
Chengwen Feng [Fri, 17 Jun 2022 02:29:10 +0000 (10:29 +0800)]
trace: fix crash when exiting

Bug scenario:
1. start testpmd:
  $ dpdk-testpmd -l 4-6 -a 0000:7d:00.0 --trace=.* -- -i
2. quit testpmd and then observed segment fault:
  Bye...
  Segmentation fault (core dumped)

The root cause is that rte_trace_save() and eal_trace_fini() access
the huge pages which were cleanup by rte_eal_memory_detach().

This patch moves rte_trace_save() and eal_trace_fini() before
rte_eal_memory_detach() to fix the bug.

Fixes: dfbc61a2f9a6 ("mem: detach memsegs on cleanup")
Cc: stable@dpdk.org
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Tested-by: Jerin Jacob <jerinj@marvell.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
2 years agoraw/ifpga: add HE-HSSI AFU driver
Wei Huang [Thu, 16 Jun 2022 03:00:34 +0000 (23:00 -0400)]
raw/ifpga: add HE-HSSI AFU driver

HE-HSSI is one of the host exerciser modules in OFS FPGA,
which is used to test HSSI (High Speed Serial Interface).
This driver initialize the module and report test result.

Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
2 years agoraw/ifpga: add HE-MEM AFU driver
Wei Huang [Thu, 16 Jun 2022 03:00:33 +0000 (23:00 -0400)]
raw/ifpga: add HE-MEM AFU driver

HE-MEM is one of the host exerciser modules in OFS FPGA,
which is used to test local memory with built-in traffic
generator.
This driver initialize the module and report test result.

Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
2 years agoraw/ifpga: add HE-LPBK AFU driver
Wei Huang [Thu, 16 Jun 2022 03:00:32 +0000 (23:00 -0400)]
raw/ifpga: add HE-LPBK AFU driver

HE-LPBK and HE-MEM-LPBK are host exerciser modules in OFS FPGA,
HE-LPBK is used to test PCI bus and HE-MEM-LPBK is used to test
local memory.
This driver initialize the modules and report test result.

Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
2 years agoraw/ifpga: add N3000 AFU driver
Wei Huang [Thu, 16 Jun 2022 03:00:31 +0000 (23:00 -0400)]
raw/ifpga: add N3000 AFU driver

N3000 AFU includes NLB0 and DMA modules, NLB0 is used to test PCI bus
and DMA is used to test local memory.
This driver initialize the modules and report test result.

Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
2 years agoraw/ifpga: introduce AFU driver framework
Wei Huang [Thu, 16 Jun 2022 03:00:30 +0000 (23:00 -0400)]
raw/ifpga: introduce AFU driver framework

AFU (Acceleration Function Unit) is part of FPGA and enumerated
by ifpga driver.
This driver implements common AFU device interfaces and exposes
them to application as standard raw device APIs.
Normally application can operate specified AFU as below,
1. call rte_rawdev_pmd_get_named_dev() to find AFU device.
2. call rte_rawdev_configure() to initialize AFU device.
3. call rte_rawdev_selftest() to test AFU device.

Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
2 years agoraw/ifpga/base: add PMCI sensor driver
Wei Huang [Fri, 17 Jun 2022 07:19:35 +0000 (03:19 -0400)]
raw/ifpga/base: add PMCI sensor driver

N6000 ADP platform support more sensors than N3000, they are
accessed with the help of PMCI sensor driver.

Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
2 years agoraw/ifpga/base: update flash operation interface
Wei Huang [Fri, 17 Jun 2022 07:19:34 +0000 (03:19 -0400)]
raw/ifpga/base: update flash operation interface

In N6000 ADP platform, SPI protocol, master and QSPI flash are
transparent to host software. The SPI master implemented in PMCI
automatically converts the mailbox commands to the SPI protocol
required by SPI slave.
That means flash operation is different from old platform, new
interfaces are introduced to adapt these changes.

Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
2 years agoraw/ifpga/base: update board information
Wei Huang [Fri, 17 Jun 2022 07:19:33 +0000 (03:19 -0400)]
raw/ifpga/base: update board information

N6000 ADP platform has different definition of board information,
they can be recognized after this patch.

Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
2 years agoraw/ifpga/base: add PMCI base driver
Wei Huang [Fri, 17 Jun 2022 07:19:32 +0000 (03:19 -0400)]
raw/ifpga/base: add PMCI base driver

PMCI (Platform Management Control Interface) is a new module in FPGA,
which is designed to cooperate with BMC chip to fulfill board management
functions.
This base driver implements interfaces to access registers of BMC chip.

Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
2 years agoraw/ifpga: fix file handle leak
Wei Huang [Thu, 9 Jun 2022 08:50:09 +0000 (04:50 -0400)]
raw/ifpga: fix file handle leak

Coverity issue: 379064
Fixes: 673c897f4d73 ("raw/ifpga: support OFS card probing")

Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
2 years agomaintainers: update for testpmd
Xiaoyun Li [Mon, 13 Jun 2022 08:36:57 +0000 (16:36 +0800)]
maintainers: update for testpmd

Resigning my maintainership for testpmd.

Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com>
Acked-by: Yuying Zhang <yuying.zhang@intel.com>
2 years agopipeline: rework optimization pattern for header generation
Cristian Dumitrescu [Thu, 16 Jun 2022 14:16:45 +0000 (15:16 +0100)]
pipeline: rework optimization pattern for header generation

The P4 language requires marking a header as valid before any of the
header fields are written as opposed to after the writes are done.
Hence, the optimization of replacing the sequence of instructions to
generate a header by reading it from the table action data with a
single DMA internal instruction are reworked from "mov all + validate
-> dma" to "validate + mov all -> dma".

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
2 years agopipeline: fix check maximum learner table timeouts
Harshad Narayane [Thu, 16 Jun 2022 09:14:55 +0000 (10:14 +0100)]
pipeline: fix check maximum learner table timeouts

Fix comparison used to check against the maximum number of learner
table timeouts.

Fixes: e2ecc53582fb ("pipeline: improve learner table timers")

Signed-off-by: Harshad Narayane <harshad.suresh.narayane@intel.com>
Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
2 years agopipeline: fix packet mirroring configuration
Cristian Dumitrescu [Mon, 13 Jun 2022 17:28:34 +0000 (18:28 +0100)]
pipeline: fix packet mirroring configuration

Fix segmentation fault due to null pointer dereferencing inside the
"mirror" instruction when number of mirroring slots is set to 0. This
was taking place when the "mirror" instruction was used without the
mirror feature being properly configured, i.e. the API function
rte_swx_pipeline_mirroring_config was not called at initialization.

Fixes: dac0ecd9098 ("pipeline: support packet mirroring")

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
2 years agodma/hisilicon: fix includes in header file
Min Hu (Connor) [Tue, 14 Jun 2022 09:33:19 +0000 (17:33 +0800)]
dma/hisilicon: fix includes in header file

Header files should be self contained. This patch fixed it.

Fixes: 9e16317a38f9 ("dma/hisilicon: add probing")
Cc: stable@dpdk.org
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
2 years agodma/skeleton: support multiple instances
Sivaprasad Tummala [Wed, 8 Jun 2022 08:50:07 +0000 (16:50 +0800)]
dma/skeleton: support multiple instances

DPDK app can support multiple hardware DMA instances.
With DMA skeleton, only a single instance can be configured.

This patch supports multiple driver instances per device.

Signed-off-by: Sivaprasad Tummala <sivaprasad.tummala@amd.com>
Tested-by: Vipin Varghese <vipin.varghese@amd.com>
Reviewed-by: Chengwen Feng <fengchengwen@huawei.com>
Tested-by: Chengwen Feng <fengchengwen@huawei.com>
2 years agotest/dma: reset last index before checking completion
Chengwen Feng [Wed, 8 Jun 2022 08:50:06 +0000 (16:50 +0800)]
test/dma: reset last index before checking completion

Some DMA PMD may not update last-idx when no DMA completed, the
previous patch [1] cannot detect this problem actually.

This patch resets last-idx before invoking DMA completed ops to fix it.

[1] test/dma: check index when no DMA completed

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>