Timothy McDaniel [Sat, 1 May 2021 19:03:46 +0000 (14:03 -0500)]
event/dlb2: add v2.5 create dir queue
Update the low level HW functions responsible for
creating directed queues. These functions configure
the depth threshold, configure queue depth, and
validate the queue creation arguments.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware
version, v2.0 or v2.5.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Timothy McDaniel [Sat, 1 May 2021 19:03:45 +0000 (14:03 -0500)]
event/dlb2: add v2.5 create dir port
Update the low level HW functions responsible for
creating directed ports. These functions create the
producer port (PP), configure the consumer queue (CQ),
configure queue depth, and validate the port creation
arguments.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware
version, v2.0 or v2.5.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Timothy McDaniel [Sat, 1 May 2021 19:03:44 +0000 (14:03 -0500)]
event/dlb2: add v2.5 create LDB port
Update the low level HW functions responsible for
creating load balanced ports. These functions create the
producer port (PP), configure the consumer queue (CQ), and
validate the port creation arguments.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware
version, v2.0 or v2.5.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Timothy McDaniel [Sat, 1 May 2021 19:03:43 +0000 (14:03 -0500)]
event/dlb2: add v2.5 create LDB queue
Updated low level hardware functions related to configuring
load balanced queues. These functions create the queues,
as well as attach related resources required by load
balanced queues, such as sequence numbers.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register access macros are used so that the code
can perform the correct action based on the hardware
version, v2.0 or v2.5.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Timothy McDaniel [Sat, 1 May 2021 19:03:42 +0000 (14:03 -0500)]
event/dlb2: add v2.5 domain reset
Reset hardware registers, consumer queues, ports,
interrupts and software. Queues must also be drained
as part of the reset process.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware
version, v2.0 or v2.5.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Timothy McDaniel [Sat, 1 May 2021 19:03:41 +0000 (14:03 -0500)]
event/dlb2: add v2.5 create sched domain
Update domain creation logic to account for DLB v2.5
credit scheme, new register map, and new register access
macros.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Timothy McDaniel [Sat, 1 May 2021 19:03:40 +0000 (14:03 -0500)]
event/dlb2: add v2.5 get resources
DLB v2.5 uses a new credit scheme, where directed and load balanced
credits are unified, instead of having separate directed and load
balanced credit pools.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Timothy McDaniel [Sat, 1 May 2021 19:03:39 +0000 (14:03 -0500)]
event/dlb2: add v2.5 HW init
Add support for DLB v2.5 probe-time hardware init,
and sets up a framework for incorporating the remaining
changes required to support DLB v2.5.
DLB v2.0 and DLB v2.5 are similar in many respects, but their
register offsets and definitions are different. As a result of these,
differences, the low level hardware functions must take the device
version into consideration. This requires that the hardware version be
passed to many of the low level functions, so that the PMD can
take the appropriate action based on the device version.
To ease the transition and keep the individual patches small, three
temporary files are added in this commit. These files have "new"
in their names. The files with "new" contain changes specific to a
consolidated PMD that supports both DLB v2.0 and DLB 2.5. Their sister
files of the same name (minus "new") contain the old DLB v2.0 specific
code. The intent is to remove code from the original files as that code
is ported to the combined DLB 2.0/2.5 PMD model and added to the "new"
files in a series of commits. At end of the patch series, the old files
will be empty and the "new" files will have the logic needed
to implement a single PMD that supports both DLB v2.0 and DLB v2.5.
At that time, the original DLB v2.0 specific files will be deleted,
and the "new" files will be renamed and replace them.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Timothy McDaniel [Sat, 1 May 2021 19:03:38 +0000 (14:03 -0500)]
event/dlb2: add v2.5 HW register definitions
Add auto-generated register definitions, updated to
support both DLB v2.0 and v2.5 devices.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Timothy McDaniel [Sat, 1 May 2021 19:03:37 +0000 (14:03 -0500)]
event/dlb2: add v2.5 probe
This commit adds dlb v2.5 probe support, and updates
parameter parsing.
The dlb v2.5 device differs from dlb v2, in that the
number of resources (ports, queues, ...) is different,
so macros have been added to take the device version
into account.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Timothy McDaniel [Sat, 1 May 2021 19:03:36 +0000 (14:03 -0500)]
event/dlb2: remove useless code
- Remove references of FPGA.
- Do not include dlb2_mbox.h as it is not needed.
- Remove duplicate macros/defines that were
present in both dlb2_priv.h and dlb2_hw_types.h.
Update dlb2_resource.c to include dlb2_priv.h
so that it picks up the macros/defines that
have now been consolidated.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Chengwen Feng [Fri, 30 Apr 2021 09:34:38 +0000 (17:34 +0800)]
eventdev: fix memory leakage on thread creation failure
This patch fixes the issue that epoll_events memory is not released
after the intr thread created fail.
Fixes:
3810ae435783 ("eventdev: add interrupt driven queues to Rx adapter")
Cc: stable@dpdk.org
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Chengwen Feng [Fri, 30 Apr 2021 09:34:37 +0000 (17:34 +0800)]
eventdev: remove redundant thread name setting
The thread name already set by rte_ctrl_thread_create() API, so remove
the call of rte_thread_setname() API.
Fixes:
3810ae435783 ("eventdev: add interrupt driven queues to Rx adapter")
Cc: stable@dpdk.org
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Shijith Thotton [Mon, 26 Apr 2021 12:21:07 +0000 (17:51 +0530)]
event/octeontx2: configure crypto adapter xaq pool
Configure xaq pool based on number of in-use crypto queues to avoid CPT
add work failure due to xaq buffer run out. This patch configures
OTX2_CPT_DEFAULT_CMD_QLEN number of xae entries per queue pair.
Fixes:
29768f78d5a7 ("event/octeontx2: add crypto adapter framework")
Cc: stable@dpdk.org
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Shijith Thotton [Mon, 26 Apr 2021 12:21:06 +0000 (17:51 +0530)]
event/octeontx2: fix crypto adapter queue pair operations
Parameter queue_pair_id of crypto adapter queue pair add/del operation
can be -1 to select all pre configured crypto queue pairs. Added support
for the same in driver. Also added a member in cpt qp structure to
indicate binding state of a queue pair to an event queue.
Fixes:
29768f78d5a7 ("event/octeontx2: add crypto adapter framework")
Cc: stable@dpdk.org
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Ankur Dwivedi <adwivedi@marvell.com>
Min Hu (Connor) [Fri, 23 Apr 2021 07:38:08 +0000 (15:38 +0800)]
app/eventdev: fix overflow in lcore list parsing
Tainted and unvalidated integer 'idx' used as an index, which may
lead to buffer overflow.
This patch fixed it.
Fixes:
89e5eb118017 ("app/testeventdev: add string parsing helpers")
Cc: stable@dpdk.org
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Suanming Mou [Tue, 4 May 2021 17:55:00 +0000 (20:55 +0300)]
common/mlx5: add UMR and RDMA write WQE definitions
This patch adds the struct defining UMR and RDMA write WQEs.
Signed-off-by: Suanming Mou <suanmingm@nvidia.com>
Signed-off-by: Matan Azrad <matan@nvidia.com>
Dekel Peled [Tue, 4 May 2021 17:54:59 +0000 (20:54 +0300)]
common/mlx5: support DevX register write access
This patch adds support of write operation to NIC registers.
Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Dekel Peled [Tue, 4 May 2021 17:54:58 +0000 (20:54 +0300)]
common/mlx5: add crypto register structs and definitions
Encryption key management requires use of several related registers.
This patch adds the relevant structs and values, according to PRM
definitions.
Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Dekel Peled [Tue, 4 May 2021 17:54:57 +0000 (20:54 +0300)]
common/mlx5: support general object credential
CREDENTIAL object is used for any crypto operation in wrapped mode.
This patch add support of CREDENTIAL object create operation.
Add reading of CREDENTIAL support capability.
Add function to create general object type CREDENTIAL, using DevX API.
Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Shiri Kuzin [Tue, 4 May 2021 17:54:56 +0000 (20:54 +0300)]
common/mlx5: share Verbs device match function
The get_ib_device_match function iterates over the list of ib devices
returned by the get_device_list glue function and returns the ib device
matching the provided address.
Since this function is in use by several drivers, in this patch we
share the function in common part.
Signed-off-by: Shiri Kuzin <shirik@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Shiri Kuzin [Tue, 4 May 2021 17:54:55 +0000 (20:54 +0300)]
common/mlx5: share hash list tool
In order to use the hash list defined in net in other drivers, the
hash list is moved to common utilities.
In addition, the log definition was moved from the common utilities to
a dedicated new log file in common in order to prevent a conflict.
Signed-off-by: Shiri Kuzin <shirik@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Dekel Peled [Tue, 4 May 2021 17:54:54 +0000 (20:54 +0300)]
common/mlx5: add crypto BSF struct and definitions
This patch adds the struct defining crypto BSF segment of UMR WQE,
and the related value definitions and offsets.
Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Dekel Peled [Tue, 4 May 2021 17:54:53 +0000 (20:54 +0300)]
common/mlx5: support general object crypto login
CRYPTO_LOGIN Object is used to login to the device as crypto user
or crypto officer.
Required in order to perform any crypto related control operations.
This patch adds support of CRYPTO_LOGIN object create operation.
Add reading of CRYPTO_LOGIN support capability.
Add function to create general object type CRYPTO_LOGIN, using DevX API.
Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Dekel Peled [Tue, 4 May 2021 17:54:52 +0000 (20:54 +0300)]
common/mlx5: support general object KEK import
IMPORT_KEK object is used to wrap (encrypt) critical security
parameters, such as other keys and credentials, when those need
to be passed between the device and the software.
This patch add support of IMPORT_KEK object create operation.
Add reading of IMPORT_KEK support capability.
Add function to create general object type IMPORT_KEK, using DevX API.
Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Dekel Peled [Tue, 4 May 2021 17:54:51 +0000 (20:54 +0300)]
common/mlx5: adjust DevX mkey fields for crypto
MKEY that will be used for crypto purposes must be created with
crypto_en and remote access attributes.
This patch adds support for them in the DevX MKEY context.
Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Dekel Peled [Tue, 4 May 2021 17:54:50 +0000 (20:54 +0300)]
common/mlx5: support general object DEK
Data Encryption Keys (DEKs) are the keys used for data
encryption/decryption operations.
Add reading of DEK support capability.
Add function to create general object type DEK, using DevX API.
Arrange common version.map file in alphabetical order.
Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Dekel Peled [Tue, 4 May 2021 17:54:49 +0000 (20:54 +0300)]
common/mlx5: add HCA capabilities for AES-XTS crypto
Update the PRM structure and HCA capabilities reading, to include
relevant capabilities for AES-XTS crypto.
Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Dekel Peled [Tue, 4 May 2021 17:54:48 +0000 (20:54 +0300)]
common/mlx5: optimize read of general capabilities
General object types support is indicated in bitmap general_obj_types,
which is part of HCA capabilities list.
Currently this bitmap is read multiple times, and each time a different
bit is extracted.
This patch optimizes the code, reading the bitmap once into a local
variable, and then extracting the required bits.
Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Dekel Peled [Tue, 4 May 2021 17:54:47 +0000 (20:54 +0300)]
common/mlx5: rename GENEVE TLV option object
Rename MLX5_OBJ_TYPE_GENEVE_TLV_OPT as
MLX5_GENERAL_OBJ_TYPE_GENEVE_TLV_OPT, to align with other general
objects names.
Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Dekel Peled [Tue, 4 May 2021 17:54:46 +0000 (20:54 +0300)]
common/mlx5: remove redundant spaces in PRM header
File drivers/common/mlx5/mlx5_prm.h includes structs representing
data items as defined in PRM document.
Some of these structs were copied as-is from kernel file mlx5_ifc.h.
As result the structs are not all aligned with the same spacing.
This patch removes redundant spaces and new lines from several structs,
to align all structs in mlx5_prm.h to the same format.
Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Olivier Matz [Tue, 27 Apr 2021 13:56:46 +0000 (15:56 +0200)]
mbuf: clarify usage of packet pool initializers
Clarify that the mempool private initializer and object initializer used
for packet pools require that the mempool private size is large enough.
Also add an assert (only enabled when -DRTE_ENABLE_ASSERT is passed) to
check this constraint.
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Aaron Conole <aconole@redhat.com>
Olivier Matz [Tue, 27 Apr 2021 13:56:45 +0000 (15:56 +0200)]
test/mempool: fix object initializer
The function rte_pktmbuf_init() expects that the mempool private area is
large enough and was previously initialized by rte_pktmbuf_pool_init(),
which is not the case.
This causes the function rte_pktmbuf_priv_size() to return an
unpredictable value, and this value is used as a size in a memset.
Replace the mempool object initializer by my_obj_init(), which does not
have this constraint, and fits the needs for this test.
Fixes:
923ceaeac140 ("test/mempool: add unit test cases")
Cc: stable@dpdk.org
Reported-by: Wenwu Ma <wenwux.ma@intel.com>
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Chengwen Feng [Fri, 23 Apr 2021 08:11:04 +0000 (16:11 +0800)]
mbuf: check shared memory before dumping dynamic space
Because mbuf dyn shared memory was allocated runtime, so it's
necessary to check validity when dump mbuf dyn info.
Also this patch adds an error logging when init shared memory fail.
Fixes:
4958ca3a443a ("mbuf: support dynamic fields and flags")
Cc: stable@dpdk.org
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
Tal Shnaiderman [Wed, 21 Apr 2021 16:09:42 +0000 (19:09 +0300)]
eal/windows: fix MinGW build
the strncasecmp macro defined in rte_os_shim.h is already
defined in MinGW-w64, as a result the compiler prints out
the warning below on function redefinition whenever compiling
a file including the header in debug mode.
lib/eal/windows/include/rte_os_shim.h:21:
warning: "strncasecmp" redefined
Fixed by defining the macro only to the clang compiler.
Fixes:
45d62067c237 ("eal: make OS shims internal")
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Juraj Linkeš [Thu, 22 Apr 2021 09:11:51 +0000 (11:11 +0200)]
eal/arm64: fix platform register bit
REG_PLATFORM only uses bit 0 to indicate whether the value retrieved
from hardware matches PLATFORM_STR.
Fixes:
97523f822ba9 ("eal/arm: add CPU flags for ARMv8")
Cc: stable@dpdk.org
Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Bruce Richardson [Tue, 4 May 2021 13:14:58 +0000 (14:14 +0100)]
raw/ioat: report status of completed jobs
Add improved error handling to rte_ioat_completed_ops(). This patch adds
new parameters to the function to enable the user to track the completion
status of each individual operation in a batch. With this addition, the
function can help the user to determine firstly, how many operations may
have failed or been skipped and then secondly, which specific operations
did not complete successfully.
Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Kevin Laatz [Tue, 4 May 2021 13:14:57 +0000 (14:14 +0100)]
raw/ioat: add API to query remaining ring space
Add a new API to query remaining descriptor ring capacity. This API is
useful, for example, when an application needs to enqueue a fragmented
packet and wants to ensure that all segments of the packet will be enqueued
together.
Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Bruce Richardson [Tue, 4 May 2021 13:14:56 +0000 (14:14 +0100)]
raw/ioat: rework SW ring layout
The ring management in the idxd part of the driver is more complex than
it needs to be, tracking individual batches in a ring and having null
descriptors as padding to avoid having single-operation batches. This can
be simplified by using a regular ring-based layout, with additional
overflow at the end to ensure that the one does not need to wrap within a
batch.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Bruce Richardson [Tue, 4 May 2021 13:14:55 +0000 (14:14 +0100)]
raw/ioat: move idxd functions to separate file
Split the rte_ioat_rawdev_fns.h file into two separate headers, so that
the data structures for the original ioat devices and the newer idxd
ones can be kept separate from each other. This makes code management
and rework easier.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Bruce Richardson [Tue, 4 May 2021 13:14:54 +0000 (14:14 +0100)]
raw/ioat: add bus driver for device scanning automatically
Rather than using a vdev with args, DPDK can scan and initialize the
devices automatically using a bus-type driver. This bus does not need to
worry about registering device drivers, rather it can initialize the
devices directly on probe.
The device instances (queues) to use are detected from /dev with the
additional info about them got from /sys.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Kevin Laatz [Tue, 4 May 2021 13:14:53 +0000 (14:14 +0100)]
raw/ioat: allow perform operations function to return error
Change the return type for the rte_ioat_perform_ops() function from void to
int to allow the possibility of returning an error code in future, should
it be necessary.
Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
Bruce Richardson [Tue, 4 May 2021 13:14:52 +0000 (14:14 +0100)]
raw/ioat: make workqueue name configurable in script
Add a "--name-prefix" parameter to the quick configuration script for
DSA. This allows the queues configured on a DSA instance to be made
available to only one DPDK process in a setup with multiple DPDK process
instances.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Bruce Richardson [Tue, 4 May 2021 13:14:51 +0000 (14:14 +0100)]
raw/ioat: fix script for configuring small number of queues
The dpdk_idxd_cfg.py script included with the driver for convenience did
not work properly where the number of queues to be configured was
less than the number of groups or engines. This was because there would
be configured groups/engines not assigned to queues. Fix this by
limiting the engine and group counts to be no bigger than the number of
queues.
Fixes:
01863b9d2354 ("raw/ioat: include example configuration script")
Cc: stable@dpdk.org
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Bruce Richardson [Tue, 4 May 2021 13:14:50 +0000 (14:14 +0100)]
raw/ioat: expand descriptor struct to full 64 bytes
Although it's unused by the driver, add the interrupt handle field in
the descriptor to the descriptor structure for completeness, and
explicitly add the reserved padding field on the end of the structure
too. This means that when a descriptor is defined on the stack, or
initialized by the compiler, the unused/reserved space will be zeroed
appropriately.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Bruce Richardson [Tue, 4 May 2021 13:14:49 +0000 (14:14 +0100)]
raw/ioat: add component prefix to log messages
Add the driver prefix "IOAT" to log messages for the driver.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Bruce Richardson [Tue, 4 May 2021 13:14:48 +0000 (14:14 +0100)]
raw/ioat: support limiting queues for idxd PCI device
When using a full device instance via vfio, allow the user to specify a
maximum number of queues to configure rather than always using the max
number of supported queues.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Bruce Richardson [Tue, 4 May 2021 13:14:47 +0000 (14:14 +0100)]
raw/ioat: add unit tests for completion batching
Add in additional unit tests to verify that we can get completion reports
of multiple batches in a single completed_ops() call. Also verify we can
get smaller number of completions if that is requested too.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
David Christensen [Wed, 28 Apr 2021 20:10:16 +0000 (13:10 -0700)]
config/ppc: reduce number of cores and NUMA nodes
When setting RTE_MAX_LCORES to the maximum value supported by ppc
hardware (1536), the lcores_autotest may timeout after 30 seconds
because the test takes nearly 60 seconds to complete. Set max_lcores to
a lower value because the maximum value is unlikely to be seen in any
production systems and to eliminate the quick test timeout error.
Bugzilla ID: 684
Fixes:
db1f2f8a9fe5 ("config: increase maximum lcores for ppc")
Cc: stable@dpdk.org
Signed-off-by: David Christensen <drc@linux.vnet.ibm.com>
Acked-by: Luca Boccassi <bluca@debian.org>
Bruce Richardson [Mon, 26 Apr 2021 10:54:03 +0000 (11:54 +0100)]
build: fix formatting of Meson lists
Running "./devtools/check-meson.py --fix" on the DPDK repo fixes a
number of issues with whitespace and formatting of files:
* indentation of lists
* missing trailing commas on final list element
* multiple list entries per line when list is not all single-line
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Bruce Richardson [Mon, 26 Apr 2021 10:54:02 +0000 (11:54 +0100)]
devtools: add script to check indentation of Meson lists
This is a script to fix up minor formatting issues in meson files.
It scans for, and can optionally fix, indentation issues and missing
trailing commas in the lists in meson.build files. It also detects,
and can fix, multi-line lists where more than one entry appears on a
line.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Anatoly Burakov <anatoly.burakov@intel.com>
Joyce Kong [Tue, 27 Apr 2021 16:01:40 +0000 (11:01 -0500)]
mempool: distinguish cache and pool debug counters
If cache is enabled, objects will be retrieved/put from/to cache,
subsequently from/to the common pool. Now the debug stats calculate
the objects retrieved/put from/to cache and pool together, it is
better to distinguish them.
Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Signed-off-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
Dharmik Thakkar [Tue, 27 Apr 2021 16:01:39 +0000 (11:01 -0500)]
mempool: make stats macro generic
Make __MEMPOOL_STAT_ADD macro more generic and delete
__MEMPOOL_CONTIG_BLOCKS_STAT_ADD macro.
Suggested-by: Olivier Matz <olivier.matz@6wind.com>
Signed-off-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
Stanislaw Kardach [Mon, 12 Apr 2021 08:28:59 +0000 (10:28 +0200)]
stack: allow lock-free only on relevant architectures
Since commit
7911ba0473e0 ("stack: enable lock-free implementation for
aarch64"), lock-free stack is supported on arm64 but this description was
missing from the doxygen for the flag.
Currently it is impossible to detect programmatically whether lock-free
implementation of rte_stack is supported. One could check whether the
header guard for lock-free stubs is defined (_RTE_STACK_LF_STUBS_H_) but
that's an unstable implementation detail. Because of that currently all
lock-free ring creations silently succeed (as long as the stack header
is 16B long) which later leads to push and pop operations being NOPs.
The observable effect is that stack_lf_autotest fails on platforms not
supporting the lock-free. Instead it should just skip the lock-free test
altogether.
This commit adds a new errno value (ENOTSUP) that may be returned by
rte_stack_create() to indicate that a given combination of flags is not
supported on a current platform.
This is detected by checking a compile-time flag in the include logic in
rte_stack_lf.h which may be used by applications to check the lock-free
support at compile time.
Use the added RTE_STACK_LF_SUPPORTED flag to disable the lock-free stack
tests at the compile time.
Perf test doesn't fail because rte_ring_create() succeeds, however
marking this test as skipped gives a better indication of what actually
was tested.
Fixes:
7911ba0473e0 ("stack: enable lock-free implementation for aarch64")
Signed-off-by: Stanislaw Kardach <kda@semihalf.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
David Marchand [Mon, 3 May 2021 13:26:43 +0000 (15:26 +0200)]
mbuf: mark offload flag as deprecated
PKT_RX_EIP_CKSUM_BAD has been declared deprecated but there was no
warning to applications still using it.
Fix this by marking as deprecated with the newly introduced
RTE_DEPRECATED.
Fixes:
e8a419d6de4b ("mbuf: rename outer IP checksum macro")
Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Flavio Leitner <fbl@sysclose.org>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Lance Richardson <lance.richardson@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Thomas Monjalon [Wed, 21 Apr 2021 22:28:57 +0000 (00:28 +0200)]
version: 21.05-rc1
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Thomas Monjalon [Sat, 17 Apr 2021 22:16:48 +0000 (00:16 +0200)]
doc: announce support of Alpine Linux
After many patches in several releases to make DPDK buildable with musl,
and few adjustments for busybox, it is time to show the support of DPDK
built in Alpine Linux.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Thomas Monjalon [Thu, 18 Mar 2021 11:00:49 +0000 (12:00 +0100)]
doc: fix names of UIO drivers
Fix typos in the names of kernel drivers based on UIO,
and make sure the generic term for the interface is UIO in capitals.
Fixes:
3a78b2f73206 ("doc: add virtio crypto PMD guide")
Fixes:
3cc4d996fa75 ("doc: update VFIO usage in qat crypto guide")
Fixes:
39922c470e3c ("doc: add known uio_pci_generic issue for i40e")
Fixes:
86fa6c57a175 ("doc: add known igb_uio issue for i40e")
Fixes:
beff6d8e8e2e ("net/netvsc: add documentation")
Cc: stable@dpdk.org
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Dmitry Kozlyuk [Wed, 21 Apr 2021 19:33:51 +0000 (22:33 +0300)]
net/pcap: build on Windows
Implement OS-dependent functions and enable build for Windows.
Account for different library name in Windows libpcap distributions.
Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Dmitry Kozlyuk [Wed, 21 Apr 2021 19:33:50 +0000 (22:33 +0300)]
net/pcap: move OS-dependent code to separate files
PCAP PMD queries interface information differently for Linux and
FreeBSD, OS-specific code is guarded by #ifdef. This PMD also depends on
POSIX bits, namely gettimeofday() and NAME_MAX.
Move OS-dependent code to separate files.
Replace POSIX bits with DPDK equivalents.
Rename rte_eth_pcap.c to pcap_ethdev.c, like it is in most other PMDs.
Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Dmitry Kozlyuk [Wed, 21 Apr 2021 19:33:49 +0000 (22:33 +0300)]
eal: add timespec_get shim
C11 timespec_get() is not provided on some platforms:
* MinGW-w64 does not currently implement it [1].
* FreeBSD 11 with Clang 10.0.0 does not provide it.
Add internal shims to Windows and FreeBSD EALs.
For Windows, it can be removed after [1] is fixed.
[1]: https://sourceforge.net/p/mingw-w64/mailman/message/
37224689/
Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Acked-by: Jie Zhou <jizh@linux.microsoft.com>
Acked-by: Nick Connolly <nick.connolly@mayadata.io>
Chengwen Feng [Wed, 21 Apr 2021 09:15:35 +0000 (17:15 +0800)]
net/e1000/base: fix timeout for shadow RAM write
This fixes the timed out for shadow RAM write EEWR can't be detected.
Fixes:
5a32a257f957 ("e1000: more NICs in base driver")
Cc: stable@dpdk.org
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
Murphy Yang [Wed, 21 Apr 2021 03:44:03 +0000 (03:44 +0000)]
net/i40e: fix flow director for common pctypes
Currently, FDIR doesn't work for all common PCTYPEs, the root cause is
that input set is not configured.
Fixes:
4a072ad43442 ("net/i40e: fix flow director config after flow validate")
Cc: stable@dpdk.org
Signed-off-by: Murphy Yang <murphyx.yang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
Min Hu (Connor) [Wed, 21 Apr 2021 12:36:33 +0000 (20:36 +0800)]
ethdev: add sanity checks in control APIs
This patch adds more sanity checks in control path APIs.
Fixes:
214ed1acd125 ("ethdev: add iterator to match devargs input")
Fixes:
3d98f921fbe9 ("ethdev: unify prefix for static functions and variables")
Fixes:
0366137722a0 ("ethdev: check for invalid device name")
Fixes:
d948f596fee2 ("ethdev: fix port data mismatched in multiple process model")
Fixes:
5b7ba31148a8 ("ethdev: add port ownership")
Fixes:
f8244c6399d9 ("ethdev: increase port id range")
Cc: stable@dpdk.org
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Kevin Traynor <ktraynor@redhat.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Chengwen Feng [Wed, 21 Apr 2021 03:24:59 +0000 (11:24 +0800)]
app/testpmd: support display queue state
This patch supports display queue state in "show rxq/txq" commands.
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Huisong Li [Wed, 21 Apr 2021 09:41:31 +0000 (17:41 +0800)]
app/testpmd: show link flow control info
This patch supports the query of the link flow control parameter
on a port.
The command format is as follows:
show port <port_id> flow_ctrl
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Acked-by: Xiaoyun Li <xiaoyun.li@intel.com>
Acked-by: Kevin Traynor <ktraynor@redhat.com>
Chengwen Feng [Wed, 21 Apr 2021 08:45:02 +0000 (16:45 +0800)]
app/testpmd: support cleanup Tx queue mbufs
This patch supports cleanup txq mbufs command:
port cleanup (port_id) txq (queue_id) (free_cnt)
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Lijun Ou <oulijun@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Ivan Malov [Tue, 20 Apr 2021 21:10:06 +0000 (00:10 +0300)]
net/sfc: add more debug messages to transfer flows
These are really helpful when it comes to tracking
resource sharing and debugging various leaks.
Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Ivan Malov [Tue, 20 Apr 2021 21:10:05 +0000 (00:10 +0300)]
net/sfc: revise FW RSRC free error logs in transfer rules
The current code simply forwards FW resource free failure
to the application leaving the operation incomplete. This
stalls the application and makes debugging very difficult.
Make the driver proceed with handling FW resource free in
the case of errors. Add explicit error logging statements.
Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Ivan Malov [Tue, 20 Apr 2021 21:10:04 +0000 (00:10 +0300)]
net/sfc: fix outer rule and encap rollback on error
Add missing statements to invalidate MAE resource IDs.
Fixes:
dadff137931c ("net/sfc: support encap flow items in transfer rules")
Fixes:
1bbd1ec2348a ("net/sfc: support action VXLAN encap in MAE backend")
Cc: stable@dpdk.org
Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Haifei Luo [Tue, 20 Apr 2021 14:04:50 +0000 (17:04 +0300)]
app/testpmd: support policy actions per color
Add the create/del policy CLIs to support actions per color.
The CLIs are:
Create: add port meter policy (port_id) (policy_id) g_actions (actions)
y_actions (actions) r_actions (actions)
Delete: del port meter policy (port_id) (policy_id)
Examples:
testpmd> add port meter policy 0 1 g_actions rss / end y_actions end
r_actions drop / end
testpmd> del port meter policy 0 1
Signed-off-by: Haifei Luo <haifeil@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Li Zhang [Tue, 20 Apr 2021 14:04:49 +0000 (17:04 +0300)]
ethdev: add pre-defined meter policy API
Currently, the flow meter policy does not support multiple actions
per color; also the allowed action types per color are very limited.
In addition, the policy cannot be pre-defined.
Due to the growing in flow actions offload abilities there is a potential
for the user to use variety of actions per color differently.
This new meter policy API comes to allow this potential in the most ethdev
common way using rte_flow action definition.
A list of rte_flow actions will be provided by the user per color
in order to create a meter policy.
In addition, the API forces to pre-define the policy before
the meters creation in order to allow sharing of single policy
with multiple meters efficiently.
meter_policy_id is added into struct rte_mtr_params.
So that it can get the policy during the meters creation.
Allow coloring the packet using a new rte_flow_action_color
as could be done by the old policy API.
Add two common policy template as macros in the head file.
The next API function were added:
- rte_mtr_meter_policy_add
- rte_mtr_meter_policy_delete
- rte_mtr_meter_policy_update
- rte_mtr_meter_policy_validate
The next struct was changed:
- rte_mtr_params
- rte_mtr_capabilities
The next API was deleted:
- rte_mtr_policer_actions_update
To support this API the following app were changed:
app/test-flow-perf: clean meter policer
app/testpmd: clean meter policer
To support this API the following drivers were changed:
net/softnic: support meter policy API
1. Cleans meter rte_mtr_policer_action.
2. Supports policy API to get color action as policer action did.
The color action will be mapped into rte_table_action_policer.
net/mlx5: clean meter creation management
Cleans and breaks part of the current meter management
in order to allow better design with policy API.
Signed-off-by: Li Zhang <lizh@nvidia.com>
Signed-off-by: Haifei Luo <haifeil@nvidia.com>
Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Acked-by: Ori Kam <orika@nvidia.com>
Acked-by: Jasvinder Singh <jasvinder.singh@intel.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Siwar Zitouni [Mon, 19 Apr 2021 12:53:48 +0000 (14:53 +0200)]
net/ice: fix disabling promiscuous mode
When promiscuous mode is disabled, allmulticast is
also disabled, even if it was previously enabled.
Add a test in ice_promisc_disable()
to check if allmulticast should be kept enabled.
Fixes:
c945e4bf9063 ("net/ice: support promiscuous mode")
Cc: stable@dpdk.org
Signed-off-by: Thibaut Collet <thibaut.collet@6wind.com>
Signed-off-by: Siwar Zitouni <siwar.zitouni@6wind.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Leyi Rong [Tue, 20 Apr 2021 05:29:45 +0000 (13:29 +0800)]
net/i40e: add Tx preparation for simple Tx datapath
Introduce i40e_simple_prep_pkts() as the preparation function for
simple Tx data path, as it's for sanity check for simple Tx.
Suggested-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Li Zhang [Tue, 20 Apr 2021 10:55:21 +0000 (13:55 +0300)]
net/mlx5: allow multiple flow tables on same level
The driver devices support creation of multiple flow tables.
Jump action can be used in order to move the packet steering
to different flow table.
Table 0 is always the root table for packet steering.
Jumping between tables may cause endless loops in steering mechanism,
that's why each table has level attribute,
the driver sub-system may not allow jumping to table with
equal or lower level than the current table.
Currently, in the driver, the table ID and level are always identical.
Allow multiple flow table creation with the same level attribute.
This patch adds the table id in flow table data entry, while
allocates the flow table, if the table level is same but the
different table id, the new table will be allocated with new
table object id. It supports 4M multiple flow tables on the
same level.
Signed-off-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Li Zhang [Tue, 20 Apr 2021 10:55:20 +0000 (13:55 +0300)]
net/mlx5: make ASO meter queue thread-safe
Synchronize ASO meter queue accesses from
different threads using a spinlock.
Signed-off-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Li Zhang [Tue, 20 Apr 2021 10:55:19 +0000 (13:55 +0300)]
net/mlx5: support ASO meter action
When ASO action is available, use it as the meter action
Signed-off-by: Shun Hao <shunh@nvidia.com>
Signed-off-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Li Zhang [Tue, 20 Apr 2021 10:55:18 +0000 (13:55 +0300)]
net/mlx5: add meter ASO queue management
This patch adds the ASO queue management for flow meter,
includes send WQE and CQE handle functions.
Signed-off-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Li Zhang [Tue, 20 Apr 2021 10:55:17 +0000 (13:55 +0300)]
net/mlx5: initialize flow meter ASO SQ
Initialize the flow meter ASO SQ WQEs with
all the constant data that should not be updated
per enqueue operation.
Signed-off-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Li Zhang [Tue, 20 Apr 2021 10:55:16 +0000 (13:55 +0300)]
net/mlx5: add flow meter pool to manage meter object
Add ASO flow meter pool to manage meter object
Signed-off-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Li Zhang [Tue, 20 Apr 2021 10:55:15 +0000 (13:55 +0300)]
common/mlx5: create ASO flow meter object with DevX
Add DevX API to create ASO flow meter object.
Signed-off-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Li Zhang [Tue, 20 Apr 2021 10:55:14 +0000 (13:55 +0300)]
common/mlx5: add read ASO flow meter HCA capability
Read and store the device capability of FLOW_METER_ASO general object,
using the DevX API.
Signed-off-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Li Zhang [Tue, 20 Apr 2021 10:55:13 +0000 (13:55 +0300)]
common/mlx5: add definitions for ASO flow meter
This patch adds different PRM definitions, related to
ASO (Advanced Steering Operation) flow meter feature,
in MLX5 PMD code.
Signed-off-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Shun Hao [Tue, 20 Apr 2021 10:55:12 +0000 (13:55 +0300)]
net/mlx5: use mask for meter register setting
ASO (Advanced Steering Operation) meter feature may require
to locate the flow context tag action after the ASO action.
When color register is shared by meter_id/flow_id, it's like:
Bits[0-7] A meter color value set by the HW.
Bits[8-31] A flow id and meter id set by SW.
Currently the tag action for meter writes all the bits
of the meter register, so it will potentially overwrite
meter color when ASO meter action is before the tag action.
Set only 24-MSB-bits of meter register in the meter tag action.
Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Li Zhang [Tue, 20 Apr 2021 10:55:11 +0000 (13:55 +0300)]
net/mlx5: optimize meter statistics
Meter statistics are each policer action each counter.
Totally 4 counters per each meter.
It causes cache missed
and lead to data forwarding performance low.
To optimize it, support pass counter for green
and drop counter for red.
Totally two counters per each meter.
Also use the global drop statistics for
all meter drop action.
Limitations as below:
1. It does not support yellow counter and return 0.
2. All the meter colors with drop action will be
counted only by the global drop statistics.
3. Red color must be with drop action.
Signed-off-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Shun Hao [Tue, 20 Apr 2021 10:55:10 +0000 (13:55 +0300)]
net/mlx5: fix meter statistics
Currently, packets after meter will be steered to a global policer
table,
which includes green/red color rules for every meter, so as to have
counter statistics of each color in every meter.
There's a bug that all the rules in global policer table are matching
only color criteria, so all packets will be counted to one meter only,
and other meter statistics are always zero.
This patch does these:
1. The rules in policer table matches both meter index and color, so
packet after meter could be counted to the correct meter counter.
2. The meter index and flow index are now sharing the available
register bits dynamically. Meter index starts from lsb, and flow
index starts from msb.
Fixes:
46a5e6bc6a85 ("net/mlx5: prepare meter flow tables")
Cc: stable@dpdk.org
Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Shun Hao [Tue, 20 Apr 2021 10:55:09 +0000 (13:55 +0300)]
common/mlx5: add color register idle bits definition
8 bits are used for meter color in meter register. When the meter
register can be shared, the rest 24 bits can be used by others.
This adds the definition for the 24 bits that can be shared.
Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Suanming Mou [Tue, 20 Apr 2021 10:55:08 +0000 (13:55 +0300)]
net/mlx5: support three level table walk
This commit adds table entry walk for the three level table.
Signed-off-by: Suanming Mou <suanmingm@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Min Hu (Connor) [Tue, 20 Apr 2021 08:59:52 +0000 (16:59 +0800)]
doc: fix Rx burst function in hns3 guide
The patch 'net/hns3: rename Rx burst function' changed `simple'
Rx function name from 'scalar' to 'scalar simple', but doc
ignored that.
This patch fixed it.
Fixes:
aa5baf47e1a3 ("net/hns3: rename Rx burst function")
Cc: stable@dpdk.org
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Min Hu (Connor) [Tue, 20 Apr 2021 08:59:50 +0000 (16:59 +0800)]
net/hns3: ignore devargs parsing return
In hns3 PMD, as the handler always return 0, the return value
of a function 'rte_kvargs_process' no need to be checked. But
the API definition has return value, so 'void' could be used
to ignore that.
Fixes:
a124f9e9591b ("net/hns3: add runtime config to select IO burst function")
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Min Hu (Connor) [Tue, 20 Apr 2021 08:59:49 +0000 (16:59 +0800)]
net/hns3: fix traffic management support check
params->leaf.cman has enum type which is not isomorphic with boolean
type, however it is used as a boolean expression.
This patch fixed it.
Fixes:
c09c7847d892 ("net/hns3: support traffic management")
Cc: stable@dpdk.org
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Min Hu (Connor) [Tue, 20 Apr 2021 08:59:48 +0000 (16:59 +0800)]
net/hns3: remove unused macro
'HNS3_RXD_LKBK_B' was defined in previous versions but no used.
This patch deleted it.
Fixes:
bba636698316 ("net/hns3: support Rx/Tx and related operations")
Cc: stable@dpdk.org
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Ciara Loftus [Tue, 20 Apr 2021 08:44:31 +0000 (09:44 +0100)]
net/af_xdp: use recvfrom only if busy polling enabled
The recvfrom() syscall is only supported by AF_XDP sockets since
kernel 5.11. Only use it if busy polling is configured. We can
assume a kernel >= 5.11 is in use if busy polling is configured
so we can safely call recvfrom() in that case.
Fixes:
63e8989fe5a4 ("net/af_xdp: use recvfrom instead of poll syscall")
Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
Ciara Loftus [Tue, 20 Apr 2021 08:44:30 +0000 (09:44 +0100)]
net/af_xdp: fix trigger for syscall on Tx
The send() syscall on the Tx path is not concerned with busy polling
and as such its invocation should not depend on whether or not it is
configured. Fix this by distinguishing the conditions necessary for
syscalls on the Rx and Tx paths individually.
Fixes:
055a393626ed ("net/af_xdp: prefer busy polling")
Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
Alvin Zhang [Tue, 20 Apr 2021 02:05:20 +0000 (10:05 +0800)]
net/igc: fix Rx packet size
When DEV_RX_OFFLOAD_KEEP_CRC is enabled, the PMD will minus 4 bytes
of CRC from the size of a packet, but the NIC will strip the CRC
because the CRC strip bit in DVMOLR register is not cleared. This
will cause the size of a packet to be 4 bytes less.
This patch updates the CRC strip bit according to whether
DEV_RX_OFFLOAD_KEEP_CRC is enabled.
Fixes:
a5aeb2b9e225 ("net/igc: support Rx and Tx")
Cc: stable@dpdk.org
Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
Kalesh AP [Tue, 20 Apr 2021 04:08:45 +0000 (09:38 +0530)]
net/bnxt: fix health check alarm cancellation
Driver cancels the health check alarm only if error recovery is enabled
in the FW. This can cause an issue. There is a small window where the
driver receives the async event from FW and port close is invoked
immediately. Driver clears BNXT_FLAG_RECOVERY_ENABLED flag when it gets
the async event from FW. As a result, the health check alarm will not
get canceled during port close and causes a segfault when the alarm tries
to read Heartbeat register.
Fix this by canceling the health check alarm unconditionally during
port stop.
Fixes:
9d0cbaecc91a ("net/bnxt: support periodic FW health monitoring")
Cc: stable@dpdk.org
Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Ajit Khaparde [Wed, 14 Apr 2021 23:44:49 +0000 (16:44 -0700)]
net/bnxt: cap max Rx rings for Thor
For Thor devices, RSS table can only accommodate 512 Rx queues.
When RSS is enabled, Cap the max Rx rings to 512.
For non-RSS case, the number will be limited by number of VNICs.
Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Lance Richardson <lance.richardson@broadcom.com>
Ajit Khaparde [Thu, 8 Apr 2021 20:17:47 +0000 (13:17 -0700)]
net/bnxt: fix resource cleanup
Fix resource cleanup in port close.
Once the pointers are freed, set them to NULL.
Make sure access to the pointers is validated before use.
Fixes:
bb81e07323bb ("net/bnxt: support LED on/off")
Fixes:
804e746c7b73 ("net/bnxt: add hardware resource manager init code")
Fixes:
1d0704f4d793 ("net/bnxt: add device configure operation")
Fixes:
698aa7e95325 ("net/bnxt: add code to determine the Tx COS queue")
Fixes:
322bd6e70272 ("net/bnxt: add port representor infrastructure")
Fixes:
0bf5a0b5ebb8 ("net/bnxt: add a failure log")
Cc: stable@dpdk.org
Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Chengchang Tang [Thu, 15 Apr 2021 07:09:54 +0000 (15:09 +0800)]
net/bonding: fix adding itself as its slave
Adding the bond device as its own slave should be forbidden. This
will cause a recursive endless loop in many subsequent operations,
and eventually lead to coredump.
This problem was found in testpmd, the related logs are as follows:
testpmd> create bonded device 1 0
Created new bonded device net_bonding_testpmd_0 on (port 4).
testpmd> add bonding slave 4 4
Segmentation fault (core dumped)
The call stack is as follows:
0x000000000064eb90 in rte_eth_dev_info_get ()
0x00000000006df4b4 in bond_ethdev_info ()
0x000000000064eb90 in rte_eth_dev_info_get ()
0x00000000006df4b4 in bond_ethdev_info ()
0x000000000064eb90 in rte_eth_dev_info_get ()
0x0000000000564e58 in eth_dev_info_get_print_err ()
0x000000000055e8a4 in init_port_config ()
0x000000000052730c in cmd_add_bonding_slave_parsed ()
0x0000000000646f60 in cmdline_parse ()
0x0000000000645e08 in cmdline_valid_buffer ()
0x000000000064956c in rdline_char_in ()
0x0000000000645ee0 in cmdline_in ()
0x00000000006460a4 in cmdline_interact ()
0x0000000000531904 in prompt ()
0x000000000051cca8 in main ()
Fixes:
2efb58cbab6e ("bond: new link bonding library")
Cc: stable@dpdk.org
Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Wei Huang [Thu, 8 Apr 2021 08:51:51 +0000 (04:51 -0400)]
raw/ifpga/base: check size before assigning
In max10_staging_area_init(), variable "size" from fdt_get_reg() may
be invalid, it should be checked before assigning to member variable
"staging_area_size" of structure "intel_max10_device".
Coverity issue: 367480, 367482
Fixes:
96ebfcf8125c ("raw/ifpga/base: add SPI and MAX10 device driver")
Cc: stable@dpdk.org
Signed-off-by: Wei Huang <wei.huang@intel.com>
Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>