eal: use pause only with SSE2

The pause instruction is part of SSE2 extensions.
Note that some compilers define _mm_pause as "rep; nop" instead of "pause".
For compatible processors, they are equivalent.

http://www.intel.com/Assets/PDF/manual/325383.pdf:
"
When executing a spin-wait loop, a Pentium 4 or Intel Xeon processor suffers
a severe performance penalty when exiting the loop because it detects a
possible memory order violation.
The PAUSE instruction provides a hint to the processor that the code sequence
is a spin-wait loop. The processor uses this hint to avoid the memory order
violation in most situations, which greatly improves processor performance.
"

Signed-off-by: Intel

eal: allow to whitelist devices

The new option --use-device is a PCI whitelist.
It is the opposite to -b option.

Signed-off-by: Intel

eal: allow to blacklist address without domain prefix

These 2 formats are now accepted:
    domain:bus:device.function
           bus:device.function

Signed-off-by: Intel

eal: rework CPU mask parsing

The CPU mask was limited to "unsigned long long".
The limit was removed and parsing/init is less loosy.

Signed-off-by: Intel

eal: minor changes

Signed-off-by: Intel

mk: combined library

Allow to merge all libraries (shared or static) into one.

Signed-off-by: Intel

mk: shared libraries

Allow to build shared libraries (.so) instead of static ones (.a).

Signed-off-by: Intel

mk: link with libm

Signed-off-by: Intel

doc: whitespace changes in licenses

Signed-off-by: Intel

update version to 1.4.1

Signed-off-by: Intel

examples/ip_reassembly: various updates

- postpone calls to rte_pktmbuf_free() when a mbuf is not used anymore
- add some tx statistics

Signed-off-by: Intel

examples/dpdk_qat: rework port discovery

Signed-off-by: Intel

examples/qos_sched: minor changes

Signed-off-by: Intel

examples/qos_sched: add --msz for mempool size

Signed-off-by: Intel

examples/l3fwd-power: use DD bit rather than RX queue count

Prefer use of rte_eth_rx_descriptor_done to rte_eth_rx_queue_count.

Signed-off-by: Intel

ixgbe: fix DCB setup

Signed-off-by: Intel

ixgbe: check DD bit for specific RX descriptor

Signed-off-by: Intel

igb: check DD bit of specific RX descriptor

Signed-off-by: Intel

ethdev: check DD bit of specific RX descriptor

Signed-off-by: Intel

ixgbe: RX queue count is not implemented for VF

It was introduced by mistake in version 1.4.0.

Signed-off-by: Intel

ixgbe: use DD bit to count RX available descriptors

Signed-off-by: Intel

igb: use DD bit to count RX available descriptors

Signed-off-by: Intel

ethdev: fix doxygen comment for rte_eth_rx_queue_count

Signed-off-by: Intel

pci: check driver probe return code

Signed-off-by: Intel

mem: rework huge page mapping for secondary process

Signed-off-by: Intel

sched: only support TC 3 oversubscription

Signed-off-by: Intel

sched: add mtu parameter

Signed-off-by: Intel

sched: bitmap is now dynamically allocated

Signed-off-by: Intel

eal: use intrinsic function

Signed-off-by: Intel

update version to 1.4.0

Signed-off-by: Intel

examples/quota_watermark: initial import

Signed-off-by: Intel

examples/ip_reassembly: initial import

Signed-off-by: Intel

examples/l3fwd-vf: release resources on SIGINT

Signed-off-by: Intel

examples/l3fwd: various updates

Signed-off-by: Intel

examples/l2fwd: if no port configured, exit

Signed-off-by: Intel

examples/vmdq_dcb: display port mac address

Signed-off-by: Intel

examples/dpdk_qat: minor change

Signed-off-by: Intel

examples/dpdk_qat: fix cross compile check

Signed-off-by: Intel

examples: work only on defined lcores

Signed-off-by: Intel

examples: time fixes

Signed-off-by: Intel

examples: use global RTE_MAX_ETHPORTS

Signed-off-by: Intel

examples: numa updates

Signed-off-by: Intel

app/testpmd: update csumonly

Signed-off-by: Intel

app: fix build with GCC 4.8

GCC 4.8 was producing this error:
argument to ‘sizeof’ in ‘strncmp’ call is the same expression as the
second source; did you mean to provide an explicit length?
[-Werror=sizeof-pointer-memaccess]

Signed-off-by: Intel

app: only use one thread to run autotests

Signed-off-by: Intel

app: fix build when some libs are disabled

Signed-off-by: Intel

app: rework ring tests

Signed-off-by: Intel

app: add a test on mbuf alignment

Signed-off-by: Intel

app: add tests on --syslog, --no-shconf and --huge-dir flags

Signed-off-by: Intel

app: add some tests

Signed-off-by: Intel

app: remove pmac from Makefile

Signed-off-by: Intel

app: fix Makefile

Signed-off-by: Intel

kni: disable ETHTOOL_GRXRINGS

Signed-off-by: Intel

kni: fix build with kernel 3.8

- timecompare (used for hardware timestamping) has been removed.
(see Linux commit 65f8f9a1c1db831e5159e3e3e50912d1f214cd0c)
Simply disable HW_TIME_STAMP feature because it is not used by KNI.

- annotations __devinit and __devexit have been removed.
(see Linux commit 54b956b903607f8f8878754dd4352da6a54a1da2)

Signed-off-by: Intel

kni: fix multi-process support

Signed-off-by: Intel

ixgbe: force phy power up/down

Signed-off-by: Intel

igb: force phy power up/down

Signed-off-by: Intel

ixgbe: update VMDq/DCB support

Signed-off-by: Intel

igb: update VMDq/DCB support

Signed-off-by: Intel

ethdev: update VMDq/DCB support

Signed-off-by: Intel

ethdev: set VMDq pool when adding mac address

Signed-off-by: Intel

ixgbe: add PF support

Signed-off-by: Intel

igb: add PF support

Signed-off-by: Intel

ethdev: add PF support

Signed-off-by: Intel

ixgbe: support dual vlan

Signed-off-by: Intel

igb: fix max RX packet size and support dual VLAN

When in 'normal' mode, hardware is designed to receive up to 1522 bytes.
When in 'jumbo' mode, RLPML register must be updated so that hardware accepts
a 802.1q vlan header. If dual vlan is enabled, then a second vlan header is
expected, so update RLPML register according to dual vlan support.

Signed-off-by: Intel

ixgbe: retrieve RX available descriptors

Signed-off-by: Intel

igb: retrieve RX available descriptors

Signed-off-by: Intel

e1000: retrieve RX available descriptors

Signed-off-by: Intel

ethdev: retrieve RX available descriptors

Signed-off-by: Intel

ixgbe: RSS RETA configuration

Signed-off-by: Intel

igb: RSS RETA configuration

Signed-off-by: Intel

ethdev: RSS RETA configuration

Signed-off-by: Intel

ixgbe: allocate structures on numa_node

Signed-off-by: Intel

ethdev: store numa_node per device

Signed-off-by: Intel

ixgbe: allow unsupported SFP

Add RTE_LIBRTE_IXGBE_ALLOW_UNSUPPORTED_SFP build option

Signed-off-by: Intel

ixgbe: force inlining

Signed-off-by: Intel

ixgbe: log tx code path

Signed-off-by: Intel

e1000: move workaround for wthresh on 82576 at wrong place

The workaround is moved in e1000em code but 82576 is an igb NIC.
It breaks the fix of the commit 7e9e49feea.

Signed-off-by: Intel <intel.com>

igb: workaround errata with wthresh on 82576

The 82576 has known issues which require the write threshold to be set to 1.
See:
http://download.intel.com/design/network/specupdt/82576_SPECUPDATE.pdf

If not then single packets will hang in transmit ring until more arrive.
Simple tests like ping will fail.

Signed-off-by: Stephen Hemminger <shemminger@vyatta.com>
Reviewed-by: Vincent Jardin <vincent.jardin@6wind.com>

ethdev: more doxygen comments about fdir

Signed-off-by: Intel

pci: store numa_node per device

Signed-off-by: Intel

pci: configure SR-IOV with max_vfs

Signed-off-by: Intel

pci: fix probing blacklisted device with RTE_PCI_DRV_MULTIPLE flag

When blacklisting network adapters that share a PCI bus address with multiple
ports such as Mellanox ConnectX-3 (librte_pmd_mlx4), RTE applications
enter infinite loops while probing PCI devices.

This commit removes this probe on subsequent instances for blacklisted devices
that have RTE_PCI_DRV_MULTIPLE set.

Signed-off-by: Julien Courtat <julien.courtat@6wind.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>

pci: don't unbind resources on exit

unbind operations must be done before starting eal application

Signed-off-by: Intel

pci: rework interrupt handling

Signed-off-by: Intel <intel.com>

pci: support multiple PCI regions per device

Need to change PCI code to support multiple I/O regions on a single device.
Some devices like VMXNET3 have multiple PCI memory regions, and some
have none.

Signed-off-by: Stephen Hemminger <shemminger@vyatta.com>
Signed-off-by: Intel

mbuf: force inlining

Signed-off-by: Intel

mem: force inlining

Signed-off-by: Intel

mem: remove RLIMIT_NOFILE update

Memory init won't try to increase its RLIMIT_NOFILE limit, this must be done
prior to starting it.

Signed-off-by: Intel

mem: find most little element from heap

Allocations now return the most little element from heap matching size
constraint instead of the first one available.

Signed-off-by: Intel

ring: optimisations

Signed-off-by: Intel

timer: add a rte_pause in a tight loop

Signed-off-by: Intel

timer: prefer TSC to HPET

Signed-off-by: Intel

timer: optimize for empty case

In many application there are no timers queued, and the call to
rte_timer_managecan be optimized in that case avoid reading HPET and
lock overhead.

Signed-off-by: Stephen Hemminger <shemminger@vyatta.com>
Reviewed-by: Vincent Jardin <vincent.jardin@6wind.com>

timer: option --vmware-tsc-map for VMware guest

The VMWare TSC mapping uses a hook to RDPMC to read the physical TSC
in the case of VMware ESXi.

Signed-off-by: Damien Millescamps <damien.millescamps@6wind.com>
Acked-by: Jean-Mickael Guerin <jmg@6wind.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Introduce new option --vmware-tsc-map, ignored if
CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT is not set.

Default is CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT=y.

if CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT is set:
    rte_rdtsc() selects at runtime between Vmware mapping of
    TSC or native TSC
else
    rte_rdtsc() always uses native rdtsc.

When running DPDK on VMware guest, enable --vmware-tsc-map to
read the physical TSC.
Caution: ESXi should pass monitor_control.pseudo_perfctr = TRUE
othewise it results in general protection fault.

Signed-off-by: Jean-Mickael Guerin <jean-mickael.guerin@6wind.com>
Acked-by: Vincent Jardin <vincent.jardin@6wind.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>

hash: jhash optimisation

Signed-off-by: Intel

hash: fix for multi-process apps

Signed-off-by: Intel

sched: initial import

Signed-off-by: Intel

meter: initial import

Signed-off-by: Intel