Wenzhuo Lu [Wed, 24 Jun 2015 03:26:18 +0000 (11:26 +0800)]
ixgbe/base: disable software LPLU implementation for X557 V2
This patch disables SW LPLU on x557 V2. It also sets the
enter_lplu function pointer to NULL on x557 V2. LPLU will be
implemented in FW for all x557 V2 interfaces. The SW LPLU
implementation must be disabled on V2 to avoid conflicts with
FW. SW LPLU support is still required for x557 V1.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com> Acked-by: Helin Zhang <helin.zhang@intel.com>
Wenzhuo Lu [Wed, 24 Jun 2015 03:26:10 +0000 (11:26 +0800)]
ixgbe/base: configure MDIO clock for X550em
The MDIO clock needs to be configured for a specific speed for
x550em. We expected this to be done automatically, but in
the early days of the project this was not happening. We put
code in to do this ourselves.
Eventually, we decided that there is no harm in having SW do
this all the time, so we may not remove this code in the future.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com> Acked-by: Helin Zhang <helin.zhang@intel.com>
Wenzhuo Lu [Wed, 24 Jun 2015 03:26:19 +0000 (11:26 +0800)]
ixgbe/base: remove FEC disablement for X550em
This patch removes the clearing of the FEC(Forward Error Correction)
bits in ixgbe_setup_kr_speed_x550em. FEC default enablement is
configured via the NVM and SW should not be overriding these defaults
in this function.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com> Acked-by: Helin Zhang <helin.zhang@intel.com>
Wenzhuo Lu [Wed, 24 Jun 2015 03:26:08 +0000 (11:26 +0800)]
ixgbe/base: add X550em KR/iXFI internal link mode support
This patch adds support for x550em KR/iXFI internal link modes. The initial
x550em-10GBASET and x550em-SFP designs use iXFI internal link mode between
the internal PHY and the external PHY.
However future designs will use a KR internal link. This patch is intended
to future proof the driver by adding the KR internal link support in the
driver now.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com> Acked-by: Helin Zhang <helin.zhang@intel.com>
Wenzhuo Lu [Wed, 24 Jun 2015 03:26:12 +0000 (11:26 +0800)]
ixgbe/base: update EEE/FEC support for X550EM_X_KR
EEE(Energy Efficient Ethernet) is not supported on the initial revision
of IXGBE_DEV_ID_X550EM_X_KR. We determine the revision by reading a fuse
register.
Also, the requirements for FEC(Forward Error Correction) have changed
slightly. Now, we don't change the "request" bit at all. When EEE is
enabled, we advertise that we are capable. When EEE is disabled, we do
not advertise that we are capable. This change makes us consistent with
the power-on defaults that are in the NVM.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com> Acked-by: Helin Zhang <helin.zhang@intel.com>
Wenzhuo Lu [Wed, 24 Jun 2015 03:26:03 +0000 (11:26 +0800)]
ixgbe/base: enable X550 FEC when EEE is disabled
The FEC(Forward Error Correction) feature had been disabled
because it increases power consumption. However, some customers
want to use it. This patch enables FEC when EEE(Energy Efficient
Ethernet) is disabled; FEC was already being disabled when EEE
was enabled, but now both are done in the same function. The two
features are not allowed to be enabled at the same time. The two
features cannot both be disabled. If this ability is ever
determined to be needed, we will need to define a new user parameter
to control FEC independently of EEE.
Fixes: d4c9ffd4fe1c ("ixgbe/base: disable X550em FEC to save power") Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com> Acked-by: Helin Zhang <helin.zhang@intel.com>
Wenzhuo Lu [Wed, 24 Jun 2015 03:26:07 +0000 (11:26 +0800)]
ixgbe/base: check for functional CS4227 ucode
During init, check the ucode running in the CS4227. If
it is not responding correctly, reset the part. This is
a global reset so it must only be done the first time a
driver loads after power-on.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com> Acked-by: Helin Zhang <helin.zhang@intel.com>
Wenzhuo Lu [Wed, 24 Jun 2015 03:26:00 +0000 (11:26 +0800)]
ixgbe/base: fix X550em UniPHY link configuration
In UniPHY we have 2 IOSF targets that are UniPHY related. We can
write to PHY and PCS. In earlier times I've been told that there
were 2 separate PCS targets for IOSF commands and that's why I
implemented it with 2 defines and adding hw->bus.lan_id, but lately
I confirmed with HW that FW takes care of which PCS "slice" we are
talking to and is directing writes to correct one, so KX4_PCS1
target is dead now and we cannot use it.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com> Acked-by: Helin Zhang <helin.zhang@intel.com>
Wenzhuo Lu [Wed, 24 Jun 2015 03:25:58 +0000 (11:25 +0800)]
ixgbe/base: power down the X550em PHY on overtemp event
This patch powers down the x550em PHY on over-temp events. The
PHY firmware is supposed to do this autonomously but that isn't
implemented. The short-term stop-gap solution is for SW to power
down the PHY when it reports an overtemp event.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com> Acked-by: Helin Zhang <helin.zhang@intel.com>
Wenzhuo Lu [Wed, 24 Jun 2015 03:25:53 +0000 (11:25 +0800)]
ixgbe/base: fix X550em link setup without SFP
This patch updates the x550em SFP link setup by adding
ixgbe_sfp_type_unknown and ixgbe_sfp_type_not_present case expression
to the ixgbe_setup_mac_link_sfp_x550em SFP type switch statement. This
handles the case when no module is present.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com> Acked-by: Helin Zhang <helin.zhang@intel.com>
Wenzhuo Lu [Wed, 24 Jun 2015 03:25:52 +0000 (11:25 +0800)]
ixgbe/base: fix X550em SFP+ link stability
Configure the CS4227 correctly for both 1G and 10G operation,
by moving the code to ixgbe_setup_mac_link_sfp_x550em(). It
needs to be in this function because we need both the module
type and the speed, and this is the only function in the init
flow that knows the speed. In contrast,
ixgbe_setup_sfp_modules_X550em() does not know the speed, so we
can't do anything useful here. This is a fundamental difference
from the 82599 flow.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com> Acked-by: Helin Zhang <helin.zhang@intel.com>
Wenzhuo Lu [Wed, 24 Jun 2015 03:25:59 +0000 (11:25 +0800)]
ixgbe/base: restore advertised autoneg after setting X550em LPLU
On systems that support LPLU in the firmware, the driver wouldn't be
aware of the LPLU speed change, and it wouldn't cache the new value when
the driver resumes. This patch emulates the same behavior by restoring
the previous autoneg settings to autoneg_advertised.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com> Acked-by: Helin Zhang <helin.zhang@intel.com>
Wenzhuo Lu [Wed, 24 Jun 2015 03:25:51 +0000 (11:25 +0800)]
ixgbe/base: update X550em LPLU
This patch updates x550em LPLU (Low Power Link Up) to use the
MAC ops setup_link function pointer.
This removes redundant code and provides iXFI and KR support
between internal and external PHY.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com> Acked-by: Helin Zhang <helin.zhang@intel.com>
Wenzhuo Lu [Wed, 24 Jun 2015 03:26:21 +0000 (11:26 +0800)]
ixgbe/base: fix X550 PCIe master disabling
This patch skips the PCI transactions pending check in
ixgbe_disable_pcie_master. The PCI transactions pending bit sticks high
when there were pending transactions, we should wait and then continue
with our reset flow.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com> Acked-by: Helin Zhang <helin.zhang@intel.com>
Wenzhuo Lu [Wed, 24 Jun 2015 03:26:20 +0000 (11:26 +0800)]
ixgbe/base: change register definition code style
This path changes ((P == 0) ? (<value for port 0>) : (<value for port 1>))
register definition into ((P) ? <value for port 1> : <value for port 0>)
style.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com> Acked-by: Helin Zhang <helin.zhang@intel.com>
This patch adds a coccinelle (see http://coccinelle.lip6.fr/)
transform to use the newly added rte_pktmbuf_mtod_offset() helper. In
addition, we add a simple script to apply all available transforms to
a codebase.
There are a number of instances in the code where rte_pktmbuf_mtod()
is used to get the mbuf data pointer, only to add an offset before
casting the result to some other header type. This patch adds a new
rte_pktmbuf_mtod_offset() macro to eliminate these awful double cast
situations.
On machines that are strict on pointer alignment, current code breaks
on GCC's -Wcast-align checks on casts from narrower to wider types.
This patch introduces new unaligned_uint(16|32|64)_t types, which
correctly retain alignment in such cases. Strict alignment
architectures will need to define CONFIG_RTE_ARCH_STRICT_ALIGN in
order to effect these new types.
Since sig_tbl_bucket_size and key_tbl_key_size are explicitly aligned
at initialization, offset dereferences in the hash table code cannot
possibly be unaligned. However, the compiler is unaware of this fact
and complains on -Wcast-align. This patch modifies the code to use
RTE_PTR_ADD(), thereby silencing the compiler by casting through (void
*).
Statistics offsets in the rte_stats_strings[] array are always 64-bit aligned.
However, the compiler is unaware of this fact and complains on -Wcast-align.
This patch modifies the code to use RTE_PTR_ADD(), thereby silencing the
compiler by casting through (void *).
Translating from an mbuf element to the mbuf pointer does not break alignment
constraints. However, the compiler is unaware of this fact and complains on
-Wcast-align. This patch modifies the code to use RTE_PTR_SUB(), thereby
silencing the compiler by casting through (void *).
Translating from a mempool object to the mempool pointer does not break
alignment constraints. However, the compiler is unaware of this fact and
complains on -Wcast-align. This patch modifies the code to use RTE_PTR_SUB(),
thereby silencing the compiler by casting through (void *).
John McNamara [Tue, 23 Jun 2015 12:07:47 +0000 (13:07 +0100)]
mempool: fix doxygen documentation
Added Doxygen @param for missing API parameter in
rte_mempool_obj_iter(), to fix Doxygen warning. Also added
minor grammar fixes to that function documentation.
Signed-off-by: John McNamara <john.mcnamara@intel.com> Acked-by: Olivier Matz <olivier.matz@6wind.com>
Anatoly Burakov [Wed, 10 Jun 2015 10:19:21 +0000 (11:19 +0100)]
pci: fix licenses
Fixes: 88701645c98c ("eal: move interrupt type out of igb_uio") Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com> Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Jijiang Liu [Mon, 22 Jun 2015 16:41:05 +0000 (00:41 +0800)]
examples/tep_term: add encap/decap configuration
Add the encapsulation and decapsulation options.
The two flags are enabled by default.
Sometimes we want to know the performance influence of
the encapsulation and decapsulation operations, and
I think we should add the two configuration options.
Signed-off-by: Jijiang Liu <jijiang.liu@intel.com>
Simon Kagstrom [Wed, 20 May 2015 11:02:05 +0000 (13:02 +0200)]
reorder: allow random number as starting point
We use sequence numbers from a generator which has potentially started
long before the receiver. Therefore, the first number will typically
be > 0. The rte_reorder code will not work in this case, since the
packet is seen as outside of the buffer.
The patch instead records the first sequence number inserted as the
starting point.
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net> Signed-off-by: Johan Faltstrom <johan.faltstrom@netinsight.net> Acked-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
Daniel Mrzyglod [Fri, 5 Jun 2015 14:55:10 +0000 (16:55 +0200)]
port: fix unaligned access to metadata
Fix RTE_MBUF_METADATA macros to allow for unaligned accesses to
meta-data fields.
Forcing aligned accesses is not really required, so this is removing an
unneeded constraint.
This issue was met during testing of the new version of the ip_pipeline
application. There is no performance impact.
This change has no ABI impact, as the previous code that uses aligned
accesses continues to run without any issues.
Signed-off-by: Daniel Mrzyglod <danielx.t.mrzyglod@intel.com> Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Keith Wiles [Mon, 8 Jun 2015 21:55:52 +0000 (16:55 -0500)]
eal: fix log level of early messages
The RTE_LOG(DEBUG, ...) messages in rte_eal_cpu_init() are printed
even when the log level on the command line was set to INFO or lower.
The problem is the rte_eal_cpu_init() routine was called before
the command line args are scanned. Setting --log-level=7 now
correctly does not print the messages from the rte_eal_cpu_init() routine.
Signed-off-by: Keith Wiles <keith.wiles@intel.com> Acked-by: David Marchand <david.marchand@6wind.com>
Jan Blunck [Mon, 1 Jun 2015 09:30:38 +0000 (11:30 +0200)]
log: fix crash after dump
In rte_log_dump_history() the log_history list is reinitialized without
resetting the log_history_size. In the next call to rte_log_add_in_history()
the log_history_size > RTE_LOG_HISTORY and the code unconditionally tries
to remove the first entry:
Program received signal SIGSEGV, Segmentation fault.
rte_log_add_in_history (
buf=buf@entry=0x7f02035cd000 "[snip]\n", size=size@entry=86)
at /usr/src/packages/BUILD/lib/librte_eal/common/eal_common_log.c:122
Signed-off-by: Jan Blunck <jblunck@infradead.org> Acked-by: Olivier Matz <olivier.matz@6wind.com>
Bruce Richardson [Thu, 18 Jun 2015 13:28:41 +0000 (14:28 +0100)]
ring: fix return of new port id on creation
The rte_eth_from_rings API allowed the creation of an ethdev port at
runtime using rte_rings as the underlying storage. However, the return
value from this function was either 0 or -1, and these values were never
actually documented in the API documentation. Unfortunately, the programmers
guide doc examples for this API implied that the return value from this
function was the port id of the newly created ethdev.
Since this latter behaviour is more useful - and already implied by the
documentation, this patch changes the return 0 to "return
data->port_id". It also adds in doxygen comments for the function so it
can be correctly documented in the API reference.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Shaopeng He [Mon, 15 Jun 2015 01:26:10 +0000 (09:26 +0800)]
fm10k: fix mac/vlan filtering
This patch includes 3 changes related to MAC/VLAN address table
when the system (e.g. testpmd) is started and closed:
- remove default MAC address with fixed VLAN 0 which was for the
debug purpose before the MAC/VLAN filter function was implemented.
- enable VF MAC/VLAN filter for the first valid MAC address
and first valid VLAN ID. This is needed for system (e.g. testpmd)
to setup default MAC address and default VLAN for VF.
Later attempt to change these default value will be refused by
under layer shared code and PF host functions.
- un-register any combination of VLAN and MAC address from fm10k
switch side MAC table when the system (e.g. testpmd) is closed.
Signed-off-by: Shaopeng He <shaopeng.he@intel.com> Acked-by: Jing Chen <jing.d.chen@intel.com> Tested-by: Michael Qiu <michael.qiu@intel.com>
Since the communication between PF/Switch Manager, VF/PF is
asynchronous through mailbox, it's hard to determine when Switch
Manager/PF host will send the default vlan to PF/VF. So, it's
necessary to set default vlan until the device is started.
Signed-off-by: Chen Jing D(Mark) <jing.d.chen@intel.com> Acked-by: Shaopeng He <shaopeng.he@intel.com> Acked-by: Michael Qiu <michael.qiu@intel.com>
In fm10k, PF driver needs to communicate with switch through
mailbox if it needs to add/delete MAC address.
This fix will validate if switch is ready before going forward.
Then, it is necessary to acquire LPORT_MAP info after issuing
MAC addr request to switch.
Signed-off-by: Chen Jing D(Mark) <jing.d.chen@intel.com> Acked-by: Shaopeng He <shaopeng.he@intel.com> Tested-by: Michael Qiu <michael.qiu@intel.com> Acked-by: Michael Qiu <michael.qiu@intel.com>
In TX side, bit FM10K_TXD_FLAG_LAST in TX descriptor only is set
in the last descriptor for multi-segment packets. But current
implementation didn't set all the fields of TX descriptor, which
will cause descriptors processed now to re-use fields set in last
scroll. If FM10K_TXD_FLAG_LAST bit was set in the last round and
it happened this is not the last descriptor of a multi-segnment
packet, HW will send out the incomplete packet out and leads to
data intergrity issue.
Signed-off-by: Chen Jing D(Mark) <jing.d.chen@intel.com> Acked-by: Shaopeng He <shaopeng.he@intel.com> Tested-by: Michael Qiu <michael.qiu@intel.com> Acked-by: Michael Qiu <michael.qiu@intel.com>
fm10k can't receive frame greater than 1536 and Scatter RX
function can't work correctly. The root cause is
SRRCTL.FM10K_SRRCTL_BUFFER_CHAINING_EN bit is not enabled.
Test report: http://dpdk.org/ml/archives/dev/2015-June/019242.html
Signed-off-by: Chen Jing D(Mark) <jing.d.chen@intel.com> Acked-by: Shaopeng He <shaopeng.he@intel.com> Tested-by: Michael Qiu <michael.qiu@intel.com> Acked-by: Michael Qiu <michael.qiu@intel.com>
As RX buffer is aligned to 512B within mbuf, some bytes are reserved
for this purpose, and the worst case could be 511B. But SRR reg
assumes all buffers have the same size. In order to fill the gap,
we'll have to consider the worst case and assume 512B is reserved.
If we don't do so, it's possible for HW to overwrite data to next
mbuf.
Signed-off-by: Chen Jing D(Mark) <jing.d.chen@intel.com> Acked-by: Shaopeng He <shaopeng.he@intel.com> Tested-by: Michael Qiu <michael.qiu@intel.com> Acked-by: Michael Qiu <michael.qiu@intel.com>
Original implementation required mbuf size should be greater than
ETHER_MAX_VLAN_FRAME_LEN, which is not necessary. If it's less
than that value, scatter function will be selected and incoming
packets greater than mbuf size will be filled into several mbufs.
Signed-off-by: Chen Jing D(Mark) <jing.d.chen@intel.com> Acked-by: Michael Qiu <michael.qiu@intel.com>
Wenzhuo Lu [Tue, 16 Jun 2015 08:07:49 +0000 (16:07 +0800)]
ixgbe: fix X550 copper link
For there're only laser ports on x550 before, we only considered laser
ports for the testpmd CLIs "port start/stop ...". Now we have new x550
devices which have copper ports. Use the API for copper to enable/disable
these ports.
And also let the testpmd CLI "set link-up/down ..." support copper
ports.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Current ixgbe VF base driver only really read the status register when:
- get_link_status is true
- link reset
- mailbox timeout.
We only set get_link_status to true when we start the PF/VF, so
following calls to ixgbe_dev_link_update will just keep the old link
status unless the link has been reset.
Because of this behaviour, when the link status of the PF changes after
the VF has been initialized, we do not read the current status register
from the nic and instead we just keep the old link status.
Fix the problem by setting this field to true before calling
ixgbe_check_link function from base driver. We don't need to check after
this call for get_link_status anymore, so remove it.
The logic to select ixgbe VF RX function is different than PF side.
There are a few issues with its current state:
- it does not allow to select ixgbe_recv_pkts_vec among other options.
- it can cause memory corruption for scatter mode as it does not allocate
enough entries in sw_ring.
- when checksum is enabled, incorrect vector RX function is selected.
To solve above issues, change the VF RX function selection logic to
mimic PF side.
Signed-off-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Jingjing Wu [Fri, 19 Jun 2015 06:35:25 +0000 (14:35 +0800)]
ixgbe: fix flow director flexbytes offset
The flexbytes offset can not be set, because the value is over written
when fdir is enabled.
This patch fixes this issue, and also removes some reduplicate lines.
Fixes: d54a9888267c ("ixgbe: support flexpayload configuration of flow director") Reported-by: David Marchand <david.marchand@6wind.com> Signed-off-by: Jingjing Wu <jingjing.wu@intel.com> Tested-by: Gaetan Rivet <gaetan.rivet@6wind.com> Acked-by: David Marchand <david.marchand@6wind.com>
Olivier Matz [Fri, 19 Jun 2015 16:16:37 +0000 (18:16 +0200)]
mempool: add structure for object headers
Each object stored in mempools are prefixed by a header, allowing for
instance to retrieve the mempool pointer from the object. When debug is
enabled, a cookie is also added in this header that helps to detect
corruptions and double-frees.
Introduce a structure that materializes the content of this header,
and will simplify future patches adding things in this header.
Roman Dementiev [Fri, 19 Jun 2015 11:08:23 +0000 (13:08 +0200)]
app/test: add hash scalability test using HTM lock elision
This patch adds a new auto-test for testing the scaling
of concurrent inserts into rte_hash when protected by
the normal spinlock vs. the spinlock with HTM lock
elision. The test also benchmarks single-threaded
access without any locks.
Signed-off-by: Roman Dementiev <roman.dementiev@intel.com> Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Roman Dementiev [Fri, 19 Jun 2015 11:08:22 +0000 (13:08 +0200)]
rwlock: add HTM lock elision for x86
This patch adds methods that use hardware memory transactions (HTM) on
fast-path for rwlock (a.k.a. lock elision). Here the methods are implemented
for x86 using Restricted Transactional Memory instructions (Intel(r)
Transactional Synchronization Extensions). The implementation fall-backs to
the normal rwlock if HTM is not available or memory transactions fail. This is
not a replacement for all rwlock usages since not all critical sections
protected by locks are friendly to HTM. For example, an attempt to perform
a HW I/O operation inside a hardware memory transaction always aborts
the transaction since the CPU is not able to roll-back should the transaction
fail. Therefore, hardware transactional locks are not advised to be used around
rte_eth_rx_burst() and rte_eth_tx_burst() calls.
Signed-off-by: Roman Dementiev <roman.dementiev@intel.com> Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Roman Dementiev [Fri, 19 Jun 2015 11:08:21 +0000 (13:08 +0200)]
spinlock: add HTM lock elision for x86
This patch adds methods that use hardware memory transactions (HTM) on fast-path
for spinlocks (a.k.a. lock elision). Here the methods are implemented for x86
using Restricted Transactional Memory instructions (Intel(r) Transactional
Synchronization Extensions). The implementation fall-backs to the normal
spinlock if HTM is not available or memory transactions fail. This is not
a replacement for all spinlock usages since not all critical sections protected
by spinlocks are friendly to HTM. For example, an attempt to perform a HW I/O
operation inside a hardware memory transaction always aborts the transaction
since the CPU is not able to roll-back should the transaction fail.
Therefore, hardware transactional locks are not advised to be used around
rte_eth_rx_burst() and rte_eth_tx_burst() calls.
Signed-off-by: Roman Dementiev <roman.dementiev@intel.com> Acked-by: Bruce Richardson <bruce.richardson@intel.com>
git.droids-corp.org / dpdk.git / log