Gagandeep Singh [Tue, 9 Nov 2021 04:39:06 +0000 (10:09 +0530)]
dma/dpaa: introduce DPAA DMA driver skeleton
The DPAA DMA driver is an implementation of the dmadev APIs,
that provide means to initiate a DMA transaction from CPU.
The initiated DMA is performed without CPU being involved
in the actual DMA transaction. This is achieved via using
the QDMA controller of DPAA SoC.
David Marchand [Mon, 8 Nov 2021 10:09:18 +0000 (11:09 +0100)]
build: cleanup libpcap dependent components
The RTE_PORT_PCAP variable is used to signal libpcap availability,
though its name seems to refer to pcap support in the port library.
Prefer a generic name and add explicit link dependencies where needed.
Fixes: 7a944656b33f ("test/pcapng: test pcapng library") Fixes: 2eccf6afbea9 ("bpf: add function to convert classic BPF to DPDK BPF") Fixes: cbb44143be74 ("app/dumpcap: add new packet capture application") Signed-off-by: David Marchand <david.marchand@redhat.com> Acked-by: Stephen Hemminger <stephen@networkplumber.org>
David Marchand [Sat, 6 Nov 2021 08:53:04 +0000 (09:53 +0100)]
examples: skip build when missing dependencies
Trying to disable the vhost library, meson will complain it can't build
the vhost* and vdpa examples when passing -Dexamples=all.
-Dexamples=all skips examples if the example itself announces it can't
be built (for external dependencies, internal dependencies and other
reasons).
Since examples/meson.build will evaluate the internal dependencies
in any case, let's move the check there and resolve the issue for
optional internal libraries.
Fixes: 0bf583222297 ("lib: allow disabling optional libraries") Signed-off-by: David Marchand <david.marchand@redhat.com> Acked-by: Bruce Richardson <bruce.richardson@intel.com>
David Marchand [Wed, 27 Oct 2021 14:05:44 +0000 (16:05 +0200)]
test: add bitmap to fast tests
This test was never added to the list of tests to run in CI.
Its name does not follow the implicit convention of ending with
_autotest.
Let's fix this.
Fixes: 5e9647fd5a1a ("test/bitmap: test scan after half cacheline is cleared") Signed-off-by: David Marchand <david.marchand@redhat.com> Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Huichao Cai [Mon, 25 Oct 2021 07:55:53 +0000 (15:55 +0800)]
ip_frag: revert fix fragmenting IPv4 fragment
The patch ("ip_frag: fix fragmenting IPv4 fragment") introduces
a bug and needs to be rolled back. This is because the patch
and variables "flag_offset" conflict with each other.
Bugzilla ID: 835 Fixes: 567473433b7e ("ip_frag: fix fragmenting IPv4 fragment") Cc: stable@dpdk.org Signed-off-by: Huichao Cai <chcchc88@163.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Increase default value for config parameter RTE_LIBRTE_IP_FRAG_MAX_FRAG
from 4 to 8. This parameter controls maximum number of fragments per
packet in ip reassembly table. Increasing this value from 4 to 8 will
allow users to cover common case with jumbo packet size of 9KB and
fragments with default frame size (1500B).
As RTE_LIBRTE_IP_FRAG_MAX_FRAG is used in definition of public
structure (struct rte_ip_frag_death_row), this is an ABI change.
Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Ivan Malov [Fri, 5 Nov 2021 21:54:09 +0000 (00:54 +0300)]
net/sfc: support decrement IP TTL actions in transfer flows
These actions map to MAE action DECR_IP_TTL. It affects
the outermost header in the current processing state of
the packet, which might have been decapsulated by prior
action DECAP. It also updates IPv4 checksum accordingly.
Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru> Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru> Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Ivan Malov [Fri, 5 Nov 2021 21:54:08 +0000 (00:54 +0300)]
common/sfc_efx/base: add API to decrement TTL action to set
Affects the outermost header, taking prior action DECAP into
account. Takes care to also update IPv4 checksum accordingly.
Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru> Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru> Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Ivan Malov [Fri, 5 Nov 2021 21:54:07 +0000 (00:54 +0300)]
common/sfc_efx/base: factor out no-op helper functions
When an action gets added to an action set, a special helper is
used to handle its arguments. There are actions which have no
arguments, and the corresponding helpers are duplicates in
fact. Use a unified no-op helper instead of them.
Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru> Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru> Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Ivan Malov [Fri, 5 Nov 2021 21:54:06 +0000 (00:54 +0300)]
common/sfc_efx/base: refine adding count action to set
1) Invalid counter ID is always set by default.
Do not set it again when adding the action.
2) Counter ID validity check is missing in the
action set allocation helper. Introduce it.
Fixes: 238306cf9aff ("common/sfc_efx/base: support counter in action set") Cc: stable@dpdk.org Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru> Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru> Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Ivan Malov [Fri, 5 Nov 2021 21:54:05 +0000 (00:54 +0300)]
common/sfc_efx/base: refine adding encap action to set
1) Invalid encap. header ID is always set by default.
Do not set it again when adding the action.
2) Encap. header ID validity check is missing in the
action set allocation helper. Introduce it.
Fixes: 3907defa5bf0 ("common/sfc_efx/base: support adding encap action to a set") Cc: stable@dpdk.org Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru> Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru> Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Huisong Li [Sat, 6 Nov 2021 01:43:05 +0000 (09:43 +0800)]
net/hns3: mark unchecked return of snprintf
Fixing the return value of the function to clear static warning.
Fixes: 1181500b2fc5 ("net/hns3: adjust MAC address logging") Cc: stable@dpdk.org Signed-off-by: Huisong Li <lihuisong@huawei.com> Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Huisong Li [Sat, 6 Nov 2021 01:42:58 +0000 (09:42 +0800)]
net/hns3: simplify queue DMA address arithmetic
The patch obtains the upper 32 bits of the Rx/Tx queue DMA address in one
step instead of two steps.
Fixes: bba636698316 ("net/hns3: support Rx/Tx and related operations") Cc: stable@dpdk.org Signed-off-by: Huisong Li <lihuisong@huawei.com> Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Dmitry Kozlyuk [Mon, 8 Nov 2021 11:17:15 +0000 (13:17 +0200)]
net/mlx5: fix split buffer Rx
Routine to lookup LKey on Rx was assuming that the mbuf address
always belongs to a single mempool: the one associated with an RxQ
or the MPRQ mempool. This assumption is false for split buffers case.
A wrong LKey was looked up, resulting in completion errors.
Modify lookup routines to lookup LKey in the mbuf->pool
for non-MPRQ cases both on Rx datapath and on queue initialization.
Raja Zidane [Mon, 8 Nov 2021 13:09:21 +0000 (13:09 +0000)]
common/mlx5: fix queue size in DevX queue pair creation
The number of WQEBBs was provided to QP create, and QP size was calculated
by multiplying the number of WQEBBs by 64, which is the send WQE size.
When creating RQ in the QP (i.e., vdpa driver), the queue size was bigger
because the receive WQE size is 16.
Provide queue size to QP create instead of the number of WQEBBs.
Raja Zidane [Mon, 8 Nov 2021 13:09:20 +0000 (13:09 +0000)]
crypto/mlx5: fix queue size configuration
The DevX interface for QP creation expects the number of WQEBBs.
Wrongly, the number of descriptors was provided to the QP creation.
In addition, the QP size must be a power of 2 what was not guaranteed.
Provide the number of WQEBBs to the QP creation API.
Round up the SQ size to a power of 2.
Rename (sq/rq)_size to num_of_(send/receive)_wqes.
Fixes: 6152534e211e ("crypto/mlx5: support queue pairs operations") Cc: stable@dpdk.org Signed-off-by: Raja Zidane <rzidane@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com> Acked-by: Tal Shnaiderman <talshn@nvidia.com>
Raja Zidane [Mon, 8 Nov 2021 13:09:19 +0000 (13:09 +0000)]
crypto/mlx5: fix freeing on probing failure
When calling device close, unset dek is called which destroys a hash list.
In case of error during dev probe, close is called when dek hlist is not
initialized.
Ensure non null list destroy.
Fixes: 90646d6c6e22 ("crypto/mlx5: support basic operations") Cc: stable@dpdk.org Signed-off-by: Raja Zidane <rzidane@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com>
Raja Zidane [Mon, 8 Nov 2021 13:09:18 +0000 (13:09 +0000)]
common/mlx5: fix DevX queue size overflow
The HW QP/SQ/RQ/CQ queue sizes may be bigger than 64KB.
The width of the variable handled the queue size is 16 bits
which cannot contain the maximum queue size.
Replace the size type to be uint32_t.
Elena Agostini [Mon, 8 Nov 2021 18:58:04 +0000 (18:58 +0000)]
gpudev: add communication list
In heterogeneous computing system, processing is not only in the CPU.
Some tasks can be delegated to devices working in parallel.
When mixing network activity with task processing there may be the need
to put in communication the CPU with the device in order to synchronize
operations.
An example could be a receive-and-process application
where CPU is responsible for receiving packets in multiple mbufs
and the GPU is responsible for processing the content of those packets.
The purpose of this list is to provide a buffer in CPU memory visible
from the GPU that can be treated as a circular buffer
to let the CPU provide fondamental info of received packets to the GPU.
A possible use-case is described below.
CPU:
- Trigger some task on the GPU
- in a loop:
- receive a number of packets
- provide packets info to the GPU
GPU:
- Do some pre-processing
- Wait to receive a new set of packet to be processed
Elena Agostini [Mon, 8 Nov 2021 18:58:03 +0000 (18:58 +0000)]
gpudev: add communication flag
In heterogeneous computing system, processing is not only in the CPU.
Some tasks can be delegated to devices working in parallel.
When mixing network activity with task processing there may be the need
to put in communication the CPU with the device in order to synchronize
operations.
The purpose of this flag is to allow the CPU and the GPU to
exchange ACKs. A possible use-case is described below.
CPU:
- Trigger some task on the GPU
- Prepare some data
- Signal to the GPU the data is ready updating the communication flag
GPU:
- Do some pre-processing
- Wait for more data from the CPU polling on the communication flag
- Consume the data prepared by the CPU
Signed-off-by: Elena Agostini <eagostini@nvidia.com>
Elena Agostini [Mon, 8 Nov 2021 18:58:01 +0000 (18:58 +0000)]
gpudev: add memory API
In heterogeneous computing system, processing is not only in the CPU.
Some tasks can be delegated to devices working in parallel.
Such workload distribution can be achieved by sharing some memory.
As a first step, the features are focused on memory management.
A function allows to allocate memory inside the device,
or in the main (CPU) memory while making it visible for the device.
This memory may be used to save packets or for synchronization data.
The next step should focus on GPU processing task control.
Signed-off-by: Elena Agostini <eagostini@nvidia.com> Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Thomas Monjalon [Mon, 8 Nov 2021 18:58:00 +0000 (18:58 +0000)]
gpudev: support multi-process
The device data shared between processes are moved in a struct
allocated in a shared memory (a new memzone for all GPUs).
The main struct rte_gpu references the shared memory
via the pointer mpshared.
The API function rte_gpu_attach() is added to attach a device
from the secondary process.
The function rte_gpu_allocate() can be used only by primary process.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Thomas Monjalon [Mon, 8 Nov 2021 18:57:59 +0000 (18:57 +0000)]
gpudev: add child device representing a device context
The computing device may operate in some isolated contexts.
Memory and processing are isolated in a silo represented by
a child device.
The context is provided as an opaque by the caller of
rte_gpu_add_child().
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Thomas Monjalon [Mon, 8 Nov 2021 18:57:58 +0000 (18:57 +0000)]
gpudev: add event notification
Callback functions may be registered for a device event.
Callback management is per-process and not thread-safe.
The events RTE_GPU_EVENT_NEW and RTE_GPU_EVENT_DEL
are notified respectively after creation and before removal
of a device, as part of the library functions.
Some future events may be emitted from drivers.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Anatoly Burakov [Thu, 28 Oct 2021 14:15:19 +0000 (14:15 +0000)]
vfio: set errno on unsupported OS
Currently, when code is running on FreeBSD or Windows, there is no way
to distinguish between a geniune error and a "VFIO is unsupported"
error. Fix the dummy implementations to also set the rte_errno flag.
Fixes: 279b581c897d ("vfio: expose functions") Fixes: c564a2a20093 ("vfio: expose clear group function for internal usages") Fixes: 964b2f3bfb07 ("vfio: export some internal functions") Fixes: ea2dc1066870 ("vfio: add multi container support") Cc: stable@dpdk.org Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com> Acked-by: Chenbo Xia <chenbo.xia@intel.com> Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Anatoly Burakov [Thu, 28 Oct 2021 14:15:18 +0000 (14:15 +0000)]
vfio: fix FreeBSD documentation
On FreeBSD, `rte_vfio_is_enabled()` and `rte_vfio_noiommu_is_enabled()`
API calls will not return error, and will instead return 0. This is
intentional, because the caller of this API does not care whether VFIO
is supported at all, and will instead be interested in whether VFIO is
enabled or not. However, the doxygen comments for these functions state
that they will return an error on FreeBSD, which is incorrect.
Fix the doxygen comment to call out the fact that these
functions are only relevant on Linux, but remove the reference to
returning errors.
Anatoly Burakov [Thu, 28 Oct 2021 14:15:17 +0000 (14:15 +0000)]
vfio: fix FreeBSD clear group stub
On FreeBSD, `rte_vfio_clear_group()` was returning 0 even though this
function is not valid for FreeBSD, and is called out to return error in
doxygen comments.
Fix the return value to match documentation.
Fixes: c564a2a20093 ("vfio: expose clear group function for internal usages") Cc: stable@dpdk.org Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Anatoly Burakov [Thu, 28 Oct 2021 14:15:16 +0000 (14:15 +0000)]
vfio: drop fallback Linux implementation
Currently, VFIO support for Linux is compiled unconditionally, and
supported kernel versions start with 4.4, so VFIO is assumed to always
be enabled. There is no way of disabling VFIO support at compile time
anyway, so just drop the "VFIO not available" fallback code altogether.
Satheesh Paul [Tue, 2 Nov 2021 10:50:41 +0000 (16:20 +0530)]
app/flow-perf: add random priority option
Added support to create flows with priority attribute set
randomly between 0 and a user supplied maximum value. This
is useful to measure performance on NICs which may have to
rearrange flows to honor flow priority.
Removed the lower limit of 100000 flows per batch.
Signed-off-by: Satheesh Paul <psatheesh@marvell.com> Acked-by: Wisam Jaddo <wisamm@nvidia.com>
Raja Zidane [Thu, 28 Oct 2021 13:58:50 +0000 (13:58 +0000)]
common/mlx5: fix MMO configuration in DevX queue pair
The QP extension valid bit was not set in the QP creation for MMO
configuration.
That caused the QP not to be connected to the GGA MMO engines,
and any MMO WQE job got CQE with an error.
Set the QP ext bit when MMO is configured.
Fixes: ddda0006188a ("common/mlx5: add MMO configuration for DevX queue pair") Signed-off-by: Raja Zidane <rzidane@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com>
Raja Zidane [Thu, 28 Oct 2021 13:58:49 +0000 (13:58 +0000)]
common/mlx5: fix HCA capabilities PRM alignment
0x20 reserved bytes were missed in the HCA cap PRM structure before the
newly added fields for MMO QP capabilities.
That caused reading MMO QP caps incorrectly.
Add the reserved fields in the HCA cap structure.
Juraj Linkeš [Fri, 5 Nov 2021 11:56:30 +0000 (12:56 +0100)]
config/arm: split aarch32 options
Aarch32 config got overlooked when splitting march in a previous patch.
Fixes: 95e0f23022a3 ("config/arm: split -march into arch and features") Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech> Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
Chengwen Feng [Tue, 2 Nov 2021 12:37:39 +0000 (20:37 +0800)]
dma/hisilicon: add probing
This patch add dmadev instances create during the PCI probe, and
destroy them during the PCI remove. Internal structures and HW
definitions was also included.
Ali Alnubani [Sun, 7 Nov 2021 16:30:54 +0000 (18:30 +0200)]
sched: fix debug build
Compare pkt_len to 0 instead of NULL to avoid the following build
failure with debug mode enabled:
../lib/sched/rte_pie.h: In function 'rte_pie_enqueue_empty':
../lib/sched/rte_pie.h:125:21: error: comparison between pointer
and integer [-Werror]
RTE_ASSERT(pkt_len != NULL);
Bugzilla ID: 878 Fixes: 44c730b0e379 ("sched: add PIE based congestion management") Signed-off-by: Ali Alnubani <alialnu@nvidia.com>
David Marchand [Fri, 5 Nov 2021 13:29:51 +0000 (14:29 +0100)]
app: fix external dependency linking
ext_deps was not used in app/meson.build
so testpmd dependency on jansson was ignored.
testpmd currently can be linked because metrics library is pulling
the dependency on libjansson.
Michael Baum [Wed, 3 Nov 2021 18:35:13 +0000 (20:35 +0200)]
common/mlx5: fix post doorbell barrier
The rdma-core library can map doorbell register in two ways, depending
on the environment variable "MLX5_SHUT_UP_BF":
- as regular cached memory, the variable is either missing or set to
zero. This type of mapping may cause the significant doorbell
register writing latency and requires an explicit memory write
barrier to mitigate this issue and prevent write combining.
- as non-cached memory, the variable is present and set to not "0"
value. This type of mapping may cause performance impact under
heavy loading conditions but the explicit write memory barrier is
not required and it may improve core performance.
The UAR creation function maps a doorbell in one of the above ways
according to the system. In run time, it always adds an explicit memory
barrier after writing to.
In cases where the doorbell was mapped as non-cached memory, the
explicit memory barrier is unnecessary and may impair performance.
The commit [1] solved this problem for a Tx queue. In run time, it
checks the mapping type and provides the memory barrier after writing to
a Tx doorbell register if it is needed. The mapping type is extracted
directly from the uar_mmap_offset field in the queue properties.
This patch shares this code between the drivers and extends the above
solution for each of them.
[1] commit 8409a28573d3
("net/mlx5: control transmit doorbell register mapping")
Michael Baum [Wed, 3 Nov 2021 18:35:12 +0000 (20:35 +0200)]
net/mlx5: remove duplicated reference of Tx doorbell
The Tx doorbell has different virtual addresses per process.
The secondary process takes the UAR physical page ID of the primary and
mmap it to its own virtual address.
The primary doorbell references were saved in two shared memory
locations: the TxQ structure and a dedicated doorbell array.
Remove the doorbell reference from the TxQ structure and move the
primary processes to take the UAR information from the primary doorbell
array.
Michael Baum [Wed, 3 Nov 2021 18:35:11 +0000 (20:35 +0200)]
common/mlx5: fix doorbell mapping configuration
UAR mapping type can be affected by the devarg tx_db_nc, which can cause
setting the environment variable MLX5_SHUT_UP_BF.
So, the MLX5_SHUT_UP_BF value and the UAR mapping parameter affect the
UAR cache mode.
Wrongly, the devarg was considered for the MLX5_SHUT_UP_BF but not for
the UAR mapping parameter in all the drivers except the net.
Take the tx_db_nc devarg into account for all the drivers.
Depending on kernel capabilities and rdma-core version the mapping of
UAR (User Access Region) of desired memory caching type (non-cached or
write combining) might fail. The PMD implements the flexible strategy
of UAR mapping, alternating the type of caching to succeed.
During this process the failure diagnostics messages are emitted.
These messages are merely diagnostics ones and the logging level should
be adjusted to DEBUG.
Michael Baum [Wed, 3 Nov 2021 18:35:09 +0000 (20:35 +0200)]
common/mlx5: remove unreachable branch in UAR allocation
The User Access Region (UAR) provides access to the hardware resources
like Doorbell Register from userspace.
It means the resources should be mapped by the kernel to some virtual
address range. There two types of memory mapping are supported by mlx5
kernel driver:
MLX5DV_UAR_ALLOC_TYPE_NC - non-cached, all writes promoted directly to
hardware.
MLX5DV_UAR_ALLOC_TYPE_BF - "BlueFlame", all writes might be cached by
CPU, and will be flushed to hardware
explicitly with memory barriers.
The supported mapping types depend on the platform (x86/ARM/etc), kernel
version, driver version, virtualization environment (hypervisor), etc.
In UAR allocation, if the system supports the allocation with non-cached
mapping, the first attempt is performed with MLX5DV_UAR_ALLOC_TYPE_NC.
Then, if this fails, the next attempt is done with
MLX5DV_UAR_ALLOC_TYPE_BF.
However, the function adds a condition for the case where the first
attempt was performed with MLX5DV_UAR_ALLOC_TYPE_BF, a condition that is
unattainable since the first attempt was always performed with
MLX5DV_UAR_ALLOC_TYPE_NC.
Michael Baum [Wed, 3 Nov 2021 18:35:08 +0000 (20:35 +0200)]
crypto/mlx5: fix login release in probing and removal
The probe function creates DevX object named login and saves pointer to
it in priv structure.
The remove function releases first the priv structure and then releases
the login object.
However, the pointer to login object is field of priv structure, which
is invalid.
Release the login object and then release the priv structure.
Michael Baum [Wed, 3 Nov 2021 10:17:07 +0000 (12:17 +0200)]
common/mlx5: make multi-process MR management port-agnostic
In the multi-process mechanism, there are things that the secondary
process does not perform itself but asks the primary process to perform
for it.
There is a special API for communication between the processes that
receives parameters necessary for the specific action required as well
as a special structure called mp_id that contains the port number of the
processes through which the initial process finds the relevant ETH
device for the processes.
One of the operations performed through this mechanism is the creation
of a memory region, where the secondary process sends the virtual
address as a parameter and the mp_id structure with the port number
inside it.
However, once the memory area management is shared between the drivers
and either port number or ETH device is no longer relevant to them, it
seems unnecessary to continue communicating between the processes
through the mp_id variable.
In this patch we will remove the use of the above structure for all MR
management, and add to the specific parameter of operations a pointer to
the common device that contains everything needed to create/register MR.
Michael Baum [Wed, 3 Nov 2021 10:17:06 +0000 (12:17 +0200)]
common/mlx5: remove redundant parameter in MR search
Memory region management has recently been shared between drivers,
including the search for caches in the data plane.
The initial search in the local linear cache of the queue, usually
yields a result and one should not continue searching in the next level
caches.
The function that searches in the local cache gets the pointer to a
device as a parameter, that is not necessary for its operation
but for subsequent searches (which, as mentioned, usually do not
happen).
Transferring the device to a function and maintaining it, takes some
time and causes some impact on performance.
Add the pointer to the device as a field of the mr_ctrl structure. The
field will be updated during control path and will be used only when
needed in the search.
Michael Baum [Wed, 3 Nov 2021 10:17:05 +0000 (12:17 +0200)]
common/mlx5: fix MR search inlining
Memory region management has recently been shared between drivers,
including the search for caches in the data plane.
The initial search in the local linear cache of the queue,
usually yields a result and one should not continue searching
in the next layer caches.
Prior to cache sharing the local linear cache lookup function
was defined with "static inline" attributes,
those were missed in routine commoditizing step
and this caused performance degradation.
David Marchand [Fri, 5 Nov 2021 13:30:17 +0000 (14:30 +0100)]
app/testpmd: remove unneeded dependency on meter lib
testpmd depends on ethdev, which itself depends on meter.
No need for an explicit dependency, since no testpmd code directly calls
in the meter library.
Signed-off-by: David Marchand <david.marchand@redhat.com> Acked-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Gregory Etelson [Tue, 26 Oct 2021 15:20:00 +0000 (18:20 +0300)]
app/testpmd: fix flex item flush
Testpmd provides 2 sets of flex item create and destroy functions
One for hosts with JSON library. These functions parse
flex item configuration stored in JSON file and create or destroy
flex item object. The second functions set is for hosts without JSON
library for compilation compatibility.
On hosts without JSON library, current implementation issues
"no JSON library" notification on port close.
The notification was triggered by port destructors that include
flex items flush routine.
The patch introduces single implementation for testpmd
flex item destroy.
Bing Zhao [Fri, 5 Nov 2021 15:30:39 +0000 (17:30 +0200)]
net/mlx5: check delay drop settings in kernel driver
The delay drop is the common feature managed on per device basis
and the kernel driver is responsible one for the initialization and
rearming.
By default, the timeout value is set to activate the delay drop when
the driver is loaded.
A private flag "dropless_rq" is used to control the rearming. Only
when it is on, the rearming will be handled once received a timeout
event. Or else, the delay drop will be deactivated after the first
timeout occurs and all the Rx queues won't have this feature.
The PMD is trying to query this flag and warn the application when
some queues are created with delay drop but the flag is off.
Bing Zhao [Fri, 5 Nov 2021 15:30:38 +0000 (17:30 +0200)]
net/mlx5: support Rx queue delay drop
For the Ethernet RQs, if there all receiving descriptors are
exhausted, the packets being received will be dropped. This behavior
prevents slow or malicious software entities at the host from
affecting the network. While for hairpin cases, even if there is no
software involved during the packet forwarding from Rx to Tx side,
some hiccup in the hardware or back pressure from Tx side may still
cause the descriptors to be exhausted. In certain scenarios it may be
preferred to configure the device to avoid such packet drops,
assuming the posting of descriptors will resume shortly.
To support this, a new devarg "delay_drop" is introduced. By default,
the delay drop is enabled for hairpin Rx queues and disabled for
standard Rx queues. This value is used as a bit mask:
- bit 0: enablement of standard Rx queue
- bit 1: enablement of hairpin Rx queue
And this attribute will be applied to all Rx queues of a device.
The "rq_delay_drop" capability in the HCA_CAP is checked before
creating any queue. If the hardware capabilities do not support
this delay drop, all the Rx queues will still be created without
this attribute, and the devarg setting will be ignored even if it
is specified explicitly. A warning log is used to notify the
application when this occurs.
Jie Wang [Fri, 5 Nov 2021 03:37:05 +0000 (11:37 +0800)]
net/i40e: fix forward outer IPv6 VXLAN
Testpmd forwards packets in checksum mode that it need to calculate
the checksum of each layer's protocol. Then it will fill flags and
header length into mbuf.
In process_outer_cksums, HW calculates the outer checksum if
tx_offloads contains outer UDP checksum otherwise SW calculates
the outer checksum.
When tx_offloads contains outer UDP checksum or outer IPv4 checksum,
mbuf will be filled with correct header length.
This patch added outer UDP checksum in tx_offload_capa and
I40E_TX_OFFLOAD_MASK, when we set csum hw outer-udp on that the
engine can forward outer IPv6 VXLAN packets.
Fixes: 7497d3e2f777 ("net/i40e: convert to new Tx offloads API") Cc: stable@dpdk.org Signed-off-by: Jie Wang <jie1x.wang@intel.com> Acked-by: Beilei Xing <beilei.xing@intel.com>
When receive packet, mlx5 PMD saves mbuf port number from
RxQ data.
To support shared RxQ, save port number into RQ context as user index.
Received packet resolve port number from CQE user index which derived
from RQ context.
Legacy Verbs API doesn't support RQ user index setting, still read from
RxQ port number.
Signed-off-by: Xueming Li <xuemingl@nvidia.com> Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Xueming Li [Thu, 4 Nov 2021 12:33:19 +0000 (20:33 +0800)]
net/mlx5: support shared Rx queue
This patch introduces shared RxQ. All shared Rx queues with same group
and queue ID share the same rxq_ctrl. Rxq_ctrl and rxq_data are shared,
all queues from different member port share same WQ and CQ, essentially
one Rx WQ, mbufs are filled into this singleton WQ.
Shared rxq_data is set into device Rx queues of all member ports as
RxQ object, used for receiving packets. Polling queue of any member
ports returns packets of any member, mbuf->port is used to identify
source port.
Signed-off-by: Xueming Li <xuemingl@nvidia.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Xueming Li [Thu, 4 Nov 2021 12:33:14 +0000 (20:33 +0800)]
net/mlx5: move Rx queue reference count
Rx queue reference count is counter of RQ, used to count reference to RQ
object. To prepare for shared Rx queue, this patch moves it from
rxq_ctrl to Rx queue private data.
Signed-off-by: Xueming Li <xuemingl@nvidia.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Xueming Li [Thu, 4 Nov 2021 12:33:13 +0000 (20:33 +0800)]
net/mlx5: split Rx queue into shareable and private
To prepare shared Rx queue, splits RxQ data into shareable and private.
Struct mlx5_rxq_priv is per queue data.
Struct mlx5_rxq_ctrl is shared queue resources and data.
Signed-off-by: Xueming Li <xuemingl@nvidia.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Xueming Li [Thu, 4 Nov 2021 12:33:10 +0000 (20:33 +0800)]
common/mlx5: support receive memory pool
The hardware Receive Memory Pool (RMP) object holds the destination for
incoming packets/messages that are routed to the RMP through RQs. RMP
enables sharing of memory across multiple Receive Queues. Multiple
Receive Queues can be attached to the same RMP and consume memory
from that shared poll. When using RMPs, completions are reported to the
CQ pointed to by the RQ, user index that set in RQ creation time is
carried to completion entry.
This patch enables RMP based RQ, RMP is created when mlx5_devx_rq.rmp is
set.
Signed-off-by: Xueming Li <xuemingl@nvidia.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Xueming Li [Thu, 4 Nov 2021 12:33:09 +0000 (20:33 +0800)]
common/mlx5: support basic receive memory pool
The hardware Receive Memory Pool (RMP) object holds the destination for
incoming packets/messages that are routed to the RMP through RQs. RMP
enables sharing of memory across multiple Receive Queues. Multiple
Receive Queues can be attached to the same RMP and consume memory
from that shared poll. When using RMPs, completions are reported to the
CQ pointed to by the RQ, and this Completion Queue can be shared as
well.
This patch adds DevX supports of PRM RMP object.
Signed-off-by: Xueming Li <xuemingl@nvidia.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Xueming Li [Thu, 4 Nov 2021 12:33:07 +0000 (20:33 +0800)]
common/mlx5: introduce user index field in completion
On ConnectX devices the completion entry provides the dedicated 24-bit
field, that is filled up with some static value assigned at the
Receiving Queue creation moment. This patch declares this field. This is
a preparation step for supporting shared RQs and the field is supposed
to provide actual port index while handling the shared receiving
queue(s).
Signed-off-by: Xueming Li <xuemingl@nvidia.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>